blob: 57339da76326eb504b4365a2716247c77af182ca [file] [log] [blame]
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001/*
2 * New driver for Marvell Yukon 2 chipset.
3 * Based on earlier sk98lin, and skge driver.
4 *
5 * This driver intentionally does not support all the features
6 * of the original driver such as link fail-over and link management because
7 * those should be done at higher levels.
8 *
9 * Copyright (C) 2005 Stephen Hemminger <shemminger@osdl.org>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
Stephen Hemminger798b6b12006-10-22 20:16:57 -070013 * the Free Software Foundation; either version 2 of the License.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070014 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
Stephen Hemminger793b8832005-09-14 16:06:14 -070017 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070018 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
Joe Perchesada1db52010-02-17 15:01:59 +000025#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
26
Stephen Hemminger793b8832005-09-14 16:06:14 -070027#include <linux/crc32.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070028#include <linux/kernel.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070029#include <linux/module.h>
30#include <linux/netdevice.h>
Andrew Mortond0bbccf2005-11-10 15:29:27 -080031#include <linux/dma-mapping.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070032#include <linux/etherdevice.h>
33#include <linux/ethtool.h>
34#include <linux/pci.h>
Alexey Dobriyana6b7a402011-06-06 10:43:46 +000035#include <linux/interrupt.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070036#include <linux/ip.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090037#include <linux/slab.h>
Arnaldo Carvalho de Meloc9bdd4b2007-03-12 20:09:15 -030038#include <net/ip.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070039#include <linux/tcp.h>
40#include <linux/in.h>
41#include <linux/delay.h>
Stephen Hemminger91c86df2005-12-09 11:34:57 -080042#include <linux/workqueue.h>
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -070043#include <linux/if_vlan.h>
Stephen Hemmingerd70cd512005-12-09 11:35:09 -080044#include <linux/prefetch.h>
Stephen Hemminger3cf26752007-07-09 15:33:35 -070045#include <linux/debugfs.h>
shemminger@osdl.orgef743d32005-11-30 11:45:12 -080046#include <linux/mii.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070047
48#include <asm/irq.h>
49
50#include "sky2.h"
51
52#define DRV_NAME "sky2"
stephen hemminger4ec8f0c2011-07-07 05:51:00 +000053#define DRV_VERSION "1.29"
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070054
55/*
56 * The Yukon II chipset takes 64 bit command blocks (called list elements)
57 * that are organized into three (receive, transmit, status) different rings
Stephen Hemminger14d02632006-09-26 11:57:43 -070058 * similar to Tigon3.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070059 */
60
Stephen Hemminger14d02632006-09-26 11:57:43 -070061#define RX_LE_SIZE 1024
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070062#define RX_LE_BYTES (RX_LE_SIZE*sizeof(struct sky2_rx_le))
Stephen Hemminger14d02632006-09-26 11:57:43 -070063#define RX_MAX_PENDING (RX_LE_SIZE/6 - 2)
shemminger@osdl.org13210ce2005-11-30 11:45:14 -080064#define RX_DEF_PENDING RX_MAX_PENDING
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070065
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +000066/* This is the worst case number of transmit list elements for a single skb:
Stephen Hemminger07e31632009-09-14 06:12:55 +000067 VLAN:GSO + CKSUM + Data + skb_frags * DMA */
68#define MAX_SKB_TX_LE (2 + (sizeof(dma_addr_t)/sizeof(u32))*(MAX_SKB_FRAGS+1))
Stephen Hemmingere9c1be82009-06-17 07:30:37 +000069#define TX_MIN_PENDING (MAX_SKB_TX_LE+1)
stephen hemmingerefe91932010-04-22 13:42:56 +000070#define TX_MAX_PENDING 1024
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +000071#define TX_DEF_PENDING 127
Stephen Hemminger793b8832005-09-14 16:06:14 -070072
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070073#define TX_WATCHDOG (5 * HZ)
74#define NAPI_WEIGHT 64
75#define PHY_RETRIES 1000
76
Stephen Hemmingerf4331a62007-07-09 15:33:39 -070077#define SKY2_EEPROM_MAGIC 0x9955aabb
78
Mike McCormack060b9462010-07-29 03:34:52 +000079#define RING_NEXT(x, s) (((x)+1) & ((s)-1))
Stephen Hemmingercb5d9542006-05-08 15:11:29 -070080
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070081static const u32 default_msg =
Stephen Hemminger793b8832005-09-14 16:06:14 -070082 NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK
83 | NETIF_MSG_TIMER | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR
Stephen Hemminger3be92a72006-01-17 13:43:17 -080084 | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070085
Stephen Hemminger793b8832005-09-14 16:06:14 -070086static int debug = -1; /* defaults above */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070087module_param(debug, int, 0);
88MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
89
Stephen Hemminger14d02632006-09-26 11:57:43 -070090static int copybreak __read_mostly = 128;
Stephen Hemmingerbdb5c582005-12-09 11:34:55 -080091module_param(copybreak, int, 0);
92MODULE_PARM_DESC(copybreak, "Receive copy threshold");
93
Stephen Hemmingerfb2690a92006-03-20 15:48:19 -080094static int disable_msi = 0;
95module_param(disable_msi, int, 0);
96MODULE_PARM_DESC(disable_msi, "Disable Message Signaled Interrupt (MSI)");
97
Stephen Hemmingere6cac9b2008-06-17 09:04:26 -070098static DEFINE_PCI_DEVICE_TABLE(sky2_id_table) = {
Stephen Hemmingere5b74c72006-12-04 15:53:36 -080099 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) }, /* SK-9Sxx */
100 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) }, /* SK-9Exx */
Stephen Hemmingere30a4ac2009-10-29 06:37:05 +0000101 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E01) }, /* SK-9E21M */
Stephen Hemminger2d2a3872006-05-17 14:37:04 -0700102 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4b00) }, /* DGE-560T */
Stephen Hemminger2f4a66a2006-09-01 14:52:04 -0700103 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4001) }, /* DGE-550SX */
Stephen Hemminger508f89e2006-12-01 14:29:34 -0800104 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4B02) }, /* DGE-560SX */
Stephen Hemmingerf1a0b6f2007-02-06 10:45:44 -0800105 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4B03) }, /* DGE-550T */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800106 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4340) }, /* 88E8021 */
107 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4341) }, /* 88E8022 */
108 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4342) }, /* 88E8061 */
109 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4343) }, /* 88E8062 */
110 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4344) }, /* 88E8021 */
111 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4345) }, /* 88E8022 */
112 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4346) }, /* 88E8061 */
113 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4347) }, /* 88E8062 */
114 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4350) }, /* 88E8035 */
115 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4351) }, /* 88E8036 */
116 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4352) }, /* 88E8038 */
117 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4353) }, /* 88E8039 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700118 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4354) }, /* 88E8040 */
Stephen Hemmingera3b4fce2008-06-14 10:32:15 -0700119 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4355) }, /* 88E8040T */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800120 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4356) }, /* 88EC033 */
Stephen Hemminger5a37a682007-11-08 08:20:17 -0800121 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4357) }, /* 88E8042 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700122 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x435A) }, /* 88E8048 */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800123 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4360) }, /* 88E8052 */
124 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4361) }, /* 88E8050 */
125 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4362) }, /* 88E8053 */
126 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4363) }, /* 88E8055 */
127 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4364) }, /* 88E8056 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700128 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4365) }, /* 88E8070 */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800129 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4366) }, /* 88EC036 */
130 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4367) }, /* 88EC032 */
131 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4368) }, /* 88EC034 */
Stephen Hemmingerf1a0b6f2007-02-06 10:45:44 -0800132 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4369) }, /* 88EC042 */
133 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436A) }, /* 88E8058 */
Stephen Hemminger69161612007-06-04 17:23:26 -0700134 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436B) }, /* 88E8071 */
Stephen Hemminger5a37a682007-11-08 08:20:17 -0800135 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436C) }, /* 88E8072 */
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800136 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436D) }, /* 88E8055 */
137 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4370) }, /* 88E8075 */
Stephen Hemminger0ce8b982008-06-17 09:04:27 -0700138 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4380) }, /* 88E8057 */
Stephen Hemminger0f5aac72009-10-29 06:37:09 +0000139 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4381) }, /* 88E8059 */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700140 { 0 }
141};
Stephen Hemminger793b8832005-09-14 16:06:14 -0700142
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700143MODULE_DEVICE_TABLE(pci, sky2_id_table);
144
145/* Avoid conditionals by using array */
146static const unsigned txqaddr[] = { Q_XA1, Q_XA2 };
147static const unsigned rxqaddr[] = { Q_R1, Q_R2 };
Stephen Hemmingerf4ea4312006-05-09 14:46:54 -0700148static const u32 portirq_msk[] = { Y2_IS_PORT_1, Y2_IS_PORT_2 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700149
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +0100150static void sky2_set_multicast(struct net_device *dev);
151
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800152/* Access to PHY via serial interconnect */
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800153static int gm_phy_write(struct sky2_hw *hw, unsigned port, u16 reg, u16 val)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700154{
155 int i;
156
157 gma_write16(hw, port, GM_SMI_DATA, val);
158 gma_write16(hw, port, GM_SMI_CTRL,
159 GM_SMI_CT_PHY_AD(PHY_ADDR_MARV) | GM_SMI_CT_REG_AD(reg));
160
161 for (i = 0; i < PHY_RETRIES; i++) {
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800162 u16 ctrl = gma_read16(hw, port, GM_SMI_CTRL);
163 if (ctrl == 0xffff)
164 goto io_error;
165
166 if (!(ctrl & GM_SMI_CT_BUSY))
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800167 return 0;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800168
169 udelay(10);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700170 }
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800171
Mike McCormack060b9462010-07-29 03:34:52 +0000172 dev_warn(&hw->pdev->dev, "%s: phy write timeout\n", hw->dev[port]->name);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800173 return -ETIMEDOUT;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800174
175io_error:
176 dev_err(&hw->pdev->dev, "%s: phy I/O error\n", hw->dev[port]->name);
177 return -EIO;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700178}
179
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800180static int __gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg, u16 *val)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700181{
182 int i;
183
Stephen Hemminger793b8832005-09-14 16:06:14 -0700184 gma_write16(hw, port, GM_SMI_CTRL, GM_SMI_CT_PHY_AD(PHY_ADDR_MARV)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700185 | GM_SMI_CT_REG_AD(reg) | GM_SMI_CT_OP_RD);
186
187 for (i = 0; i < PHY_RETRIES; i++) {
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800188 u16 ctrl = gma_read16(hw, port, GM_SMI_CTRL);
189 if (ctrl == 0xffff)
190 goto io_error;
191
192 if (ctrl & GM_SMI_CT_RD_VAL) {
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800193 *val = gma_read16(hw, port, GM_SMI_DATA);
194 return 0;
195 }
196
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800197 udelay(10);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700198 }
199
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800200 dev_warn(&hw->pdev->dev, "%s: phy read timeout\n", hw->dev[port]->name);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800201 return -ETIMEDOUT;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800202io_error:
203 dev_err(&hw->pdev->dev, "%s: phy I/O error\n", hw->dev[port]->name);
204 return -EIO;
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800205}
206
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800207static inline u16 gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg)
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800208{
209 u16 v;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800210 __gm_phy_read(hw, port, reg, &v);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800211 return v;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700212}
213
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800214
215static void sky2_power_on(struct sky2_hw *hw)
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700216{
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800217 /* switch power to VCC (WA for VAUX problem) */
218 sky2_write8(hw, B0_POWER_CTRL,
219 PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_OFF | PC_VCC_ON);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700220
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800221 /* disable Core Clock Division, */
222 sky2_write32(hw, B2_Y2_CLK_CTRL, Y2_CLK_DIV_DIS);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700223
stephen hemminger4b7c47a2010-03-29 07:36:19 +0000224 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > CHIP_REV_YU_XL_A1)
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800225 /* enable bits are inverted */
226 sky2_write8(hw, B2_Y2_CLK_GATE,
227 Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS |
228 Y2_CLK_GAT_LNK1_DIS | Y2_PCI_CLK_LNK2_DIS |
229 Y2_COR_CLK_LNK2_DIS | Y2_CLK_GAT_LNK2_DIS);
230 else
231 sky2_write8(hw, B2_Y2_CLK_GATE, 0);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700232
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700233 if (hw->flags & SKY2_HW_ADV_POWER_CTL) {
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700234 u32 reg;
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700235
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800236 sky2_pci_write32(hw, PCI_DEV_REG3, 0);
Stephen Hemmingerb2345772007-08-21 14:34:02 -0700237
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800238 reg = sky2_pci_read32(hw, PCI_DEV_REG4);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700239 /* set all bits to 0 except bits 15..12 and 8 */
240 reg &= P_ASPM_CONTROL_MSK;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800241 sky2_pci_write32(hw, PCI_DEV_REG4, reg);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700242
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800243 reg = sky2_pci_read32(hw, PCI_DEV_REG5);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700244 /* set all bits to 0 except bits 28 & 27 */
245 reg &= P_CTL_TIM_VMAIN_AV_MSK;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800246 sky2_pci_write32(hw, PCI_DEV_REG5, reg);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700247
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800248 sky2_pci_write32(hw, PCI_CFG_REG_1, 0);
Stephen Hemminger8f709202007-06-04 17:23:25 -0700249
stephen hemminger5f8ae5c2010-02-12 06:57:59 +0000250 sky2_write16(hw, B0_CTST, Y2_HW_WOL_ON);
251
Stephen Hemminger8f709202007-06-04 17:23:25 -0700252 /* Enable workaround for dev 4.107 on Yukon-Ultra & Extreme */
253 reg = sky2_read32(hw, B2_GP_IO);
254 reg |= GLB_GPIO_STAT_RACE_DIS;
255 sky2_write32(hw, B2_GP_IO, reg);
Stephen Hemmingerb2345772007-08-21 14:34:02 -0700256
257 sky2_read32(hw, B2_GP_IO);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700258 }
Stephen Hemminger10547ae2009-08-31 07:31:41 +0000259
260 /* Turn on "driver loaded" LED */
261 sky2_write16(hw, B0_CTST, Y2_LED_STAT_ON);
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800262}
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700263
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800264static void sky2_power_aux(struct sky2_hw *hw)
265{
stephen hemminger4b7c47a2010-03-29 07:36:19 +0000266 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > CHIP_REV_YU_XL_A1)
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800267 sky2_write8(hw, B2_Y2_CLK_GATE, 0);
268 else
269 /* enable bits are inverted */
270 sky2_write8(hw, B2_Y2_CLK_GATE,
271 Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS |
272 Y2_CLK_GAT_LNK1_DIS | Y2_PCI_CLK_LNK2_DIS |
273 Y2_COR_CLK_LNK2_DIS | Y2_CLK_GAT_LNK2_DIS);
274
Stephen Hemmingerc23ddf82009-09-03 06:16:25 +0000275 /* switch power to VAUX if supported and PME from D3cold */
276 if ( (sky2_read32(hw, B0_CTST) & Y2_VAUX_AVAIL) &&
277 pci_pme_capable(hw->pdev, PCI_D3cold))
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800278 sky2_write8(hw, B0_POWER_CTRL,
279 (PC_VAUX_ENA | PC_VCC_ENA |
280 PC_VAUX_ON | PC_VCC_OFF));
Stephen Hemminger10547ae2009-08-31 07:31:41 +0000281
282 /* turn off "driver loaded LED" */
283 sky2_write16(hw, B0_CTST, Y2_LED_STAT_OFF);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700284}
285
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700286static void sky2_gmac_reset(struct sky2_hw *hw, unsigned port)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700287{
288 u16 reg;
289
290 /* disable all GMAC IRQ's */
291 sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), 0);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700292
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700293 gma_write16(hw, port, GM_MC_ADDR_H1, 0); /* clear MC hash */
294 gma_write16(hw, port, GM_MC_ADDR_H2, 0);
295 gma_write16(hw, port, GM_MC_ADDR_H3, 0);
296 gma_write16(hw, port, GM_MC_ADDR_H4, 0);
297
298 reg = gma_read16(hw, port, GM_RX_CTRL);
299 reg |= GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA;
300 gma_write16(hw, port, GM_RX_CTRL, reg);
301}
302
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700303/* flow control to advertise bits */
304static const u16 copper_fc_adv[] = {
305 [FC_NONE] = 0,
306 [FC_TX] = PHY_M_AN_ASP,
307 [FC_RX] = PHY_M_AN_PC,
308 [FC_BOTH] = PHY_M_AN_PC | PHY_M_AN_ASP,
309};
310
311/* flow control to advertise bits when using 1000BaseX */
312static const u16 fiber_fc_adv[] = {
Stephen Hemmingerdf3fe1f2007-10-11 19:48:04 -0700313 [FC_NONE] = PHY_M_P_NO_PAUSE_X,
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700314 [FC_TX] = PHY_M_P_ASYM_MD_X,
315 [FC_RX] = PHY_M_P_SYM_MD_X,
Stephen Hemmingerdf3fe1f2007-10-11 19:48:04 -0700316 [FC_BOTH] = PHY_M_P_BOTH_MD_X,
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700317};
318
319/* flow control to GMA disable bits */
320static const u16 gm_fc_disable[] = {
321 [FC_NONE] = GM_GPCR_FC_RX_DIS | GM_GPCR_FC_TX_DIS,
322 [FC_TX] = GM_GPCR_FC_RX_DIS,
323 [FC_RX] = GM_GPCR_FC_TX_DIS,
324 [FC_BOTH] = 0,
325};
326
327
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700328static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
329{
330 struct sky2_port *sky2 = netdev_priv(hw->dev[port]);
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700331 u16 ctrl, ct1000, adv, pg, ledctrl, ledover, reg;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700332
Stephen Hemminger0ea065e2009-08-14 15:36:41 -0700333 if ( (sky2->flags & SKY2_FLAG_AUTO_SPEED) &&
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700334 !(hw->flags & SKY2_HW_NEWER_PHY)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700335 u16 ectrl = gm_phy_read(hw, port, PHY_MARV_EXT_CTRL);
336
337 ectrl &= ~(PHY_M_EC_M_DSC_MSK | PHY_M_EC_S_DSC_MSK |
Stephen Hemminger793b8832005-09-14 16:06:14 -0700338 PHY_M_EC_MAC_S_MSK);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700339 ectrl |= PHY_M_EC_MAC_S(MAC_TX_CLK_25_MHZ);
340
Stephen Hemminger53419c62007-05-14 12:38:11 -0700341 /* on PHY 88E1040 Rev.D0 (and newer) downshift control changed */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700342 if (hw->chip_id == CHIP_ID_YUKON_EC)
Stephen Hemminger53419c62007-05-14 12:38:11 -0700343 /* set downshift counter to 3x and enable downshift */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700344 ectrl |= PHY_M_EC_DSC_2(2) | PHY_M_EC_DOWN_S_ENA;
345 else
Stephen Hemminger53419c62007-05-14 12:38:11 -0700346 /* set master & slave downshift counter to 1x */
347 ectrl |= PHY_M_EC_M_DSC(0) | PHY_M_EC_S_DSC(1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700348
349 gm_phy_write(hw, port, PHY_MARV_EXT_CTRL, ectrl);
350 }
351
352 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700353 if (sky2_is_copper(hw)) {
Stephen Hemminger05745c42007-09-19 15:36:45 -0700354 if (!(hw->flags & SKY2_HW_GIGABIT)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700355 /* enable automatic crossover */
356 ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO) >> 1;
Stephen Hemminger6d3105d2007-09-24 19:34:51 -0700357
358 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
359 hw->chip_rev == CHIP_REV_YU_FE2_A0) {
360 u16 spec;
361
362 /* Enable Class A driver for FE+ A0 */
363 spec = gm_phy_read(hw, port, PHY_MARV_FE_SPEC_2);
364 spec |= PHY_M_FESC_SEL_CL_A;
365 gm_phy_write(hw, port, PHY_MARV_FE_SPEC_2, spec);
366 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700367 } else {
stephen hemminger4fb99cd2011-07-07 05:50:59 +0000368 if (hw->chip_id >= CHIP_ID_YUKON_OPT) {
369 u16 ctrl2 = gm_phy_read(hw, port, PHY_MARV_EXT_CTRL_2);
370
371 /* enable PHY Reverse Auto-Negotiation */
372 ctrl2 |= 1u << 13;
373
374 /* Write PHY changes (SW-reset must follow) */
375 gm_phy_write(hw, port, PHY_MARV_EXT_CTRL_2, ctrl2);
376 }
377
378
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700379 /* disable energy detect */
380 ctrl &= ~PHY_M_PC_EN_DET_MSK;
381
382 /* enable automatic crossover */
383 ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO);
384
Stephen Hemminger53419c62007-05-14 12:38:11 -0700385 /* downshift on PHY 88E1112 and 88E1149 is changed */
Joe Perches8e95a202009-12-03 07:58:21 +0000386 if ( (sky2->flags & SKY2_FLAG_AUTO_SPEED) &&
387 (hw->flags & SKY2_HW_NEWER_PHY)) {
Stephen Hemminger53419c62007-05-14 12:38:11 -0700388 /* set downshift counter to 3x and enable downshift */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700389 ctrl &= ~PHY_M_PC_DSC_MSK;
390 ctrl |= PHY_M_PC_DSC(2) | PHY_M_PC_DOWN_S_ENA;
391 }
392 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700393 } else {
394 /* workaround for deviation #4.88 (CRC errors) */
395 /* disable Automatic Crossover */
396
397 ctrl &= ~PHY_M_PC_MDIX_MSK;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700398 }
399
400 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
401
402 /* special setup for PHY 88E1112 Fiber */
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700403 if (hw->chip_id == CHIP_ID_YUKON_XL && (hw->flags & SKY2_HW_FIBRE_PHY)) {
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700404 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
405
406 /* Fiber: select 1000BASE-X only mode MAC Specific Ctrl Reg. */
407 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
408 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
409 ctrl &= ~PHY_M_MAC_MD_MSK;
410 ctrl |= PHY_M_MAC_MODE_SEL(PHY_M_MAC_MD_1000BX);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700411 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
412
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700413 if (hw->pmd_type == 'P') {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700414 /* select page 1 to access Fiber registers */
415 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 1);
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700416
417 /* for SFP-module set SIGDET polarity to low */
418 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
419 ctrl |= PHY_M_FIB_SIGD_POL;
Stephen Hemminger34dd9622007-05-24 15:22:45 -0700420 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700421 }
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700422
423 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700424 }
425
Stephen Hemminger7800fdd2006-10-17 10:24:10 -0700426 ctrl = PHY_CT_RESET;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700427 ct1000 = 0;
428 adv = PHY_AN_CSMA;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700429 reg = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700430
Stephen Hemminger0ea065e2009-08-14 15:36:41 -0700431 if (sky2->flags & SKY2_FLAG_AUTO_SPEED) {
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700432 if (sky2_is_copper(hw)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700433 if (sky2->advertising & ADVERTISED_1000baseT_Full)
434 ct1000 |= PHY_M_1000C_AFD;
435 if (sky2->advertising & ADVERTISED_1000baseT_Half)
436 ct1000 |= PHY_M_1000C_AHD;
437 if (sky2->advertising & ADVERTISED_100baseT_Full)
438 adv |= PHY_M_AN_100_FD;
439 if (sky2->advertising & ADVERTISED_100baseT_Half)
440 adv |= PHY_M_AN_100_HD;
441 if (sky2->advertising & ADVERTISED_10baseT_Full)
442 adv |= PHY_M_AN_10_FD;
443 if (sky2->advertising & ADVERTISED_10baseT_Half)
444 adv |= PHY_M_AN_10_HD;
Stephen Hemminger709c6e72006-10-17 10:24:04 -0700445
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700446 } else { /* special defines for FIBER (88E1040S only) */
447 if (sky2->advertising & ADVERTISED_1000baseT_Full)
448 adv |= PHY_M_AN_1000X_AFD;
449 if (sky2->advertising & ADVERTISED_1000baseT_Half)
450 adv |= PHY_M_AN_1000X_AHD;
Stephen Hemminger709c6e72006-10-17 10:24:04 -0700451 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700452
453 /* Restart Auto-negotiation */
454 ctrl |= PHY_CT_ANE | PHY_CT_RE_CFG;
455 } else {
456 /* forced speed/duplex settings */
457 ct1000 = PHY_M_1000C_MSE;
458
Stephen Hemminger0ea065e2009-08-14 15:36:41 -0700459 /* Disable auto update for duplex flow control and duplex */
460 reg |= GM_GPCR_AU_DUP_DIS | GM_GPCR_AU_SPD_DIS;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700461
462 switch (sky2->speed) {
463 case SPEED_1000:
464 ctrl |= PHY_CT_SP1000;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700465 reg |= GM_GPCR_SPEED_1000;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700466 break;
467 case SPEED_100:
468 ctrl |= PHY_CT_SP100;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700469 reg |= GM_GPCR_SPEED_100;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700470 break;
471 }
472
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700473 if (sky2->duplex == DUPLEX_FULL) {
474 reg |= GM_GPCR_DUP_FULL;
475 ctrl |= PHY_CT_DUP_MD;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700476 } else if (sky2->speed < SPEED_1000)
477 sky2->flow_mode = FC_NONE;
Stephen Hemminger0ea065e2009-08-14 15:36:41 -0700478 }
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700479
Stephen Hemminger0ea065e2009-08-14 15:36:41 -0700480 if (sky2->flags & SKY2_FLAG_AUTO_PAUSE) {
481 if (sky2_is_copper(hw))
482 adv |= copper_fc_adv[sky2->flow_mode];
483 else
484 adv |= fiber_fc_adv[sky2->flow_mode];
485 } else {
486 reg |= GM_GPCR_AU_FCT_DIS;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700487 reg |= gm_fc_disable[sky2->flow_mode];
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700488
489 /* Forward pause packets to GMAC? */
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700490 if (sky2->flow_mode & FC_RX)
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700491 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON);
492 else
493 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700494 }
495
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700496 gma_write16(hw, port, GM_GP_CTRL, reg);
497
Stephen Hemminger05745c42007-09-19 15:36:45 -0700498 if (hw->flags & SKY2_HW_GIGABIT)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700499 gm_phy_write(hw, port, PHY_MARV_1000T_CTRL, ct1000);
500
501 gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, adv);
502 gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl);
503
504 /* Setup Phy LED's */
505 ledctrl = PHY_M_LED_PULS_DUR(PULS_170MS);
506 ledover = 0;
507
508 switch (hw->chip_id) {
509 case CHIP_ID_YUKON_FE:
510 /* on 88E3082 these bits are at 11..9 (shifted left) */
511 ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) << 1;
512
513 ctrl = gm_phy_read(hw, port, PHY_MARV_FE_LED_PAR);
514
515 /* delete ACT LED control bits */
516 ctrl &= ~PHY_M_FELP_LED1_MSK;
517 /* change ACT LED control to blink mode */
518 ctrl |= PHY_M_FELP_LED1_CTRL(LED_PAR_CTRL_ACT_BL);
519 gm_phy_write(hw, port, PHY_MARV_FE_LED_PAR, ctrl);
520 break;
521
Stephen Hemminger05745c42007-09-19 15:36:45 -0700522 case CHIP_ID_YUKON_FE_P:
523 /* Enable Link Partner Next Page */
524 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
525 ctrl |= PHY_M_PC_ENA_LIP_NP;
526
527 /* disable Energy Detect and enable scrambler */
528 ctrl &= ~(PHY_M_PC_ENA_ENE_DT | PHY_M_PC_DIS_SCRAMB);
529 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
530
531 /* set LED2 -> ACT, LED1 -> LINK, LED0 -> SPEED */
532 ctrl = PHY_M_FELP_LED2_CTRL(LED_PAR_CTRL_ACT_BL) |
533 PHY_M_FELP_LED1_CTRL(LED_PAR_CTRL_LINK) |
534 PHY_M_FELP_LED0_CTRL(LED_PAR_CTRL_SPEED);
535
536 gm_phy_write(hw, port, PHY_MARV_FE_LED_PAR, ctrl);
537 break;
538
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700539 case CHIP_ID_YUKON_XL:
Stephen Hemminger793b8832005-09-14 16:06:14 -0700540 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700541
542 /* select page 3 to access LED control register */
543 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
544
545 /* set LED Function Control register */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700546 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
547 (PHY_M_LEDC_LOS_CTRL(1) | /* LINK/ACT */
548 PHY_M_LEDC_INIT_CTRL(7) | /* 10 Mbps */
549 PHY_M_LEDC_STA1_CTRL(7) | /* 100 Mbps */
550 PHY_M_LEDC_STA0_CTRL(7))); /* 1000 Mbps */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700551
552 /* set Polarity Control register */
553 gm_phy_write(hw, port, PHY_MARV_PHY_STAT,
Stephen Hemminger793b8832005-09-14 16:06:14 -0700554 (PHY_M_POLC_LS1_P_MIX(4) |
555 PHY_M_POLC_IS0_P_MIX(4) |
556 PHY_M_POLC_LOS_CTRL(2) |
557 PHY_M_POLC_INIT_CTRL(2) |
558 PHY_M_POLC_STA1_CTRL(2) |
559 PHY_M_POLC_STA0_CTRL(2)));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700560
561 /* restore page register */
Stephen Hemminger793b8832005-09-14 16:06:14 -0700562 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700563 break;
Stephen Hemminger93745492007-02-06 10:45:43 -0800564
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700565 case CHIP_ID_YUKON_EC_U:
Stephen Hemminger93745492007-02-06 10:45:43 -0800566 case CHIP_ID_YUKON_EX:
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800567 case CHIP_ID_YUKON_SUPR:
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700568 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
569
570 /* select page 3 to access LED control register */
571 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
572
573 /* set LED Function Control register */
574 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
575 (PHY_M_LEDC_LOS_CTRL(1) | /* LINK/ACT */
576 PHY_M_LEDC_INIT_CTRL(8) | /* 10 Mbps */
577 PHY_M_LEDC_STA1_CTRL(7) | /* 100 Mbps */
578 PHY_M_LEDC_STA0_CTRL(7)));/* 1000 Mbps */
579
580 /* set Blink Rate in LED Timer Control Register */
581 gm_phy_write(hw, port, PHY_MARV_INT_MASK,
582 ledctrl | PHY_M_LED_BLINK_RT(BLINK_84MS));
583 /* restore page register */
584 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
585 break;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700586
587 default:
588 /* set Tx LED (LED_TX) to blink mode on Rx OR Tx activity */
589 ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) | PHY_M_LEDC_TX_CTRL;
Stephen Hemmingera84d0a32008-02-22 16:00:33 -0800590
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700591 /* turn off the Rx LED (LED_RX) */
Stephen Hemmingera84d0a32008-02-22 16:00:33 -0800592 ledover |= PHY_M_LED_MO_RX(MO_LED_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700593 }
594
Stephen Hemminger0ce8b982008-06-17 09:04:27 -0700595 if (hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_UL_2) {
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800596 /* apply fixes in PHY AFE */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700597 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 255);
598
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800599 /* increase differential signal amplitude in 10BASE-T */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700600 gm_phy_write(hw, port, 0x18, 0xaa99);
601 gm_phy_write(hw, port, 0x17, 0x2011);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700602
Stephen Hemminger0ce8b982008-06-17 09:04:27 -0700603 if (hw->chip_id == CHIP_ID_YUKON_EC_U) {
604 /* fix for IEEE A/B Symmetry failure in 1000BASE-T */
605 gm_phy_write(hw, port, 0x18, 0xa204);
606 gm_phy_write(hw, port, 0x17, 0x2002);
607 }
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800608
609 /* set page register to 0 */
Stephen Hemminger9467a8f2007-04-07 16:02:28 -0700610 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
Stephen Hemminger05745c42007-09-19 15:36:45 -0700611 } else if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
612 hw->chip_rev == CHIP_REV_YU_FE2_A0) {
613 /* apply workaround for integrated resistors calibration */
614 gm_phy_write(hw, port, PHY_MARV_PAGE_ADDR, 17);
615 gm_phy_write(hw, port, PHY_MARV_PAGE_DATA, 0x3f60);
Stephen Hemminger0f5aac72009-10-29 06:37:09 +0000616 } else if (hw->chip_id == CHIP_ID_YUKON_OPT && hw->chip_rev == 0) {
617 /* apply fixes in PHY AFE */
618 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0x00ff);
619
620 /* apply RDAC termination workaround */
621 gm_phy_write(hw, port, 24, 0x2800);
622 gm_phy_write(hw, port, 23, 0x2001);
623
624 /* set page register back to 0 */
625 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
Stephen Hemmingere1a74b32008-06-17 09:04:24 -0700626 } else if (hw->chip_id != CHIP_ID_YUKON_EX &&
627 hw->chip_id < CHIP_ID_YUKON_SUPR) {
Stephen Hemminger05745c42007-09-19 15:36:45 -0700628 /* no effect on Yukon-XL */
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800629 gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl);
630
Joe Perches8e95a202009-12-03 07:58:21 +0000631 if (!(sky2->flags & SKY2_FLAG_AUTO_SPEED) ||
632 sky2->speed == SPEED_100) {
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800633 /* turn on 100 Mbps LED (LED_LINK100) */
Stephen Hemmingera84d0a32008-02-22 16:00:33 -0800634 ledover |= PHY_M_LED_MO_100(MO_LED_ON);
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800635 }
636
637 if (ledover)
638 gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover);
639
stephen hemminger4fb99cd2011-07-07 05:50:59 +0000640 } else if (hw->chip_id == CHIP_ID_YUKON_PRM &&
641 (sky2_read8(hw, B2_MAC_CFG) & 0xf) == 0x7) {
642 int i;
643 /* This a phy register setup workaround copied from vendor driver. */
644 static const struct {
645 u16 reg, val;
646 } eee_afe[] = {
647 { 0x156, 0x58ce },
648 { 0x153, 0x99eb },
649 { 0x141, 0x8064 },
650 /* { 0x155, 0x130b },*/
651 { 0x000, 0x0000 },
652 { 0x151, 0x8433 },
653 { 0x14b, 0x8c44 },
654 { 0x14c, 0x0f90 },
655 { 0x14f, 0x39aa },
656 /* { 0x154, 0x2f39 },*/
657 { 0x14d, 0xba33 },
658 { 0x144, 0x0048 },
659 { 0x152, 0x2010 },
660 /* { 0x158, 0x1223 },*/
661 { 0x140, 0x4444 },
662 { 0x154, 0x2f3b },
663 { 0x158, 0xb203 },
664 { 0x157, 0x2029 },
665 };
666
667 /* Start Workaround for OptimaEEE Rev.Z0 */
668 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0x00fb);
669
670 gm_phy_write(hw, port, 1, 0x4099);
671 gm_phy_write(hw, port, 3, 0x1120);
672 gm_phy_write(hw, port, 11, 0x113c);
673 gm_phy_write(hw, port, 14, 0x8100);
674 gm_phy_write(hw, port, 15, 0x112a);
675 gm_phy_write(hw, port, 17, 0x1008);
676
677 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0x00fc);
678 gm_phy_write(hw, port, 1, 0x20b0);
679
680 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0x00ff);
681
682 for (i = 0; i < ARRAY_SIZE(eee_afe); i++) {
683 /* apply AFE settings */
684 gm_phy_write(hw, port, 17, eee_afe[i].val);
685 gm_phy_write(hw, port, 16, eee_afe[i].reg | 1u<<13);
686 }
687
688 /* End Workaround for OptimaEEE */
689 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
690
691 /* Enable 10Base-Te (EEE) */
692 if (hw->chip_id >= CHIP_ID_YUKON_PRM) {
693 reg = gm_phy_read(hw, port, PHY_MARV_EXT_CTRL);
694 gm_phy_write(hw, port, PHY_MARV_EXT_CTRL,
695 reg | PHY_M_10B_TE_ENABLE);
696 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700697 }
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700698
shemminger@osdl.orgd571b692005-10-26 12:16:09 -0700699 /* Enable phy interrupt on auto-negotiation complete (or link up) */
Stephen Hemminger0ea065e2009-08-14 15:36:41 -0700700 if (sky2->flags & SKY2_FLAG_AUTO_SPEED)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700701 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_COMPL);
702 else
703 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK);
704}
705
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700706static const u32 phy_power[] = { PCI_Y2_PHY1_POWD, PCI_Y2_PHY2_POWD };
707static const u32 coma_mode[] = { PCI_Y2_PHY1_COMA, PCI_Y2_PHY2_COMA };
708
709static void sky2_phy_power_up(struct sky2_hw *hw, unsigned port)
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700710{
711 u32 reg1;
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700712
stephen hemmingera40ccc62010-01-24 18:46:06 +0000713 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800714 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700715 reg1 &= ~phy_power[port];
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700716
stephen hemminger4b7c47a2010-03-29 07:36:19 +0000717 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > CHIP_REV_YU_XL_A1)
Stephen Hemmingerff35164e2007-10-11 19:47:44 -0700718 reg1 |= coma_mode[port];
719
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800720 sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
stephen hemmingera40ccc62010-01-24 18:46:06 +0000721 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemminger82637e82008-01-23 19:16:04 -0800722 sky2_pci_read32(hw, PCI_DEV_REG1);
Stephen Hemmingerf71eb1a2008-08-04 13:33:37 -0700723
724 if (hw->chip_id == CHIP_ID_YUKON_FE)
725 gm_phy_write(hw, port, PHY_MARV_CTRL, PHY_CT_ANE);
726 else if (hw->flags & SKY2_HW_ADV_POWER_CTL)
727 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700728}
Stephen Hemminger167f53d2007-09-25 19:01:02 -0700729
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700730static void sky2_phy_power_down(struct sky2_hw *hw, unsigned port)
731{
732 u32 reg1;
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700733 u16 ctrl;
734
735 /* release GPHY Control reset */
736 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
737
738 /* release GMAC reset */
739 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
740
741 if (hw->flags & SKY2_HW_NEWER_PHY) {
742 /* select page 2 to access MAC control register */
743 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
744
745 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
746 /* allow GMII Power Down */
747 ctrl &= ~PHY_M_MAC_GMIF_PUP;
748 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
749
750 /* set page register back to 0 */
751 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
752 }
753
754 /* setup General Purpose Control Register */
755 gma_write16(hw, port, GM_GP_CTRL,
Stephen Hemminger0ea065e2009-08-14 15:36:41 -0700756 GM_GPCR_FL_PASS | GM_GPCR_SPEED_100 |
757 GM_GPCR_AU_DUP_DIS | GM_GPCR_AU_FCT_DIS |
758 GM_GPCR_AU_SPD_DIS);
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700759
760 if (hw->chip_id != CHIP_ID_YUKON_EC) {
761 if (hw->chip_id == CHIP_ID_YUKON_EC_U) {
Rafael J. Wysockie484d5f2008-08-10 19:30:28 +0200762 /* select page 2 to access MAC control register */
763 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700764
Rafael J. Wysockie484d5f2008-08-10 19:30:28 +0200765 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700766 /* enable Power Down */
767 ctrl |= PHY_M_PC_POW_D_ENA;
768 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
Rafael J. Wysockie484d5f2008-08-10 19:30:28 +0200769
770 /* set page register back to 0 */
771 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700772 }
773
774 /* set IEEE compatible Power Down Mode (dev. #4.99) */
775 gm_phy_write(hw, port, PHY_MARV_CTRL, PHY_CT_PDOWN);
776 }
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700777
stephen hemmingera40ccc62010-01-24 18:46:06 +0000778 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700779 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700780 reg1 |= phy_power[port]; /* set PHY to PowerDown/COMA Mode */
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700781 sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
stephen hemmingera40ccc62010-01-24 18:46:06 +0000782 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700783}
784
stephen hemminger8e116802011-07-07 05:50:58 +0000785/* configure IPG according to used link speed */
786static void sky2_set_ipg(struct sky2_port *sky2)
787{
788 u16 reg;
789
790 reg = gma_read16(sky2->hw, sky2->port, GM_SERIAL_MODE);
791 reg &= ~GM_SMOD_IPG_MSK;
792 if (sky2->speed > SPEED_100)
793 reg |= IPG_DATA_VAL(IPG_DATA_DEF_1000);
794 else
795 reg |= IPG_DATA_VAL(IPG_DATA_DEF_10_100);
796 gma_write16(sky2->hw, sky2->port, GM_SERIAL_MODE, reg);
797}
798
Brandon Philips38000a92010-06-16 16:21:58 +0000799/* Enable Rx/Tx */
800static void sky2_enable_rx_tx(struct sky2_port *sky2)
801{
802 struct sky2_hw *hw = sky2->hw;
803 unsigned port = sky2->port;
804 u16 reg;
805
806 reg = gma_read16(hw, port, GM_GP_CTRL);
807 reg |= GM_GPCR_RX_ENA | GM_GPCR_TX_ENA;
808 gma_write16(hw, port, GM_GP_CTRL, reg);
809}
810
Stephen Hemminger1b537562005-12-20 15:08:07 -0800811/* Force a renegotiation */
812static void sky2_phy_reinit(struct sky2_port *sky2)
813{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800814 spin_lock_bh(&sky2->phy_lock);
Stephen Hemminger1b537562005-12-20 15:08:07 -0800815 sky2_phy_init(sky2->hw, sky2->port);
Brandon Philips38000a92010-06-16 16:21:58 +0000816 sky2_enable_rx_tx(sky2);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800817 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemminger1b537562005-12-20 15:08:07 -0800818}
819
Stephen Hemmingere3173832007-02-06 10:45:39 -0800820/* Put device in state to listen for Wake On Lan */
821static void sky2_wol_init(struct sky2_port *sky2)
822{
823 struct sky2_hw *hw = sky2->hw;
824 unsigned port = sky2->port;
825 enum flow_control save_mode;
826 u16 ctrl;
Stephen Hemmingere3173832007-02-06 10:45:39 -0800827
828 /* Bring hardware out of reset */
829 sky2_write16(hw, B0_CTST, CS_RST_CLR);
830 sky2_write16(hw, SK_REG(port, GMAC_LINK_CTRL), GMLC_RST_CLR);
831
832 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
833 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
834
835 /* Force to 10/100
836 * sky2_reset will re-enable on resume
837 */
838 save_mode = sky2->flow_mode;
839 ctrl = sky2->advertising;
840
841 sky2->advertising &= ~(ADVERTISED_1000baseT_Half|ADVERTISED_1000baseT_Full);
842 sky2->flow_mode = FC_NONE;
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700843
844 spin_lock_bh(&sky2->phy_lock);
845 sky2_phy_power_up(hw, port);
846 sky2_phy_init(hw, port);
847 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemmingere3173832007-02-06 10:45:39 -0800848
849 sky2->flow_mode = save_mode;
850 sky2->advertising = ctrl;
851
852 /* Set GMAC to no flow control and auto update for speed/duplex */
853 gma_write16(hw, port, GM_GP_CTRL,
854 GM_GPCR_FC_TX_DIS|GM_GPCR_TX_ENA|GM_GPCR_RX_ENA|
855 GM_GPCR_DUP_FULL|GM_GPCR_FC_RX_DIS|GM_GPCR_AU_FCT_DIS);
856
857 /* Set WOL address */
858 memcpy_toio(hw->regs + WOL_REGS(port, WOL_MAC_ADDR),
859 sky2->netdev->dev_addr, ETH_ALEN);
860
861 /* Turn on appropriate WOL control bits */
862 sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), WOL_CTL_CLEAR_RESULT);
863 ctrl = 0;
864 if (sky2->wol & WAKE_PHY)
865 ctrl |= WOL_CTL_ENA_PME_ON_LINK_CHG|WOL_CTL_ENA_LINK_CHG_UNIT;
866 else
867 ctrl |= WOL_CTL_DIS_PME_ON_LINK_CHG|WOL_CTL_DIS_LINK_CHG_UNIT;
868
869 if (sky2->wol & WAKE_MAGIC)
870 ctrl |= WOL_CTL_ENA_PME_ON_MAGIC_PKT|WOL_CTL_ENA_MAGIC_PKT_UNIT;
871 else
Joe Perchesa419aef2009-08-18 11:18:35 -0700872 ctrl |= WOL_CTL_DIS_PME_ON_MAGIC_PKT|WOL_CTL_DIS_MAGIC_PKT_UNIT;
Stephen Hemmingere3173832007-02-06 10:45:39 -0800873
874 ctrl |= WOL_CTL_DIS_PME_ON_PATTERN|WOL_CTL_DIS_PATTERN_UNIT;
875 sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), ctrl);
876
stephen hemminger5f8ae5c2010-02-12 06:57:59 +0000877 /* Disable PiG firmware */
878 sky2_write16(hw, B0_CTST, Y2_HW_WOL_OFF);
879
Stephen Hemmingere3173832007-02-06 10:45:39 -0800880 /* block receiver */
881 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
Stephen Hemmingere3173832007-02-06 10:45:39 -0800882}
883
Stephen Hemminger69161612007-06-04 17:23:26 -0700884static void sky2_set_tx_stfwd(struct sky2_hw *hw, unsigned port)
885{
Stephen Hemminger05745c42007-09-19 15:36:45 -0700886 struct net_device *dev = hw->dev[port];
887
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800888 if ( (hw->chip_id == CHIP_ID_YUKON_EX &&
889 hw->chip_rev != CHIP_REV_YU_EX_A0) ||
Stephen Hemminger877c8572009-10-29 06:37:08 +0000890 hw->chip_id >= CHIP_ID_YUKON_FE_P) {
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800891 /* Yukon-Extreme B0 and further Extreme devices */
stephen hemminger44dde562010-02-12 06:58:01 +0000892 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_ENA);
893 } else if (dev->mtu > ETH_DATA_LEN) {
894 /* set Tx GMAC FIFO Almost Empty Threshold */
895 sky2_write32(hw, SK_REG(port, TX_GMF_AE_THR),
896 (ECU_JUMBO_WM << 16) | ECU_AE_THR);
Stephen Hemminger69161612007-06-04 17:23:26 -0700897
stephen hemminger44dde562010-02-12 06:58:01 +0000898 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_DIS);
899 } else
900 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_ENA);
Stephen Hemminger69161612007-06-04 17:23:26 -0700901}
902
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700903static void sky2_mac_init(struct sky2_hw *hw, unsigned port)
904{
905 struct sky2_port *sky2 = netdev_priv(hw->dev[port]);
906 u16 reg;
Al Viro25cccec2007-07-20 16:07:33 +0100907 u32 rx_reg;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700908 int i;
909 const u8 *addr = hw->dev[port]->dev_addr;
910
Stephen Hemmingerf3503392007-08-21 11:10:22 -0700911 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);
912 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700913
914 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
915
stephen hemminger4b7c47a2010-03-29 07:36:19 +0000916 if (hw->chip_id == CHIP_ID_YUKON_XL &&
917 hw->chip_rev == CHIP_REV_YU_XL_A0 &&
918 port == 1) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700919 /* WA DEV_472 -- looks like crossed wires on port 2 */
920 /* clear GMAC 1 Control reset */
921 sky2_write8(hw, SK_REG(0, GMAC_CTRL), GMC_RST_CLR);
922 do {
923 sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_SET);
924 sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_CLR);
925 } while (gm_phy_read(hw, 1, PHY_MARV_ID0) != PHY_MARV_ID0_VAL ||
926 gm_phy_read(hw, 1, PHY_MARV_ID1) != PHY_MARV_ID1_Y2 ||
927 gm_phy_read(hw, 1, PHY_MARV_INT_MASK) != 0);
928 }
929
Stephen Hemminger793b8832005-09-14 16:06:14 -0700930 sky2_read16(hw, SK_REG(port, GMAC_IRQ_SRC));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700931
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700932 /* Enable Transmit FIFO Underrun */
933 sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), GMAC_DEF_MSK);
934
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800935 spin_lock_bh(&sky2->phy_lock);
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700936 sky2_phy_power_up(hw, port);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700937 sky2_phy_init(hw, port);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800938 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700939
940 /* MIB clear */
941 reg = gma_read16(hw, port, GM_PHY_ADDR);
942 gma_write16(hw, port, GM_PHY_ADDR, reg | GM_PAR_MIB_CLR);
943
Stephen Hemminger43f2f102006-04-05 17:47:15 -0700944 for (i = GM_MIB_CNT_BASE; i <= GM_MIB_CNT_END; i += 4)
945 gma_read16(hw, port, i);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700946 gma_write16(hw, port, GM_PHY_ADDR, reg);
947
948 /* transmit control */
949 gma_write16(hw, port, GM_TX_CTRL, TX_COL_THR(TX_COL_DEF));
950
951 /* receive control reg: unicast + multicast + no FCS */
952 gma_write16(hw, port, GM_RX_CTRL,
Stephen Hemminger793b8832005-09-14 16:06:14 -0700953 GM_RXCR_UCF_ENA | GM_RXCR_CRC_DIS | GM_RXCR_MCF_ENA);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700954
955 /* transmit flow control */
956 gma_write16(hw, port, GM_TX_FLOW_CTRL, 0xffff);
957
958 /* transmit parameter */
959 gma_write16(hw, port, GM_TX_PARAM,
960 TX_JAM_LEN_VAL(TX_JAM_LEN_DEF) |
961 TX_JAM_IPG_VAL(TX_JAM_IPG_DEF) |
962 TX_IPG_JAM_DATA(TX_IPG_JAM_DEF) |
963 TX_BACK_OFF_LIM(TX_BOF_LIM_DEF));
964
965 /* serial mode register */
966 reg = DATA_BLIND_VAL(DATA_BLIND_DEF) |
stephen hemminger8e116802011-07-07 05:50:58 +0000967 GM_SMOD_VLAN_ENA | IPG_DATA_VAL(IPG_DATA_DEF_1000);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700968
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -0700969 if (hw->dev[port]->mtu > ETH_DATA_LEN)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700970 reg |= GM_SMOD_JUMBO_ENA;
971
stephen hemmingerc1cd0a82010-03-29 07:36:18 +0000972 if (hw->chip_id == CHIP_ID_YUKON_EC_U &&
973 hw->chip_rev == CHIP_REV_YU_EC_U_B1)
974 reg |= GM_NEW_FLOW_CTRL;
975
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700976 gma_write16(hw, port, GM_SERIAL_MODE, reg);
977
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700978 /* virtual address for data */
979 gma_set_addr(hw, port, GM_SRC_ADDR_2L, addr);
980
Stephen Hemminger793b8832005-09-14 16:06:14 -0700981 /* physical address: used for pause frames */
982 gma_set_addr(hw, port, GM_SRC_ADDR_1L, addr);
983
984 /* ignore counter overflows */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700985 gma_write16(hw, port, GM_TX_IRQ_MSK, 0);
986 gma_write16(hw, port, GM_RX_IRQ_MSK, 0);
987 gma_write16(hw, port, GM_TR_IRQ_MSK, 0);
988
989 /* Configure Rx MAC FIFO */
990 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_CLR);
Al Viro25cccec2007-07-20 16:07:33 +0100991 rx_reg = GMF_OPER_ON | GMF_RX_F_FL_ON;
Stephen Hemminger05745c42007-09-19 15:36:45 -0700992 if (hw->chip_id == CHIP_ID_YUKON_EX ||
993 hw->chip_id == CHIP_ID_YUKON_FE_P)
Al Viro25cccec2007-07-20 16:07:33 +0100994 rx_reg |= GMF_RX_OVER_ON;
Stephen Hemminger69161612007-06-04 17:23:26 -0700995
Al Viro25cccec2007-07-20 16:07:33 +0100996 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), rx_reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700997
Stephen Hemminger798fdd02007-12-07 15:22:15 -0800998 if (hw->chip_id == CHIP_ID_YUKON_XL) {
999 /* Hardware errata - clear flush mask */
1000 sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), 0);
1001 } else {
1002 /* Flush Rx MAC FIFO on any flow control or error */
1003 sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), GMR_FS_ANY_ERR);
1004 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001005
Stephen Hemminger8df9a872006-12-01 14:29:35 -08001006 /* Set threshold to 0xa (64 bytes) + 1 to workaround pause bug */
Stephen Hemminger05745c42007-09-19 15:36:45 -07001007 reg = RX_GMF_FL_THR_DEF + 1;
1008 /* Another magic mystery workaround from sk98lin */
1009 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
1010 hw->chip_rev == CHIP_REV_YU_FE2_A0)
1011 reg = 0x178;
1012 sky2_write16(hw, SK_REG(port, RX_GMF_FL_THR), reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001013
1014 /* Configure Tx MAC FIFO */
1015 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_CLR);
1016 sky2_write16(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_OPER_ON);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08001017
Lucas De Marchi25985ed2011-03-30 22:57:33 -03001018 /* On chips without ram buffer, pause is controlled by MAC level */
Stephen Hemminger39dbd952008-02-04 19:45:13 -08001019 if (!(hw->flags & SKY2_HW_RAM_BUFFER)) {
Stephen Hemmingerd6b54d22009-10-29 06:37:07 +00001020 /* Pause threshold is scaled by 8 in bytes */
Joe Perches8e95a202009-12-03 07:58:21 +00001021 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
1022 hw->chip_rev == CHIP_REV_YU_FE2_A0)
Stephen Hemmingerd6b54d22009-10-29 06:37:07 +00001023 reg = 1568 / 8;
1024 else
1025 reg = 1024 / 8;
1026 sky2_write16(hw, SK_REG(port, RX_GMF_UP_THR), reg);
1027 sky2_write16(hw, SK_REG(port, RX_GMF_LP_THR), 768 / 8);
Stephen Hemmingerb628ed982007-04-11 14:48:01 -07001028
Stephen Hemminger69161612007-06-04 17:23:26 -07001029 sky2_set_tx_stfwd(hw, port);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08001030 }
1031
Stephen Hemmingere970d1f2007-11-27 11:02:07 -08001032 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
1033 hw->chip_rev == CHIP_REV_YU_FE2_A0) {
1034 /* disable dynamic watermark */
1035 reg = sky2_read16(hw, SK_REG(port, TX_GMF_EA));
1036 reg &= ~TX_DYN_WM_ENA;
1037 sky2_write16(hw, SK_REG(port, TX_GMF_EA), reg);
1038 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001039}
1040
Stephen Hemminger67712902006-12-04 15:53:45 -08001041/* Assign Ram Buffer allocation to queue */
1042static void sky2_ramset(struct sky2_hw *hw, u16 q, u32 start, u32 space)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001043{
Stephen Hemminger67712902006-12-04 15:53:45 -08001044 u32 end;
1045
1046 /* convert from K bytes to qwords used for hw register */
1047 start *= 1024/8;
1048 space *= 1024/8;
1049 end = start + space - 1;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001050
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001051 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_RST_CLR);
1052 sky2_write32(hw, RB_ADDR(q, RB_START), start);
1053 sky2_write32(hw, RB_ADDR(q, RB_END), end);
1054 sky2_write32(hw, RB_ADDR(q, RB_WP), start);
1055 sky2_write32(hw, RB_ADDR(q, RB_RP), start);
1056
1057 if (q == Q_R1 || q == Q_R2) {
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -08001058 u32 tp = space - space/4;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001059
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -08001060 /* On receive queue's set the thresholds
1061 * give receiver priority when > 3/4 full
1062 * send pause when down to 2K
1063 */
1064 sky2_write32(hw, RB_ADDR(q, RB_RX_UTHP), tp);
1065 sky2_write32(hw, RB_ADDR(q, RB_RX_LTHP), space/2);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001066
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -08001067 tp = space - 2048/8;
1068 sky2_write32(hw, RB_ADDR(q, RB_RX_UTPP), tp);
1069 sky2_write32(hw, RB_ADDR(q, RB_RX_LTPP), space/4);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001070 } else {
1071 /* Enable store & forward on Tx queue's because
1072 * Tx FIFO is only 1K on Yukon
1073 */
1074 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_STFWD);
1075 }
1076
1077 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_OP_MD);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001078 sky2_read8(hw, RB_ADDR(q, RB_CTRL));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001079}
1080
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001081/* Setup Bus Memory Interface */
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -08001082static void sky2_qset(struct sky2_hw *hw, u16 q)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001083{
1084 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_RESET);
1085 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_OPER_INIT);
1086 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_FIFO_OP_ON);
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -08001087 sky2_write32(hw, Q_ADDR(q, Q_WM), BMU_WM_DEFAULT);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001088}
1089
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001090/* Setup prefetch unit registers. This is the interface between
1091 * hardware and driver list elements
1092 */
Stephen Hemminger8cc048e2005-12-09 11:35:07 -08001093static void sky2_prefetch_init(struct sky2_hw *hw, u32 qaddr,
Stephen Hemmingerd6e74b62009-08-18 15:17:05 +00001094 dma_addr_t addr, u32 last)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001095{
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001096 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_RST_SET);
1097 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_RST_CLR);
Stephen Hemmingerd6e74b62009-08-18 15:17:05 +00001098 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_ADDR_HI), upper_32_bits(addr));
1099 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_ADDR_LO), lower_32_bits(addr));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001100 sky2_write16(hw, Y2_QADDR(qaddr, PREF_UNIT_LAST_IDX), last);
1101 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_OP_ON);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001102
1103 sky2_read32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001104}
1105
Mike McCormack9b289c32009-08-14 05:15:12 +00001106static inline struct sky2_tx_le *get_tx_le(struct sky2_port *sky2, u16 *slot)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001107{
Mike McCormack9b289c32009-08-14 05:15:12 +00001108 struct sky2_tx_le *le = sky2->tx_le + *slot;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001109
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001110 *slot = RING_NEXT(*slot, sky2->tx_ring_size);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001111 le->ctrl = 0;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001112 return le;
1113}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001114
Stephen Hemminger88f5f0c2007-09-27 12:38:12 -07001115static void tx_init(struct sky2_port *sky2)
1116{
1117 struct sky2_tx_le *le;
1118
1119 sky2->tx_prod = sky2->tx_cons = 0;
1120 sky2->tx_tcpsum = 0;
1121 sky2->tx_last_mss = 0;
1122
Mike McCormack9b289c32009-08-14 05:15:12 +00001123 le = get_tx_le(sky2, &sky2->tx_prod);
Stephen Hemminger88f5f0c2007-09-27 12:38:12 -07001124 le->addr = 0;
1125 le->opcode = OP_ADDR64 | HW_OWNER;
Stephen Hemminger5dce95e2009-08-18 15:17:06 +00001126 sky2->tx_last_upper = 0;
Stephen Hemminger88f5f0c2007-09-27 12:38:12 -07001127}
1128
Stephen Hemminger290d4de2006-03-20 15:48:15 -08001129/* Update chip's next pointer */
1130static inline void sky2_put_idx(struct sky2_hw *hw, unsigned q, u16 idx)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001131{
Stephen Hemminger50432cb2007-05-14 12:38:15 -07001132 /* Make sure write' to descriptors are complete before we tell hardware */
Stephen Hemminger762c2de2006-01-17 13:43:14 -08001133 wmb();
Stephen Hemminger50432cb2007-05-14 12:38:15 -07001134 sky2_write16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX), idx);
1135
1136 /* Synchronize I/O on since next processor may write to tail */
1137 mmiowb();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001138}
1139
Stephen Hemminger793b8832005-09-14 16:06:14 -07001140
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001141static inline struct sky2_rx_le *sky2_next_rx(struct sky2_port *sky2)
1142{
1143 struct sky2_rx_le *le = sky2->rx_le + sky2->rx_put;
Stephen Hemmingercb5d9542006-05-08 15:11:29 -07001144 sky2->rx_put = RING_NEXT(sky2->rx_put, RX_LE_SIZE);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001145 le->ctrl = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001146 return le;
1147}
1148
Mike McCormack060b9462010-07-29 03:34:52 +00001149static unsigned sky2_get_rx_threshold(struct sky2_port *sky2)
Mike McCormack39ef1102010-02-12 06:58:02 +00001150{
1151 unsigned size;
1152
1153 /* Space needed for frame data + headers rounded up */
1154 size = roundup(sky2->netdev->mtu + ETH_HLEN + VLAN_HLEN, 8);
1155
1156 /* Stopping point for hardware truncation */
1157 return (size - 8) / sizeof(u32);
1158}
1159
Mike McCormack060b9462010-07-29 03:34:52 +00001160static unsigned sky2_get_rx_data_size(struct sky2_port *sky2)
Mike McCormack39ef1102010-02-12 06:58:02 +00001161{
1162 struct rx_ring_info *re;
1163 unsigned size;
1164
1165 /* Space needed for frame data + headers rounded up */
1166 size = roundup(sky2->netdev->mtu + ETH_HLEN + VLAN_HLEN, 8);
1167
1168 sky2->rx_nfrags = size >> PAGE_SHIFT;
1169 BUG_ON(sky2->rx_nfrags > ARRAY_SIZE(re->frag_addr));
1170
1171 /* Compute residue after pages */
1172 size -= sky2->rx_nfrags << PAGE_SHIFT;
1173
1174 /* Optimize to handle small packets and headers */
1175 if (size < copybreak)
1176 size = copybreak;
1177 if (size < ETH_HLEN)
1178 size = ETH_HLEN;
1179
1180 return size;
1181}
1182
Stephen Hemminger14d02632006-09-26 11:57:43 -07001183/* Build description to hardware for one receive segment */
Mike McCormack060b9462010-07-29 03:34:52 +00001184static void sky2_rx_add(struct sky2_port *sky2, u8 op,
Stephen Hemminger14d02632006-09-26 11:57:43 -07001185 dma_addr_t map, unsigned len)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001186{
1187 struct sky2_rx_le *le;
1188
Stephen Hemminger86c68872008-01-10 16:14:12 -08001189 if (sizeof(dma_addr_t) > sizeof(u32)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001190 le = sky2_next_rx(sky2);
Stephen Hemminger86c68872008-01-10 16:14:12 -08001191 le->addr = cpu_to_le32(upper_32_bits(map));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001192 le->opcode = OP_ADDR64 | HW_OWNER;
1193 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001194
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001195 le = sky2_next_rx(sky2);
Stephen Hemmingerd6e74b62009-08-18 15:17:05 +00001196 le->addr = cpu_to_le32(lower_32_bits(map));
Stephen Hemminger734d1862005-12-09 11:35:00 -08001197 le->length = cpu_to_le16(len);
Stephen Hemminger14d02632006-09-26 11:57:43 -07001198 le->opcode = op | HW_OWNER;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001199}
1200
Stephen Hemminger14d02632006-09-26 11:57:43 -07001201/* Build description to hardware for one possibly fragmented skb */
1202static void sky2_rx_submit(struct sky2_port *sky2,
1203 const struct rx_ring_info *re)
1204{
1205 int i;
1206
1207 sky2_rx_add(sky2, OP_PACKET, re->data_addr, sky2->rx_data_size);
1208
1209 for (i = 0; i < skb_shinfo(re->skb)->nr_frags; i++)
1210 sky2_rx_add(sky2, OP_BUFFER, re->frag_addr[i], PAGE_SIZE);
1211}
1212
1213
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001214static int sky2_rx_map_skb(struct pci_dev *pdev, struct rx_ring_info *re,
Stephen Hemminger14d02632006-09-26 11:57:43 -07001215 unsigned size)
1216{
1217 struct sk_buff *skb = re->skb;
1218 int i;
1219
1220 re->data_addr = pci_map_single(pdev, skb->data, size, PCI_DMA_FROMDEVICE);
stephen hemminger3fbd9182010-02-01 13:45:41 +00001221 if (pci_dma_mapping_error(pdev, re->data_addr))
1222 goto mapping_error;
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001223
FUJITA Tomonori7cd26ce2010-04-27 14:57:05 +00001224 dma_unmap_len_set(re, data_size, size);
Stephen Hemminger14d02632006-09-26 11:57:43 -07001225
stephen hemminger3fbd9182010-02-01 13:45:41 +00001226 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1227 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1228
1229 re->frag_addr[i] = pci_map_page(pdev, frag->page,
1230 frag->page_offset,
1231 frag->size,
Stephen Hemminger14d02632006-09-26 11:57:43 -07001232 PCI_DMA_FROMDEVICE);
stephen hemminger3fbd9182010-02-01 13:45:41 +00001233
1234 if (pci_dma_mapping_error(pdev, re->frag_addr[i]))
1235 goto map_page_error;
1236 }
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001237 return 0;
stephen hemminger3fbd9182010-02-01 13:45:41 +00001238
1239map_page_error:
1240 while (--i >= 0) {
1241 pci_unmap_page(pdev, re->frag_addr[i],
1242 skb_shinfo(skb)->frags[i].size,
1243 PCI_DMA_FROMDEVICE);
1244 }
1245
FUJITA Tomonori7cd26ce2010-04-27 14:57:05 +00001246 pci_unmap_single(pdev, re->data_addr, dma_unmap_len(re, data_size),
stephen hemminger3fbd9182010-02-01 13:45:41 +00001247 PCI_DMA_FROMDEVICE);
1248
1249mapping_error:
1250 if (net_ratelimit())
1251 dev_warn(&pdev->dev, "%s: rx mapping error\n",
1252 skb->dev->name);
1253 return -EIO;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001254}
1255
1256static void sky2_rx_unmap_skb(struct pci_dev *pdev, struct rx_ring_info *re)
1257{
1258 struct sk_buff *skb = re->skb;
1259 int i;
1260
FUJITA Tomonori7cd26ce2010-04-27 14:57:05 +00001261 pci_unmap_single(pdev, re->data_addr, dma_unmap_len(re, data_size),
Stephen Hemminger14d02632006-09-26 11:57:43 -07001262 PCI_DMA_FROMDEVICE);
1263
1264 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++)
1265 pci_unmap_page(pdev, re->frag_addr[i],
1266 skb_shinfo(skb)->frags[i].size,
1267 PCI_DMA_FROMDEVICE);
1268}
Stephen Hemminger793b8832005-09-14 16:06:14 -07001269
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001270/* Tell chip where to start receive checksum.
1271 * Actually has two checksums, but set both same to avoid possible byte
1272 * order problems.
1273 */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001274static void rx_set_checksum(struct sky2_port *sky2)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001275{
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001276 struct sky2_rx_le *le = sky2_next_rx(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001277
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001278 le->addr = cpu_to_le32((ETH_HLEN << 16) | ETH_HLEN);
1279 le->ctrl = 0;
1280 le->opcode = OP_TCPSTART | HW_OWNER;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001281
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001282 sky2_write32(sky2->hw,
1283 Q_ADDR(rxqaddr[sky2->port], Q_CSR),
Michał Mirosławf5d64032011-04-10 03:13:21 +00001284 (sky2->netdev->features & NETIF_F_RXCSUM)
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07001285 ? BMU_ENA_RX_CHKSUM : BMU_DIS_RX_CHKSUM);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001286}
1287
Stephen Hemmingerbf731302010-04-24 20:04:12 -07001288/* Enable/disable receive hash calculation (RSS) */
Michał Mirosławf5d64032011-04-10 03:13:21 +00001289static void rx_set_rss(struct net_device *dev, u32 features)
Stephen Hemmingerbf731302010-04-24 20:04:12 -07001290{
1291 struct sky2_port *sky2 = netdev_priv(dev);
1292 struct sky2_hw *hw = sky2->hw;
1293 int i, nkeys = 4;
1294
1295 /* Supports IPv6 and other modes */
1296 if (hw->flags & SKY2_HW_NEW_LE) {
1297 nkeys = 10;
1298 sky2_write32(hw, SK_REG(sky2->port, RSS_CFG), HASH_ALL);
1299 }
1300
1301 /* Program RSS initial values */
Michał Mirosławf5d64032011-04-10 03:13:21 +00001302 if (features & NETIF_F_RXHASH) {
Stephen Hemmingerbf731302010-04-24 20:04:12 -07001303 u32 key[nkeys];
1304
1305 get_random_bytes(key, nkeys * sizeof(u32));
1306 for (i = 0; i < nkeys; i++)
1307 sky2_write32(hw, SK_REG(sky2->port, RSS_KEY + i * 4),
1308 key[i]);
1309
1310 /* Need to turn on (undocumented) flag to make hashing work */
1311 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T),
1312 RX_STFW_ENA);
1313
1314 sky2_write32(hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
1315 BMU_ENA_RX_RSS_HASH);
1316 } else
1317 sky2_write32(hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
1318 BMU_DIS_RX_RSS_HASH);
1319}
1320
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001321/*
1322 * The RX Stop command will not work for Yukon-2 if the BMU does not
1323 * reach the end of packet and since we can't make sure that we have
1324 * incoming data, we must reset the BMU while it is not doing a DMA
1325 * transfer. Since it is possible that the RX path is still active,
1326 * the RX RAM buffer will be stopped first, so any possible incoming
1327 * data will not trigger a DMA. After the RAM buffer is stopped, the
1328 * BMU is polled until any DMA in progress is ended and only then it
1329 * will be reset.
1330 */
1331static void sky2_rx_stop(struct sky2_port *sky2)
1332{
1333 struct sky2_hw *hw = sky2->hw;
1334 unsigned rxq = rxqaddr[sky2->port];
1335 int i;
1336
1337 /* disable the RAM Buffer receive queue */
1338 sky2_write8(hw, RB_ADDR(rxq, RB_CTRL), RB_DIS_OP_MD);
1339
1340 for (i = 0; i < 0xffff; i++)
1341 if (sky2_read8(hw, RB_ADDR(rxq, Q_RSL))
1342 == sky2_read8(hw, RB_ADDR(rxq, Q_RL)))
1343 goto stopped;
1344
Joe Perchesada1db52010-02-17 15:01:59 +00001345 netdev_warn(sky2->netdev, "receiver stop failed\n");
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001346stopped:
1347 sky2_write32(hw, Q_ADDR(rxq, Q_CSR), BMU_RST_SET | BMU_FIFO_RST);
1348
1349 /* reset the Rx prefetch unit */
1350 sky2_write32(hw, Y2_QADDR(rxq, PREF_UNIT_CTRL), PREF_UNIT_RST_SET);
Stephen Hemminger3d1454dd2009-07-16 13:20:57 +00001351 mmiowb();
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001352}
Stephen Hemminger793b8832005-09-14 16:06:14 -07001353
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07001354/* Clean out receive buffer area, assumes receiver hardware stopped */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001355static void sky2_rx_clean(struct sky2_port *sky2)
1356{
1357 unsigned i;
1358
1359 memset(sky2->rx_le, 0, RX_LE_BYTES);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001360 for (i = 0; i < sky2->rx_pending; i++) {
Stephen Hemminger291ea612006-09-26 11:57:41 -07001361 struct rx_ring_info *re = sky2->rx_ring + i;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001362
1363 if (re->skb) {
Stephen Hemminger14d02632006-09-26 11:57:43 -07001364 sky2_rx_unmap_skb(sky2->hw->pdev, re);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001365 kfree_skb(re->skb);
1366 re->skb = NULL;
1367 }
1368 }
1369}
1370
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001371/* Basic MII support */
1372static int sky2_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1373{
1374 struct mii_ioctl_data *data = if_mii(ifr);
1375 struct sky2_port *sky2 = netdev_priv(dev);
1376 struct sky2_hw *hw = sky2->hw;
1377 int err = -EOPNOTSUPP;
1378
1379 if (!netif_running(dev))
1380 return -ENODEV; /* Phy still in reset */
1381
Stephen Hemmingerd89e1342006-03-20 15:48:20 -08001382 switch (cmd) {
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001383 case SIOCGMIIPHY:
1384 data->phy_id = PHY_ADDR_MARV;
1385
1386 /* fallthru */
1387 case SIOCGMIIREG: {
1388 u16 val = 0;
Stephen Hemminger91c86df2005-12-09 11:34:57 -08001389
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001390 spin_lock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001391 err = __gm_phy_read(hw, sky2->port, data->reg_num & 0x1f, &val);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001392 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemminger91c86df2005-12-09 11:34:57 -08001393
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001394 data->val_out = val;
1395 break;
1396 }
1397
1398 case SIOCSMIIREG:
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001399 spin_lock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001400 err = gm_phy_write(hw, sky2->port, data->reg_num & 0x1f,
1401 data->val_in);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001402 spin_unlock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001403 break;
1404 }
1405 return err;
1406}
1407
Michał Mirosławf5d64032011-04-10 03:13:21 +00001408#define SKY2_VLAN_OFFLOADS (NETIF_F_IP_CSUM | NETIF_F_SG | NETIF_F_TSO)
Stephen Hemmingerd494eac2008-05-14 17:04:13 -07001409
Michał Mirosławf5d64032011-04-10 03:13:21 +00001410static void sky2_vlan_mode(struct net_device *dev, u32 features)
Stephen Hemmingerd494eac2008-05-14 17:04:13 -07001411{
1412 struct sky2_port *sky2 = netdev_priv(dev);
1413 struct sky2_hw *hw = sky2->hw;
1414 u16 port = sky2->port;
1415
Michał Mirosławf5d64032011-04-10 03:13:21 +00001416 if (features & NETIF_F_HW_VLAN_RX)
Stephen Hemminger86aa7782011-01-09 15:54:15 -08001417 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T),
1418 RX_VLAN_STRIP_ON);
1419 else
1420 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T),
1421 RX_VLAN_STRIP_OFF);
Stephen Hemmingerd494eac2008-05-14 17:04:13 -07001422
Michał Mirosławf5d64032011-04-10 03:13:21 +00001423 if (features & NETIF_F_HW_VLAN_TX) {
Stephen Hemminger86aa7782011-01-09 15:54:15 -08001424 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
1425 TX_VLAN_TAG_ON);
Michał Mirosławf5d64032011-04-10 03:13:21 +00001426
1427 dev->vlan_features |= SKY2_VLAN_OFFLOADS;
1428 } else {
Stephen Hemminger86aa7782011-01-09 15:54:15 -08001429 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
1430 TX_VLAN_TAG_OFF);
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001431
Stephen Hemminger86aa7782011-01-09 15:54:15 -08001432 /* Can't do transmit offload of vlan without hw vlan */
Michał Mirosławf5d64032011-04-10 03:13:21 +00001433 dev->vlan_features &= ~SKY2_VLAN_OFFLOADS;
Stephen Hemminger86aa7782011-01-09 15:54:15 -08001434 }
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001435}
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001436
Stephen Hemmingerbd1c6862009-06-17 07:30:38 +00001437/* Amount of required worst case padding in rx buffer */
1438static inline unsigned sky2_rx_pad(const struct sky2_hw *hw)
1439{
1440 return (hw->flags & SKY2_HW_RAM_BUFFER) ? 8 : 2;
1441}
1442
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001443/*
Stephen Hemminger14d02632006-09-26 11:57:43 -07001444 * Allocate an skb for receiving. If the MTU is large enough
1445 * make the skb non-linear with a fragment list of pages.
Stephen Hemminger82788c72006-01-17 13:43:10 -08001446 */
Eric Dumazet68ac3192011-07-07 06:13:32 -07001447static struct sk_buff *sky2_rx_alloc(struct sky2_port *sky2, gfp_t gfp)
Stephen Hemminger82788c72006-01-17 13:43:10 -08001448{
1449 struct sk_buff *skb;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001450 int i;
Stephen Hemminger82788c72006-01-17 13:43:10 -08001451
Eric Dumazet68ac3192011-07-07 06:13:32 -07001452 skb = __netdev_alloc_skb(sky2->netdev,
1453 sky2->rx_data_size + sky2_rx_pad(sky2->hw),
1454 gfp);
Stephen Hemmingerbd1c6862009-06-17 07:30:38 +00001455 if (!skb)
1456 goto nomem;
1457
Stephen Hemminger39dbd952008-02-04 19:45:13 -08001458 if (sky2->hw->flags & SKY2_HW_RAM_BUFFER) {
Stephen Hemmingerf03b8652007-11-28 14:27:03 -08001459 unsigned char *start;
1460 /*
1461 * Workaround for a bug in FIFO that cause hang
1462 * if the FIFO if the receive buffer is not 64 byte aligned.
1463 * The buffer returned from netdev_alloc_skb is
1464 * aligned except if slab debugging is enabled.
1465 */
Stephen Hemmingerf03b8652007-11-28 14:27:03 -08001466 start = PTR_ALIGN(skb->data, 8);
1467 skb_reserve(skb, start - skb->data);
Stephen Hemmingerbd1c6862009-06-17 07:30:38 +00001468 } else
Stephen Hemmingerf03b8652007-11-28 14:27:03 -08001469 skb_reserve(skb, NET_IP_ALIGN);
Stephen Hemminger14d02632006-09-26 11:57:43 -07001470
1471 for (i = 0; i < sky2->rx_nfrags; i++) {
Eric Dumazet68ac3192011-07-07 06:13:32 -07001472 struct page *page = alloc_page(gfp);
Stephen Hemminger14d02632006-09-26 11:57:43 -07001473
1474 if (!page)
1475 goto free_partial;
1476 skb_fill_page_desc(skb, i, page, 0, PAGE_SIZE);
Stephen Hemminger82788c72006-01-17 13:43:10 -08001477 }
1478
1479 return skb;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001480free_partial:
1481 kfree_skb(skb);
1482nomem:
1483 return NULL;
Stephen Hemminger82788c72006-01-17 13:43:10 -08001484}
1485
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07001486static inline void sky2_rx_update(struct sky2_port *sky2, unsigned rxq)
1487{
1488 sky2_put_idx(sky2->hw, rxq, sky2->rx_put);
1489}
1490
Mike McCormack200ac4922010-02-12 06:58:03 +00001491static int sky2_alloc_rx_skbs(struct sky2_port *sky2)
1492{
1493 struct sky2_hw *hw = sky2->hw;
1494 unsigned i;
1495
1496 sky2->rx_data_size = sky2_get_rx_data_size(sky2);
1497
1498 /* Fill Rx ring */
1499 for (i = 0; i < sky2->rx_pending; i++) {
1500 struct rx_ring_info *re = sky2->rx_ring + i;
1501
Eric Dumazet68ac3192011-07-07 06:13:32 -07001502 re->skb = sky2_rx_alloc(sky2, GFP_KERNEL);
Mike McCormack200ac4922010-02-12 06:58:03 +00001503 if (!re->skb)
1504 return -ENOMEM;
1505
1506 if (sky2_rx_map_skb(hw->pdev, re, sky2->rx_data_size)) {
1507 dev_kfree_skb(re->skb);
1508 re->skb = NULL;
1509 return -ENOMEM;
1510 }
1511 }
1512 return 0;
1513}
1514
Stephen Hemminger82788c72006-01-17 13:43:10 -08001515/*
Mike McCormack200ac4922010-02-12 06:58:03 +00001516 * Setup receiver buffer pool.
Stephen Hemminger14d02632006-09-26 11:57:43 -07001517 * Normal case this ends up creating one list element for skb
1518 * in the receive ring. Worst case if using large MTU and each
1519 * allocation falls on a different 64 bit region, that results
1520 * in 6 list elements per ring entry.
1521 * One element is used for checksum enable/disable, and one
1522 * extra to avoid wrap.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001523 */
Mike McCormack200ac4922010-02-12 06:58:03 +00001524static void sky2_rx_start(struct sky2_port *sky2)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001525{
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001526 struct sky2_hw *hw = sky2->hw;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001527 struct rx_ring_info *re;
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001528 unsigned rxq = rxqaddr[sky2->port];
Mike McCormack39ef1102010-02-12 06:58:02 +00001529 unsigned i, thresh;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001530
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001531 sky2->rx_put = sky2->rx_next = 0;
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -08001532 sky2_qset(hw, rxq);
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001533
Stephen Hemmingerc3905bc42006-12-04 17:08:19 -08001534 /* On PCI express lowering the watermark gives better performance */
Jon Mason1a10cca2011-06-27 07:46:56 +00001535 if (pci_is_pcie(hw->pdev))
Stephen Hemmingerc3905bc42006-12-04 17:08:19 -08001536 sky2_write32(hw, Q_ADDR(rxq, Q_WM), BMU_WM_PEX);
1537
1538 /* These chips have no ram buffer?
1539 * MAC Rx RAM Read is controlled by hardware */
Stephen Hemminger8df9a872006-12-01 14:29:35 -08001540 if (hw->chip_id == CHIP_ID_YUKON_EC_U &&
stephen hemmingerc1cd0a82010-03-29 07:36:18 +00001541 hw->chip_rev > CHIP_REV_YU_EC_U_A0)
Stephen Hemmingerf449c7c2007-06-04 17:23:23 -07001542 sky2_write32(hw, Q_ADDR(rxq, Q_TEST), F_M_RX_RAM_DIS);
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001543
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001544 sky2_prefetch_init(hw, rxq, sky2->rx_le_map, RX_LE_SIZE - 1);
1545
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001546 if (!(hw->flags & SKY2_HW_NEW_LE))
1547 rx_set_checksum(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001548
Stephen Hemmingerbf731302010-04-24 20:04:12 -07001549 if (!(hw->flags & SKY2_HW_RSS_BROKEN))
Michał Mirosławf5d64032011-04-10 03:13:21 +00001550 rx_set_rss(sky2->netdev, sky2->netdev->features);
Stephen Hemmingerbf731302010-04-24 20:04:12 -07001551
Mike McCormack200ac4922010-02-12 06:58:03 +00001552 /* submit Rx ring */
Stephen Hemminger14d02632006-09-26 11:57:43 -07001553 for (i = 0; i < sky2->rx_pending; i++) {
1554 re = sky2->rx_ring + i;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001555 sky2_rx_submit(sky2, re);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001556 }
1557
Stephen Hemmingera1433ac2006-05-22 12:03:42 -07001558 /*
1559 * The receiver hangs if it receives frames larger than the
1560 * packet buffer. As a workaround, truncate oversize frames, but
1561 * the register is limited to 9 bits, so if you do frames > 2052
1562 * you better get the MTU right!
1563 */
Mike McCormack39ef1102010-02-12 06:58:02 +00001564 thresh = sky2_get_rx_threshold(sky2);
Stephen Hemmingera1433ac2006-05-22 12:03:42 -07001565 if (thresh > 0x1ff)
1566 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_OFF);
1567 else {
1568 sky2_write16(hw, SK_REG(sky2->port, RX_GMF_TR_THR), thresh);
1569 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_ON);
1570 }
1571
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001572 /* Tell chip about available buffers */
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07001573 sky2_rx_update(sky2, rxq);
Stephen Hemminger877c8572009-10-29 06:37:08 +00001574
1575 if (hw->chip_id == CHIP_ID_YUKON_EX ||
1576 hw->chip_id == CHIP_ID_YUKON_SUPR) {
1577 /*
1578 * Disable flushing of non ASF packets;
1579 * must be done after initializing the BMUs;
1580 * drivers without ASF support should do this too, otherwise
1581 * it may happen that they cannot run on ASF devices;
1582 * remember that the MAC FIFO isn't reset during initialization.
1583 */
1584 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_MACSEC_FLUSH_OFF);
1585 }
1586
1587 if (hw->chip_id >= CHIP_ID_YUKON_SUPR) {
1588 /* Enable RX Home Address & Routing Header checksum fix */
1589 sky2_write16(hw, SK_REG(sky2->port, RX_GMF_FL_CTRL),
1590 RX_IPV6_SA_MOB_ENA | RX_IPV6_DA_MOB_ENA);
1591
1592 /* Enable TX Home Address & Routing Header checksum fix */
1593 sky2_write32(hw, Q_ADDR(txqaddr[sky2->port], Q_TEST),
1594 TBMU_TEST_HOME_ADD_FIX_EN | TBMU_TEST_ROUTING_ADD_FIX_EN);
1595 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001596}
1597
Mike McCormack90bbebb2009-09-01 03:21:35 +00001598static int sky2_alloc_buffers(struct sky2_port *sky2)
1599{
1600 struct sky2_hw *hw = sky2->hw;
1601
1602 /* must be power of 2 */
1603 sky2->tx_le = pci_alloc_consistent(hw->pdev,
1604 sky2->tx_ring_size *
1605 sizeof(struct sky2_tx_le),
1606 &sky2->tx_le_map);
1607 if (!sky2->tx_le)
1608 goto nomem;
1609
1610 sky2->tx_ring = kcalloc(sky2->tx_ring_size, sizeof(struct tx_ring_info),
1611 GFP_KERNEL);
1612 if (!sky2->tx_ring)
1613 goto nomem;
1614
1615 sky2->rx_le = pci_alloc_consistent(hw->pdev, RX_LE_BYTES,
1616 &sky2->rx_le_map);
1617 if (!sky2->rx_le)
1618 goto nomem;
1619 memset(sky2->rx_le, 0, RX_LE_BYTES);
1620
1621 sky2->rx_ring = kcalloc(sky2->rx_pending, sizeof(struct rx_ring_info),
1622 GFP_KERNEL);
1623 if (!sky2->rx_ring)
1624 goto nomem;
1625
Mike McCormack200ac4922010-02-12 06:58:03 +00001626 return sky2_alloc_rx_skbs(sky2);
Mike McCormack90bbebb2009-09-01 03:21:35 +00001627nomem:
1628 return -ENOMEM;
1629}
1630
1631static void sky2_free_buffers(struct sky2_port *sky2)
1632{
1633 struct sky2_hw *hw = sky2->hw;
1634
Mike McCormack200ac4922010-02-12 06:58:03 +00001635 sky2_rx_clean(sky2);
1636
Mike McCormack90bbebb2009-09-01 03:21:35 +00001637 if (sky2->rx_le) {
1638 pci_free_consistent(hw->pdev, RX_LE_BYTES,
1639 sky2->rx_le, sky2->rx_le_map);
1640 sky2->rx_le = NULL;
1641 }
1642 if (sky2->tx_le) {
1643 pci_free_consistent(hw->pdev,
1644 sky2->tx_ring_size * sizeof(struct sky2_tx_le),
1645 sky2->tx_le, sky2->tx_le_map);
1646 sky2->tx_le = NULL;
1647 }
1648 kfree(sky2->tx_ring);
1649 kfree(sky2->rx_ring);
1650
1651 sky2->tx_ring = NULL;
1652 sky2->rx_ring = NULL;
1653}
1654
Mike McCormackea0f71e2010-02-12 06:58:04 +00001655static void sky2_hw_up(struct sky2_port *sky2)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001656{
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001657 struct sky2_hw *hw = sky2->hw;
1658 unsigned port = sky2->port;
Mike McCormackea0f71e2010-02-12 06:58:04 +00001659 u32 ramsize;
1660 int cap;
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001661 struct net_device *otherdev = hw->dev[sky2->port^1];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001662
Mike McCormackea0f71e2010-02-12 06:58:04 +00001663 tx_init(sky2);
1664
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001665 /*
1666 * On dual port PCI-X card, there is an problem where status
1667 * can be received out of order due to split transactions
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001668 */
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001669 if (otherdev && netif_running(otherdev) &&
1670 (cap = pci_find_capability(hw->pdev, PCI_CAP_ID_PCIX))) {
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001671 u16 cmd;
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001672
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08001673 cmd = sky2_pci_read16(hw, cap + PCI_X_CMD);
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001674 cmd &= ~PCI_X_CMD_MAX_SPLIT;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08001675 sky2_pci_write16(hw, cap + PCI_X_CMD, cmd);
Mike McCormackea0f71e2010-02-12 06:58:04 +00001676 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001677
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001678 sky2_mac_init(hw, port);
1679
Stephen Hemmingere0c28112007-09-20 13:03:49 -07001680 /* Register is number of 4K blocks on internal RAM buffer. */
1681 ramsize = sky2_read8(hw, B2_E_0) * 4;
1682 if (ramsize > 0) {
Stephen Hemminger67712902006-12-04 15:53:45 -08001683 u32 rxspace;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001684
Joe Perchesada1db52010-02-17 15:01:59 +00001685 netdev_dbg(sky2->netdev, "ram buffer %dK\n", ramsize);
Stephen Hemminger67712902006-12-04 15:53:45 -08001686 if (ramsize < 16)
1687 rxspace = ramsize / 2;
1688 else
1689 rxspace = 8 + (2*(ramsize - 16))/3;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001690
Stephen Hemminger67712902006-12-04 15:53:45 -08001691 sky2_ramset(hw, rxqaddr[port], 0, rxspace);
1692 sky2_ramset(hw, txqaddr[port], rxspace, ramsize - rxspace);
1693
1694 /* Make sure SyncQ is disabled */
1695 sky2_write8(hw, RB_ADDR(port == 0 ? Q_XS1 : Q_XS2, RB_CTRL),
1696 RB_RST_SET);
1697 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001698
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -08001699 sky2_qset(hw, txqaddr[port]);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08001700
Stephen Hemminger69161612007-06-04 17:23:26 -07001701 /* This is copied from sk98lin 10.0.5.3; no one tells me about erratta's */
1702 if (hw->chip_id == CHIP_ID_YUKON_EX && hw->chip_rev == CHIP_REV_YU_EX_B0)
1703 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_TEST), F_TX_CHK_AUTO_OFF);
1704
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001705 /* Set almost empty threshold */
Joe Perches8e95a202009-12-03 07:58:21 +00001706 if (hw->chip_id == CHIP_ID_YUKON_EC_U &&
1707 hw->chip_rev == CHIP_REV_YU_EC_U_A0)
Stephen Hemmingerb628ed982007-04-11 14:48:01 -07001708 sky2_write16(hw, Q_ADDR(txqaddr[port], Q_AL), ECU_TXFF_LEV);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08001709
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001710 sky2_prefetch_init(hw, txqaddr[port], sky2->tx_le_map,
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001711 sky2->tx_ring_size - 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001712
Michał Mirosławf5d64032011-04-10 03:13:21 +00001713 sky2_vlan_mode(sky2->netdev, sky2->netdev->features);
1714 netdev_update_features(sky2->netdev);
Stephen Hemmingerd494eac2008-05-14 17:04:13 -07001715
Mike McCormack200ac4922010-02-12 06:58:03 +00001716 sky2_rx_start(sky2);
Mike McCormackea0f71e2010-02-12 06:58:04 +00001717}
1718
1719/* Bring up network interface. */
1720static int sky2_up(struct net_device *dev)
1721{
1722 struct sky2_port *sky2 = netdev_priv(dev);
1723 struct sky2_hw *hw = sky2->hw;
1724 unsigned port = sky2->port;
1725 u32 imask;
1726 int err;
1727
1728 netif_carrier_off(dev);
1729
1730 err = sky2_alloc_buffers(sky2);
1731 if (err)
1732 goto err_out;
1733
1734 sky2_hw_up(sky2);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001735
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001736 /* Enable interrupts from phy/mac for port */
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001737 imask = sky2_read32(hw, B0_IMSK);
Stephen Hemmingerf4ea4312006-05-09 14:46:54 -07001738 imask |= portirq_msk[port];
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001739 sky2_write32(hw, B0_IMSK, imask);
Stephen Hemminger1fd82f32009-06-17 07:30:34 +00001740 sky2_read32(hw, B0_IMSK);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001741
Joe Perches6c35aba2010-02-15 08:34:21 +00001742 netif_info(sky2, ifup, dev, "enabling interface\n");
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07001743
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001744 return 0;
1745
1746err_out:
Mike McCormack90bbebb2009-09-01 03:21:35 +00001747 sky2_free_buffers(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001748 return err;
1749}
1750
Stephen Hemminger793b8832005-09-14 16:06:14 -07001751/* Modular subtraction in ring */
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001752static inline int tx_inuse(const struct sky2_port *sky2)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001753{
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001754 return (sky2->tx_prod - sky2->tx_cons) & (sky2->tx_ring_size - 1);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001755}
1756
1757/* Number of list elements available for next tx */
1758static inline int tx_avail(const struct sky2_port *sky2)
1759{
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001760 return sky2->tx_pending - tx_inuse(sky2);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001761}
1762
1763/* Estimate of number of transmit list elements required */
Stephen Hemminger28bd1812006-01-17 13:43:19 -08001764static unsigned tx_le_req(const struct sk_buff *skb)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001765{
1766 unsigned count;
1767
Stephen Hemminger07e31632009-09-14 06:12:55 +00001768 count = (skb_shinfo(skb)->nr_frags + 1)
1769 * (sizeof(dma_addr_t) / sizeof(u32));
Stephen Hemminger793b8832005-09-14 16:06:14 -07001770
Herbert Xu89114af2006-07-08 13:34:32 -07001771 if (skb_is_gso(skb))
Stephen Hemminger793b8832005-09-14 16:06:14 -07001772 ++count;
Stephen Hemminger07e31632009-09-14 06:12:55 +00001773 else if (sizeof(dma_addr_t) == sizeof(u32))
1774 ++count; /* possible vlan */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001775
Patrick McHardy84fa7932006-08-29 16:44:56 -07001776 if (skb->ip_summed == CHECKSUM_PARTIAL)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001777 ++count;
1778
1779 return count;
1780}
1781
stephen hemmingerf6815072010-02-01 13:41:47 +00001782static void sky2_tx_unmap(struct pci_dev *pdev, struct tx_ring_info *re)
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001783{
1784 if (re->flags & TX_MAP_SINGLE)
FUJITA Tomonori7cd26ce2010-04-27 14:57:05 +00001785 pci_unmap_single(pdev, dma_unmap_addr(re, mapaddr),
1786 dma_unmap_len(re, maplen),
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001787 PCI_DMA_TODEVICE);
1788 else if (re->flags & TX_MAP_PAGE)
FUJITA Tomonori7cd26ce2010-04-27 14:57:05 +00001789 pci_unmap_page(pdev, dma_unmap_addr(re, mapaddr),
1790 dma_unmap_len(re, maplen),
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001791 PCI_DMA_TODEVICE);
stephen hemmingerf6815072010-02-01 13:41:47 +00001792 re->flags = 0;
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001793}
1794
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001795/*
Stephen Hemminger793b8832005-09-14 16:06:14 -07001796 * Put one packet in ring for transmit.
1797 * A single packet can generate multiple list elements, and
1798 * the number of ring elements will probably be less than the number
1799 * of list elements used.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001800 */
Stephen Hemminger613573252009-08-31 19:50:58 +00001801static netdev_tx_t sky2_xmit_frame(struct sk_buff *skb,
1802 struct net_device *dev)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001803{
1804 struct sky2_port *sky2 = netdev_priv(dev);
1805 struct sky2_hw *hw = sky2->hw;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001806 struct sky2_tx_le *le = NULL;
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001807 struct tx_ring_info *re;
Mike McCormack9b289c32009-08-14 05:15:12 +00001808 unsigned i, len;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001809 dma_addr_t mapping;
Stephen Hemminger5dce95e2009-08-18 15:17:06 +00001810 u32 upper;
1811 u16 slot;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001812 u16 mss;
1813 u8 ctrl;
1814
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001815 if (unlikely(tx_avail(sky2) < tx_le_req(skb)))
1816 return NETDEV_TX_BUSY;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001817
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001818 len = skb_headlen(skb);
1819 mapping = pci_map_single(hw->pdev, skb->data, len, PCI_DMA_TODEVICE);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001820
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001821 if (pci_dma_mapping_error(hw->pdev, mapping))
1822 goto mapping_error;
1823
Mike McCormack9b289c32009-08-14 05:15:12 +00001824 slot = sky2->tx_prod;
Joe Perches6c35aba2010-02-15 08:34:21 +00001825 netif_printk(sky2, tx_queued, KERN_DEBUG, dev,
1826 "tx queued, slot %u, len %d\n", slot, skb->len);
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001827
Stephen Hemminger86c68872008-01-10 16:14:12 -08001828 /* Send high bits if needed */
Stephen Hemminger5dce95e2009-08-18 15:17:06 +00001829 upper = upper_32_bits(mapping);
1830 if (upper != sky2->tx_last_upper) {
Mike McCormack9b289c32009-08-14 05:15:12 +00001831 le = get_tx_le(sky2, &slot);
Stephen Hemminger5dce95e2009-08-18 15:17:06 +00001832 le->addr = cpu_to_le32(upper);
1833 sky2->tx_last_upper = upper;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001834 le->opcode = OP_ADDR64 | HW_OWNER;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001835 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001836
1837 /* Check for TCP Segmentation Offload */
Herbert Xu79671682006-06-22 02:40:14 -07001838 mss = skb_shinfo(skb)->gso_size;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001839 if (mss != 0) {
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001840
1841 if (!(hw->flags & SKY2_HW_NEW_LE))
Stephen Hemminger69161612007-06-04 17:23:26 -07001842 mss += ETH_HLEN + ip_hdrlen(skb) + tcp_hdrlen(skb);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001843
Stephen Hemminger69161612007-06-04 17:23:26 -07001844 if (mss != sky2->tx_last_mss) {
Mike McCormack9b289c32009-08-14 05:15:12 +00001845 le = get_tx_le(sky2, &slot);
Stephen Hemminger69161612007-06-04 17:23:26 -07001846 le->addr = cpu_to_le32(mss);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001847
1848 if (hw->flags & SKY2_HW_NEW_LE)
Stephen Hemminger69161612007-06-04 17:23:26 -07001849 le->opcode = OP_MSS | HW_OWNER;
1850 else
1851 le->opcode = OP_LRGLEN | HW_OWNER;
shemminger@osdl.orge07560c2006-08-28 10:00:49 -07001852 sky2->tx_last_mss = mss;
1853 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001854 }
1855
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001856 ctrl = 0;
Stephen Hemminger86aa7782011-01-09 15:54:15 -08001857
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001858 /* Add VLAN tag, can piggyback on LRGLEN or ADDR64 */
Jesse Grosseab6d182010-10-20 13:56:03 +00001859 if (vlan_tx_tag_present(skb)) {
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001860 if (!le) {
Mike McCormack9b289c32009-08-14 05:15:12 +00001861 le = get_tx_le(sky2, &slot);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001862 le->addr = 0;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001863 le->opcode = OP_VLAN|HW_OWNER;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001864 } else
1865 le->opcode |= OP_VLAN;
1866 le->length = cpu_to_be16(vlan_tx_tag_get(skb));
1867 ctrl |= INS_VLAN;
1868 }
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001869
1870 /* Handle TCP checksum offload */
Patrick McHardy84fa7932006-08-29 16:44:56 -07001871 if (skb->ip_summed == CHECKSUM_PARTIAL) {
Stephen Hemminger69161612007-06-04 17:23:26 -07001872 /* On Yukon EX (some versions) encoding change. */
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001873 if (hw->flags & SKY2_HW_AUTO_TX_SUM)
Stephen Hemminger69161612007-06-04 17:23:26 -07001874 ctrl |= CALSUM; /* auto checksum */
1875 else {
1876 const unsigned offset = skb_transport_offset(skb);
1877 u32 tcpsum;
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001878
Stephen Hemminger69161612007-06-04 17:23:26 -07001879 tcpsum = offset << 16; /* sum start */
1880 tcpsum |= offset + skb->csum_offset; /* sum write */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001881
Stephen Hemminger69161612007-06-04 17:23:26 -07001882 ctrl |= CALSUM | WR_SUM | INIT_SUM | LOCK_SUM;
1883 if (ip_hdr(skb)->protocol == IPPROTO_UDP)
1884 ctrl |= UDPTCP;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001885
Stephen Hemminger69161612007-06-04 17:23:26 -07001886 if (tcpsum != sky2->tx_tcpsum) {
1887 sky2->tx_tcpsum = tcpsum;
shemminger@osdl.org1d179332006-08-28 10:00:50 -07001888
Mike McCormack9b289c32009-08-14 05:15:12 +00001889 le = get_tx_le(sky2, &slot);
Stephen Hemminger69161612007-06-04 17:23:26 -07001890 le->addr = cpu_to_le32(tcpsum);
1891 le->length = 0; /* initial checksum value */
1892 le->ctrl = 1; /* one packet */
1893 le->opcode = OP_TCPLISW | HW_OWNER;
1894 }
shemminger@osdl.org1d179332006-08-28 10:00:50 -07001895 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001896 }
1897
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001898 re = sky2->tx_ring + slot;
1899 re->flags = TX_MAP_SINGLE;
FUJITA Tomonori7cd26ce2010-04-27 14:57:05 +00001900 dma_unmap_addr_set(re, mapaddr, mapping);
1901 dma_unmap_len_set(re, maplen, len);
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001902
Mike McCormack9b289c32009-08-14 05:15:12 +00001903 le = get_tx_le(sky2, &slot);
Stephen Hemmingerd6e74b62009-08-18 15:17:05 +00001904 le->addr = cpu_to_le32(lower_32_bits(mapping));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001905 le->length = cpu_to_le16(len);
1906 le->ctrl = ctrl;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001907 le->opcode = mss ? (OP_LARGESEND | HW_OWNER) : (OP_PACKET | HW_OWNER);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001908
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001909
1910 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
Stephen Hemminger291ea612006-09-26 11:57:41 -07001911 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001912
1913 mapping = pci_map_page(hw->pdev, frag->page, frag->page_offset,
1914 frag->size, PCI_DMA_TODEVICE);
Stephen Hemminger86c68872008-01-10 16:14:12 -08001915
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001916 if (pci_dma_mapping_error(hw->pdev, mapping))
1917 goto mapping_unwind;
1918
Stephen Hemminger5dce95e2009-08-18 15:17:06 +00001919 upper = upper_32_bits(mapping);
1920 if (upper != sky2->tx_last_upper) {
Mike McCormack9b289c32009-08-14 05:15:12 +00001921 le = get_tx_le(sky2, &slot);
Stephen Hemminger5dce95e2009-08-18 15:17:06 +00001922 le->addr = cpu_to_le32(upper);
1923 sky2->tx_last_upper = upper;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001924 le->opcode = OP_ADDR64 | HW_OWNER;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001925 }
1926
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001927 re = sky2->tx_ring + slot;
1928 re->flags = TX_MAP_PAGE;
FUJITA Tomonori7cd26ce2010-04-27 14:57:05 +00001929 dma_unmap_addr_set(re, mapaddr, mapping);
1930 dma_unmap_len_set(re, maplen, frag->size);
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001931
Mike McCormack9b289c32009-08-14 05:15:12 +00001932 le = get_tx_le(sky2, &slot);
Stephen Hemmingerd6e74b62009-08-18 15:17:05 +00001933 le->addr = cpu_to_le32(lower_32_bits(mapping));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001934 le->length = cpu_to_le16(frag->size);
1935 le->ctrl = ctrl;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001936 le->opcode = OP_BUFFER | HW_OWNER;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001937 }
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001938
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001939 re->skb = skb;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001940 le->ctrl |= EOP;
1941
Mike McCormack9b289c32009-08-14 05:15:12 +00001942 sky2->tx_prod = slot;
1943
shemminger@osdl.org97bda702006-08-28 10:00:47 -07001944 if (tx_avail(sky2) <= MAX_SKB_TX_LE)
1945 netif_stop_queue(dev);
Stephen Hemmingerb19666d2006-03-07 11:06:36 -08001946
Stephen Hemminger290d4de2006-03-20 15:48:15 -08001947 sky2_put_idx(hw, txqaddr[sky2->port], sky2->tx_prod);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001948
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001949 return NETDEV_TX_OK;
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001950
1951mapping_unwind:
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001952 for (i = sky2->tx_prod; i != slot; i = RING_NEXT(i, sky2->tx_ring_size)) {
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001953 re = sky2->tx_ring + i;
1954
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001955 sky2_tx_unmap(hw->pdev, re);
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001956 }
1957
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001958mapping_error:
1959 if (net_ratelimit())
1960 dev_warn(&hw->pdev->dev, "%s: tx mapping error\n", dev->name);
1961 dev_kfree_skb(skb);
1962 return NETDEV_TX_OK;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001963}
1964
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001965/*
Stephen Hemminger793b8832005-09-14 16:06:14 -07001966 * Free ring elements from starting at tx_cons until "done"
1967 *
Stephen Hemminger481cea42009-08-14 15:33:19 -07001968 * NB:
1969 * 1. The hardware will tell us about partial completion of multi-part
Stephen Hemminger291ea612006-09-26 11:57:41 -07001970 * buffers so make sure not to free skb to early.
Stephen Hemminger481cea42009-08-14 15:33:19 -07001971 * 2. This may run in parallel start_xmit because the it only
1972 * looks at the tail of the queue of FIFO (tx_cons), not
1973 * the head (tx_prod)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001974 */
shemminger@osdl.orgd11c13e2005-09-27 15:02:56 -07001975static void sky2_tx_complete(struct sky2_port *sky2, u16 done)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001976{
shemminger@osdl.orgd11c13e2005-09-27 15:02:56 -07001977 struct net_device *dev = sky2->netdev;
Stephen Hemminger291ea612006-09-26 11:57:41 -07001978 unsigned idx;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001979
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001980 BUG_ON(done >= sky2->tx_ring_size);
shemminger@osdl.org22247952005-11-30 11:45:19 -08001981
Stephen Hemminger291ea612006-09-26 11:57:41 -07001982 for (idx = sky2->tx_cons; idx != done;
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001983 idx = RING_NEXT(idx, sky2->tx_ring_size)) {
Stephen Hemminger291ea612006-09-26 11:57:41 -07001984 struct tx_ring_info *re = sky2->tx_ring + idx;
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001985 struct sk_buff *skb = re->skb;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001986
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001987 sky2_tx_unmap(sky2->hw->pdev, re);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001988
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001989 if (skb) {
Joe Perches6c35aba2010-02-15 08:34:21 +00001990 netif_printk(sky2, tx_done, KERN_DEBUG, dev,
1991 "tx done %u\n", idx);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07001992
stephen hemminger0885a302010-12-31 15:34:27 +00001993 u64_stats_update_begin(&sky2->tx_stats.syncp);
1994 ++sky2->tx_stats.packets;
1995 sky2->tx_stats.bytes += skb->len;
1996 u64_stats_update_end(&sky2->tx_stats.syncp);
shemminger@linux-foundation.org2bf56fe2007-01-26 11:38:39 -08001997
stephen hemmingerf6815072010-02-01 13:41:47 +00001998 re->skb = NULL;
Stephen Hemminger724b6942009-08-18 15:17:10 +00001999 dev_kfree_skb_any(skb);
Stephen Hemmingerbd1c6862009-06-17 07:30:38 +00002000
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00002001 sky2->tx_next = RING_NEXT(idx, sky2->tx_ring_size);
Stephen Hemminger291ea612006-09-26 11:57:41 -07002002 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07002003 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07002004
Stephen Hemminger291ea612006-09-26 11:57:41 -07002005 sky2->tx_cons = idx;
Stephen Hemminger50432cb2007-05-14 12:38:15 -07002006 smp_mb();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002007}
2008
Mike McCormack264bb4f2009-08-14 05:15:14 +00002009static void sky2_tx_reset(struct sky2_hw *hw, unsigned port)
Mike McCormacka5109962009-08-14 05:15:13 +00002010{
Mike McCormacka5109962009-08-14 05:15:13 +00002011 /* Disable Force Sync bit and Enable Alloc bit */
2012 sky2_write8(hw, SK_REG(port, TXA_CTRL),
2013 TXA_DIS_FSYNC | TXA_DIS_ALLOC | TXA_STOP_RC);
2014
2015 /* Stop Interval Timer and Limit Counter of Tx Arbiter */
2016 sky2_write32(hw, SK_REG(port, TXA_ITI_INI), 0L);
2017 sky2_write32(hw, SK_REG(port, TXA_LIM_INI), 0L);
2018
2019 /* Reset the PCI FIFO of the async Tx queue */
2020 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR),
2021 BMU_RST_SET | BMU_FIFO_RST);
2022
2023 /* Reset the Tx prefetch units */
2024 sky2_write32(hw, Y2_QADDR(txqaddr[port], PREF_UNIT_CTRL),
2025 PREF_UNIT_RST_SET);
2026
2027 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), RB_RST_SET);
2028 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_SET);
2029}
2030
Mike McCormackf2b31cb2010-02-12 06:58:05 +00002031static void sky2_hw_down(struct sky2_port *sky2)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002032{
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002033 struct sky2_hw *hw = sky2->hw;
2034 unsigned port = sky2->port;
Mike McCormackf2b31cb2010-02-12 06:58:05 +00002035 u16 ctrl;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002036
Stephen Hemmingerd104aca2009-06-17 07:30:32 +00002037 /* Force flow control off */
2038 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002039
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002040 /* Stop transmitter */
2041 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_STOP);
2042 sky2_read32(hw, Q_ADDR(txqaddr[port], Q_CSR));
2043
2044 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL),
Stephen Hemminger793b8832005-09-14 16:06:14 -07002045 RB_RST_SET | RB_DIS_OP_MD);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002046
2047 ctrl = gma_read16(hw, port, GM_GP_CTRL);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002048 ctrl &= ~(GM_GPCR_TX_ENA | GM_GPCR_RX_ENA);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002049 gma_write16(hw, port, GM_GP_CTRL, ctrl);
2050
2051 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);
2052
2053 /* Workaround shared GMAC reset */
Joe Perches8e95a202009-12-03 07:58:21 +00002054 if (!(hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0 &&
2055 port == 0 && hw->dev[1] && netif_running(hw->dev[1])))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002056 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_SET);
2057
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002058 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002059
Stephen Hemminger6c835042009-06-17 07:30:35 +00002060 /* Force any delayed status interrrupt and NAPI */
2061 sky2_write32(hw, STAT_LEV_TIMER_CNT, 0);
2062 sky2_write32(hw, STAT_TX_TIMER_CNT, 0);
2063 sky2_write32(hw, STAT_ISR_TIMER_CNT, 0);
2064 sky2_read8(hw, STAT_ISR_TIMER_CTRL);
2065
Mike McCormacka947a392009-07-21 20:57:56 -07002066 sky2_rx_stop(sky2);
2067
Stephen Hemminger0da6d7b2009-08-14 05:15:15 +00002068 spin_lock_bh(&sky2->phy_lock);
Stephen Hemmingerb96936da72008-05-14 17:04:15 -07002069 sky2_phy_power_down(hw, port);
Stephen Hemminger0da6d7b2009-08-14 05:15:15 +00002070 spin_unlock_bh(&sky2->phy_lock);
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -07002071
Mike McCormack264bb4f2009-08-14 05:15:14 +00002072 sky2_tx_reset(hw, port);
2073
Stephen Hemminger481cea42009-08-14 15:33:19 -07002074 /* Free any pending frames stuck in HW queue */
2075 sky2_tx_complete(sky2, sky2->tx_prod);
Mike McCormackf2b31cb2010-02-12 06:58:05 +00002076}
2077
2078/* Network shutdown */
2079static int sky2_down(struct net_device *dev)
2080{
2081 struct sky2_port *sky2 = netdev_priv(dev);
Mike McCormack8a0c9222010-02-12 06:58:06 +00002082 struct sky2_hw *hw = sky2->hw;
Mike McCormackf2b31cb2010-02-12 06:58:05 +00002083
2084 /* Never really got started! */
2085 if (!sky2->tx_le)
2086 return 0;
2087
Joe Perches6c35aba2010-02-15 08:34:21 +00002088 netif_info(sky2, ifdown, dev, "disabling interface\n");
Mike McCormackf2b31cb2010-02-12 06:58:05 +00002089
Mike McCormack8a0c9222010-02-12 06:58:06 +00002090 /* Disable port IRQ */
2091 sky2_write32(hw, B0_IMSK,
2092 sky2_read32(hw, B0_IMSK) & ~portirq_msk[sky2->port]);
2093 sky2_read32(hw, B0_IMSK);
2094
2095 synchronize_irq(hw->pdev->irq);
2096 napi_synchronize(&hw->napi);
2097
Mike McCormackf2b31cb2010-02-12 06:58:05 +00002098 sky2_hw_down(sky2);
Stephen Hemminger481cea42009-08-14 15:33:19 -07002099
Mike McCormack90bbebb2009-09-01 03:21:35 +00002100 sky2_free_buffers(sky2);
Stephen Hemminger1b537562005-12-20 15:08:07 -08002101
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002102 return 0;
2103}
2104
2105static u16 sky2_phy_speed(const struct sky2_hw *hw, u16 aux)
2106{
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002107 if (hw->flags & SKY2_HW_FIBRE_PHY)
Stephen Hemminger793b8832005-09-14 16:06:14 -07002108 return SPEED_1000;
2109
Stephen Hemminger05745c42007-09-19 15:36:45 -07002110 if (!(hw->flags & SKY2_HW_GIGABIT)) {
2111 if (aux & PHY_M_PS_SPEED_100)
2112 return SPEED_100;
2113 else
2114 return SPEED_10;
2115 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002116
2117 switch (aux & PHY_M_PS_SPEED_MSK) {
2118 case PHY_M_PS_SPEED_1000:
2119 return SPEED_1000;
2120 case PHY_M_PS_SPEED_100:
2121 return SPEED_100;
2122 default:
2123 return SPEED_10;
2124 }
2125}
2126
2127static void sky2_link_up(struct sky2_port *sky2)
2128{
2129 struct sky2_hw *hw = sky2->hw;
2130 unsigned port = sky2->port;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07002131 static const char *fc_name[] = {
2132 [FC_NONE] = "none",
2133 [FC_TX] = "tx",
2134 [FC_RX] = "rx",
2135 [FC_BOTH] = "both",
2136 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002137
stephen hemminger8e116802011-07-07 05:50:58 +00002138 sky2_set_ipg(sky2);
2139
Brandon Philips38000a92010-06-16 16:21:58 +00002140 sky2_enable_rx_tx(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002141
2142 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK);
2143
2144 netif_carrier_on(sky2->netdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002145
Stephen Hemminger75e80682007-09-19 15:36:46 -07002146 mod_timer(&hw->watchdog_timer, jiffies + 1);
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002147
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002148 /* Turn on link LED */
Stephen Hemminger793b8832005-09-14 16:06:14 -07002149 sky2_write8(hw, SK_REG(port, LNK_LED_REG),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002150 LINKLED_ON | LINKLED_BLINK_OFF | LINKLED_LINKSYNC_OFF);
2151
Joe Perches6c35aba2010-02-15 08:34:21 +00002152 netif_info(sky2, link, sky2->netdev,
2153 "Link is up at %d Mbps, %s duplex, flow control %s\n",
2154 sky2->speed,
2155 sky2->duplex == DUPLEX_FULL ? "full" : "half",
2156 fc_name[sky2->flow_status]);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002157}
2158
2159static void sky2_link_down(struct sky2_port *sky2)
2160{
2161 struct sky2_hw *hw = sky2->hw;
2162 unsigned port = sky2->port;
2163 u16 reg;
2164
2165 gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0);
2166
2167 reg = gma_read16(hw, port, GM_GP_CTRL);
2168 reg &= ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA);
2169 gma_write16(hw, port, GM_GP_CTRL, reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002170
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002171 netif_carrier_off(sky2->netdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002172
Brandon Philips809aaaa2009-10-29 17:01:49 -07002173 /* Turn off link LED */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002174 sky2_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_OFF);
2175
Joe Perches6c35aba2010-02-15 08:34:21 +00002176 netif_info(sky2, link, sky2->netdev, "Link is down\n");
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07002177
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002178 sky2_phy_init(hw, port);
2179}
2180
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07002181static enum flow_control sky2_flow(int rx, int tx)
2182{
2183 if (rx)
2184 return tx ? FC_BOTH : FC_RX;
2185 else
2186 return tx ? FC_TX : FC_NONE;
2187}
2188
Stephen Hemminger793b8832005-09-14 16:06:14 -07002189static int sky2_autoneg_done(struct sky2_port *sky2, u16 aux)
2190{
2191 struct sky2_hw *hw = sky2->hw;
2192 unsigned port = sky2->port;
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002193 u16 advert, lpa;
Stephen Hemminger793b8832005-09-14 16:06:14 -07002194
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002195 advert = gm_phy_read(hw, port, PHY_MARV_AUNE_ADV);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002196 lpa = gm_phy_read(hw, port, PHY_MARV_AUNE_LP);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002197 if (lpa & PHY_M_AN_RF) {
Joe Perchesada1db52010-02-17 15:01:59 +00002198 netdev_err(sky2->netdev, "remote fault\n");
Stephen Hemminger793b8832005-09-14 16:06:14 -07002199 return -1;
2200 }
2201
Stephen Hemminger793b8832005-09-14 16:06:14 -07002202 if (!(aux & PHY_M_PS_SPDUP_RES)) {
Joe Perchesada1db52010-02-17 15:01:59 +00002203 netdev_err(sky2->netdev, "speed/duplex mismatch\n");
Stephen Hemminger793b8832005-09-14 16:06:14 -07002204 return -1;
2205 }
2206
Stephen Hemminger793b8832005-09-14 16:06:14 -07002207 sky2->speed = sky2_phy_speed(hw, aux);
Stephen Hemminger7c74ac12006-10-17 10:24:08 -07002208 sky2->duplex = (aux & PHY_M_PS_FULL_DUP) ? DUPLEX_FULL : DUPLEX_HALF;
Stephen Hemminger793b8832005-09-14 16:06:14 -07002209
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002210 /* Since the pause result bits seem to in different positions on
2211 * different chips. look at registers.
2212 */
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002213 if (hw->flags & SKY2_HW_FIBRE_PHY) {
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002214 /* Shift for bits in fiber PHY */
2215 advert &= ~(ADVERTISE_PAUSE_CAP|ADVERTISE_PAUSE_ASYM);
2216 lpa &= ~(LPA_PAUSE_CAP|LPA_PAUSE_ASYM);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002217
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002218 if (advert & ADVERTISE_1000XPAUSE)
2219 advert |= ADVERTISE_PAUSE_CAP;
2220 if (advert & ADVERTISE_1000XPSE_ASYM)
2221 advert |= ADVERTISE_PAUSE_ASYM;
2222 if (lpa & LPA_1000XPAUSE)
2223 lpa |= LPA_PAUSE_CAP;
2224 if (lpa & LPA_1000XPAUSE_ASYM)
2225 lpa |= LPA_PAUSE_ASYM;
2226 }
2227
2228 sky2->flow_status = FC_NONE;
2229 if (advert & ADVERTISE_PAUSE_CAP) {
2230 if (lpa & LPA_PAUSE_CAP)
2231 sky2->flow_status = FC_BOTH;
2232 else if (advert & ADVERTISE_PAUSE_ASYM)
2233 sky2->flow_status = FC_RX;
2234 } else if (advert & ADVERTISE_PAUSE_ASYM) {
2235 if ((lpa & LPA_PAUSE_CAP) && (lpa & LPA_PAUSE_ASYM))
2236 sky2->flow_status = FC_TX;
2237 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07002238
Joe Perches8e95a202009-12-03 07:58:21 +00002239 if (sky2->duplex == DUPLEX_HALF && sky2->speed < SPEED_1000 &&
2240 !(hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_EX))
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07002241 sky2->flow_status = FC_NONE;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07002242
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002243 if (sky2->flow_status & FC_TX)
Stephen Hemminger793b8832005-09-14 16:06:14 -07002244 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON);
2245 else
2246 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
2247
2248 return 0;
2249}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002250
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002251/* Interrupt from PHY */
2252static void sky2_phy_intr(struct sky2_hw *hw, unsigned port)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002253{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002254 struct net_device *dev = hw->dev[port];
2255 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002256 u16 istatus, phystat;
2257
Stephen Hemmingerebc646f2006-10-17 10:23:56 -07002258 if (!netif_running(dev))
2259 return;
2260
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002261 spin_lock(&sky2->phy_lock);
2262 istatus = gm_phy_read(hw, port, PHY_MARV_INT_STAT);
2263 phystat = gm_phy_read(hw, port, PHY_MARV_PHY_STAT);
2264
Joe Perches6c35aba2010-02-15 08:34:21 +00002265 netif_info(sky2, intr, sky2->netdev, "phy interrupt status 0x%x 0x%x\n",
2266 istatus, phystat);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002267
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07002268 if (istatus & PHY_M_IS_AN_COMPL) {
stephen hemminger9badba22010-03-29 07:36:20 +00002269 if (sky2_autoneg_done(sky2, phystat) == 0 &&
2270 !netif_carrier_ok(dev))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002271 sky2_link_up(sky2);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002272 goto out;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002273 }
2274
Stephen Hemminger793b8832005-09-14 16:06:14 -07002275 if (istatus & PHY_M_IS_LSP_CHANGE)
2276 sky2->speed = sky2_phy_speed(hw, phystat);
2277
2278 if (istatus & PHY_M_IS_DUP_CHANGE)
2279 sky2->duplex =
2280 (phystat & PHY_M_PS_FULL_DUP) ? DUPLEX_FULL : DUPLEX_HALF;
2281
2282 if (istatus & PHY_M_IS_LST_CHANGE) {
2283 if (phystat & PHY_M_PS_LINK_UP)
2284 sky2_link_up(sky2);
2285 else
2286 sky2_link_down(sky2);
2287 }
2288out:
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002289 spin_unlock(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002290}
2291
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00002292/* Special quick link interrupt (Yukon-2 Optima only) */
2293static void sky2_qlink_intr(struct sky2_hw *hw)
2294{
2295 struct sky2_port *sky2 = netdev_priv(hw->dev[0]);
2296 u32 imask;
2297 u16 phy;
2298
2299 /* disable irq */
2300 imask = sky2_read32(hw, B0_IMSK);
2301 imask &= ~Y2_IS_PHY_QLNK;
2302 sky2_write32(hw, B0_IMSK, imask);
2303
2304 /* reset PHY Link Detect */
2305 phy = sky2_pci_read16(hw, PSM_CONFIG_REG4);
stephen hemmingera40ccc62010-01-24 18:46:06 +00002306 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00002307 sky2_pci_write16(hw, PSM_CONFIG_REG4, phy | 1);
stephen hemmingera40ccc62010-01-24 18:46:06 +00002308 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00002309
2310 sky2_link_up(sky2);
2311}
2312
Stephen Hemminger62335ab2007-02-06 10:45:42 -08002313/* Transmit timeout is only called if we are running, carrier is up
Stephen Hemminger302d1252006-01-17 13:43:20 -08002314 * and tx queue is full (stopped).
2315 */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002316static void sky2_tx_timeout(struct net_device *dev)
2317{
2318 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger8cc048e2005-12-09 11:35:07 -08002319 struct sky2_hw *hw = sky2->hw;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002320
Joe Perches6c35aba2010-02-15 08:34:21 +00002321 netif_err(sky2, timer, dev, "tx timeout\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002322
Joe Perchesada1db52010-02-17 15:01:59 +00002323 netdev_printk(KERN_DEBUG, dev, "transmit ring %u .. %u report=%u done=%u\n",
2324 sky2->tx_cons, sky2->tx_prod,
2325 sky2_read16(hw, sky2->port == 0 ? STAT_TXA1_RIDX : STAT_TXA2_RIDX),
2326 sky2_read16(hw, Q_ADDR(txqaddr[sky2->port], Q_DONE)));
Stephen Hemminger8cc048e2005-12-09 11:35:07 -08002327
Stephen Hemminger81906792007-02-15 16:40:33 -08002328 /* can't restart safely under softirq */
2329 schedule_work(&hw->restart_work);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002330}
2331
2332static int sky2_change_mtu(struct net_device *dev, int new_mtu)
2333{
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002334 struct sky2_port *sky2 = netdev_priv(dev);
2335 struct sky2_hw *hw = sky2->hw;
Stephen Hemmingerb628ed982007-04-11 14:48:01 -07002336 unsigned port = sky2->port;
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002337 int err;
2338 u16 ctl, mode;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002339 u32 imask;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002340
stephen hemminger44dde562010-02-12 06:58:01 +00002341 /* MTU size outside the spec */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002342 if (new_mtu < ETH_ZLEN || new_mtu > ETH_JUMBO_MTU)
2343 return -EINVAL;
2344
stephen hemminger44dde562010-02-12 06:58:01 +00002345 /* MTU > 1500 on yukon FE and FE+ not allowed */
Stephen Hemminger05745c42007-09-19 15:36:45 -07002346 if (new_mtu > ETH_DATA_LEN &&
2347 (hw->chip_id == CHIP_ID_YUKON_FE ||
2348 hw->chip_id == CHIP_ID_YUKON_FE_P))
Stephen Hemmingerd2adf4f2007-04-11 14:48:02 -07002349 return -EINVAL;
2350
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002351 if (!netif_running(dev)) {
2352 dev->mtu = new_mtu;
Michał Mirosławf5d64032011-04-10 03:13:21 +00002353 netdev_update_features(dev);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002354 return 0;
2355 }
2356
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002357 imask = sky2_read32(hw, B0_IMSK);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002358 sky2_write32(hw, B0_IMSK, 0);
2359
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08002360 dev->trans_start = jiffies; /* prevent tx timeout */
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002361 napi_disable(&hw->napi);
Mike McCormackdf010932010-05-13 06:12:49 +00002362 netif_tx_disable(dev);
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08002363
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002364 synchronize_irq(hw->pdev->irq);
2365
Stephen Hemminger39dbd952008-02-04 19:45:13 -08002366 if (!(hw->flags & SKY2_HW_RAM_BUFFER))
Stephen Hemminger69161612007-06-04 17:23:26 -07002367 sky2_set_tx_stfwd(hw, port);
Stephen Hemmingerb628ed982007-04-11 14:48:01 -07002368
2369 ctl = gma_read16(hw, port, GM_GP_CTRL);
2370 gma_write16(hw, port, GM_GP_CTRL, ctl & ~GM_GPCR_RX_ENA);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002371 sky2_rx_stop(sky2);
2372 sky2_rx_clean(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002373
2374 dev->mtu = new_mtu;
Michał Mirosławf5d64032011-04-10 03:13:21 +00002375 netdev_update_features(dev);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002376
stephen hemminger8e116802011-07-07 05:50:58 +00002377 mode = DATA_BLIND_VAL(DATA_BLIND_DEF) | GM_SMOD_VLAN_ENA;
2378 if (sky2->speed > SPEED_100)
2379 mode |= IPG_DATA_VAL(IPG_DATA_DEF_1000);
2380 else
2381 mode |= IPG_DATA_VAL(IPG_DATA_DEF_10_100);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002382
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002383 if (dev->mtu > ETH_DATA_LEN)
2384 mode |= GM_SMOD_JUMBO_ENA;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002385
Stephen Hemmingerb628ed982007-04-11 14:48:01 -07002386 gma_write16(hw, port, GM_SERIAL_MODE, mode);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002387
Stephen Hemmingerb628ed982007-04-11 14:48:01 -07002388 sky2_write8(hw, RB_ADDR(rxqaddr[port], RB_CTRL), RB_ENA_OP_MD);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002389
Mike McCormack200ac4922010-02-12 06:58:03 +00002390 err = sky2_alloc_rx_skbs(sky2);
2391 if (!err)
2392 sky2_rx_start(sky2);
2393 else
2394 sky2_rx_clean(sky2);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002395 sky2_write32(hw, B0_IMSK, imask);
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08002396
David S. Millerd1d08d12008-01-07 20:53:33 -08002397 sky2_read32(hw, B0_Y2_SP_LISR);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002398 napi_enable(&hw->napi);
2399
Stephen Hemminger1b537562005-12-20 15:08:07 -08002400 if (err)
2401 dev_close(dev);
2402 else {
Stephen Hemmingerb628ed982007-04-11 14:48:01 -07002403 gma_write16(hw, port, GM_GP_CTRL, ctl);
Stephen Hemminger1b537562005-12-20 15:08:07 -08002404
Stephen Hemminger1b537562005-12-20 15:08:07 -08002405 netif_wake_queue(dev);
2406 }
2407
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002408 return err;
2409}
2410
Stephen Hemminger14d02632006-09-26 11:57:43 -07002411/* For small just reuse existing skb for next receive */
2412static struct sk_buff *receive_copy(struct sky2_port *sky2,
2413 const struct rx_ring_info *re,
2414 unsigned length)
2415{
2416 struct sk_buff *skb;
2417
Eric Dumazet89d71a62009-10-13 05:34:20 +00002418 skb = netdev_alloc_skb_ip_align(sky2->netdev, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002419 if (likely(skb)) {
Stephen Hemminger14d02632006-09-26 11:57:43 -07002420 pci_dma_sync_single_for_cpu(sky2->hw->pdev, re->data_addr,
2421 length, PCI_DMA_FROMDEVICE);
Arnaldo Carvalho de Melod626f622007-03-27 18:55:52 -03002422 skb_copy_from_linear_data(re->skb, skb->data, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002423 skb->ip_summed = re->skb->ip_summed;
2424 skb->csum = re->skb->csum;
2425 pci_dma_sync_single_for_device(sky2->hw->pdev, re->data_addr,
2426 length, PCI_DMA_FROMDEVICE);
2427 re->skb->ip_summed = CHECKSUM_NONE;
Stephen Hemminger489b10c2006-10-03 16:39:12 -07002428 skb_put(skb, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002429 }
2430 return skb;
2431}
2432
2433/* Adjust length of skb with fragments to match received data */
2434static void skb_put_frags(struct sk_buff *skb, unsigned int hdr_space,
2435 unsigned int length)
2436{
2437 int i, num_frags;
2438 unsigned int size;
2439
2440 /* put header into skb */
2441 size = min(length, hdr_space);
2442 skb->tail += size;
2443 skb->len += size;
2444 length -= size;
2445
2446 num_frags = skb_shinfo(skb)->nr_frags;
2447 for (i = 0; i < num_frags; i++) {
2448 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2449
2450 if (length == 0) {
2451 /* don't need this page */
2452 __free_page(frag->page);
2453 --skb_shinfo(skb)->nr_frags;
2454 } else {
2455 size = min(length, (unsigned) PAGE_SIZE);
2456
2457 frag->size = size;
2458 skb->data_len += size;
2459 skb->truesize += size;
2460 skb->len += size;
2461 length -= size;
2462 }
2463 }
2464}
2465
2466/* Normal packet - take skb from ring element and put in a new one */
2467static struct sk_buff *receive_new(struct sky2_port *sky2,
2468 struct rx_ring_info *re,
2469 unsigned int length)
2470{
stephen hemminger3fbd9182010-02-01 13:45:41 +00002471 struct sk_buff *skb;
2472 struct rx_ring_info nre;
Stephen Hemminger14d02632006-09-26 11:57:43 -07002473 unsigned hdr_space = sky2->rx_data_size;
2474
Eric Dumazet68ac3192011-07-07 06:13:32 -07002475 nre.skb = sky2_rx_alloc(sky2, GFP_ATOMIC);
stephen hemminger3fbd9182010-02-01 13:45:41 +00002476 if (unlikely(!nre.skb))
2477 goto nobuf;
2478
2479 if (sky2_rx_map_skb(sky2->hw->pdev, &nre, hdr_space))
2480 goto nomap;
Stephen Hemminger14d02632006-09-26 11:57:43 -07002481
2482 skb = re->skb;
2483 sky2_rx_unmap_skb(sky2->hw->pdev, re);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002484 prefetch(skb->data);
stephen hemminger3fbd9182010-02-01 13:45:41 +00002485 *re = nre;
Stephen Hemminger14d02632006-09-26 11:57:43 -07002486
2487 if (skb_shinfo(skb)->nr_frags)
2488 skb_put_frags(skb, hdr_space, length);
2489 else
Stephen Hemminger489b10c2006-10-03 16:39:12 -07002490 skb_put(skb, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002491 return skb;
stephen hemminger3fbd9182010-02-01 13:45:41 +00002492
2493nomap:
2494 dev_kfree_skb(nre.skb);
2495nobuf:
2496 return NULL;
Stephen Hemminger14d02632006-09-26 11:57:43 -07002497}
2498
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002499/*
2500 * Receive one packet.
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07002501 * For larger packets, get new buffer.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002502 */
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002503static struct sk_buff *sky2_receive(struct net_device *dev,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002504 u16 length, u32 status)
2505{
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002506 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger291ea612006-09-26 11:57:41 -07002507 struct rx_ring_info *re = sky2->rx_ring + sky2->rx_next;
Stephen Hemminger79e57d32005-09-19 15:42:33 -07002508 struct sk_buff *skb = NULL;
Stephen Hemmingerd6532232007-09-19 15:36:42 -07002509 u16 count = (status & GMR_FS_LEN) >> 16;
2510
Stephen Hemminger86aa7782011-01-09 15:54:15 -08002511 if (status & GMR_FS_VLAN)
2512 count -= VLAN_HLEN; /* Account for vlan tag */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002513
Joe Perches6c35aba2010-02-15 08:34:21 +00002514 netif_printk(sky2, rx_status, KERN_DEBUG, dev,
2515 "rx slot %u status 0x%x len %d\n",
2516 sky2->rx_next, status, length);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002517
Stephen Hemminger793b8832005-09-14 16:06:14 -07002518 sky2->rx_next = (sky2->rx_next + 1) % sky2->rx_pending;
Stephen Hemmingerd70cd512005-12-09 11:35:09 -08002519 prefetch(sky2->rx_ring + sky2->rx_next);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002520
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002521 /* This chip has hardware problems that generates bogus status.
2522 * So do only marginal checking and expect higher level protocols
2523 * to handle crap frames.
2524 */
2525 if (sky2->hw->chip_id == CHIP_ID_YUKON_FE_P &&
2526 sky2->hw->chip_rev == CHIP_REV_YU_FE2_A0 &&
2527 length != count)
2528 goto okay;
2529
shemminger@osdl.org42eeea02005-11-30 11:45:13 -08002530 if (status & GMR_FS_ANY_ERR)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002531 goto error;
2532
shemminger@osdl.org42eeea02005-11-30 11:45:13 -08002533 if (!(status & GMR_FS_RX_OK))
2534 goto resubmit;
2535
Stephen Hemmingerd6532232007-09-19 15:36:42 -07002536 /* if length reported by DMA does not match PHY, packet was truncated */
2537 if (length != count)
stephen hemminger0885a302010-12-31 15:34:27 +00002538 goto error;
Stephen Hemminger71749532007-07-09 15:33:40 -07002539
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002540okay:
Stephen Hemminger14d02632006-09-26 11:57:43 -07002541 if (length < copybreak)
2542 skb = receive_copy(sky2, re, length);
2543 else
2544 skb = receive_new(sky2, re, length);
Stephen Hemminger90c30332010-02-03 08:31:12 +00002545
2546 dev->stats.rx_dropped += (skb == NULL);
2547
Stephen Hemminger793b8832005-09-14 16:06:14 -07002548resubmit:
Stephen Hemminger14d02632006-09-26 11:57:43 -07002549 sky2_rx_submit(sky2, re);
Stephen Hemminger79e57d32005-09-19 15:42:33 -07002550
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002551 return skb;
2552
2553error:
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002554 ++dev->stats.rx_errors;
Stephen Hemminger6e15b712005-12-20 15:08:09 -08002555
Joe Perches6c35aba2010-02-15 08:34:21 +00002556 if (net_ratelimit())
2557 netif_info(sky2, rx_err, dev,
2558 "rx error, status 0x%x length %d\n", status, length);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002559
Stephen Hemminger793b8832005-09-14 16:06:14 -07002560 goto resubmit;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002561}
2562
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002563/* Transmit complete */
2564static inline void sky2_tx_done(struct net_device *dev, u16 last)
Stephen Hemminger13b97b72005-12-09 11:35:03 -08002565{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002566 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger302d1252006-01-17 13:43:20 -08002567
Mike McCormack8a0c9222010-02-12 06:58:06 +00002568 if (netif_running(dev)) {
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002569 sky2_tx_complete(sky2, last);
Mike McCormack8a0c9222010-02-12 06:58:06 +00002570
2571 /* Wake unless it's detached, and called e.g. from sky2_down() */
2572 if (tx_avail(sky2) > MAX_SKB_TX_LE + 4)
2573 netif_wake_queue(dev);
2574 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002575}
2576
Stephen Hemminger37e5a242009-06-17 07:30:39 +00002577static inline void sky2_skb_rx(const struct sky2_port *sky2,
2578 u32 status, struct sk_buff *skb)
2579{
Stephen Hemminger86aa7782011-01-09 15:54:15 -08002580 if (status & GMR_FS_VLAN)
2581 __vlan_hwaccel_put_tag(skb, be16_to_cpu(sky2->rx_tag));
2582
Stephen Hemminger37e5a242009-06-17 07:30:39 +00002583 if (skb->ip_summed == CHECKSUM_NONE)
2584 netif_receive_skb(skb);
2585 else
2586 napi_gro_receive(&sky2->hw->napi, skb);
2587}
2588
Stephen Hemmingerbf15fe992009-06-17 07:30:36 +00002589static inline void sky2_rx_done(struct sky2_hw *hw, unsigned port,
2590 unsigned packets, unsigned bytes)
2591{
stephen hemminger0885a302010-12-31 15:34:27 +00002592 struct net_device *dev = hw->dev[port];
2593 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingerbf15fe992009-06-17 07:30:36 +00002594
stephen hemminger0885a302010-12-31 15:34:27 +00002595 if (packets == 0)
2596 return;
2597
2598 u64_stats_update_begin(&sky2->rx_stats.syncp);
2599 sky2->rx_stats.packets += packets;
2600 sky2->rx_stats.bytes += bytes;
2601 u64_stats_update_end(&sky2->rx_stats.syncp);
2602
2603 dev->last_rx = jiffies;
2604 sky2_rx_update(netdev_priv(dev), rxqaddr[port]);
Stephen Hemmingerbf15fe992009-06-17 07:30:36 +00002605}
2606
stephen hemminger375c5682010-02-07 06:28:36 +00002607static void sky2_rx_checksum(struct sky2_port *sky2, u32 status)
2608{
2609 /* If this happens then driver assuming wrong format for chip type */
2610 BUG_ON(sky2->hw->flags & SKY2_HW_NEW_LE);
2611
2612 /* Both checksum counters are programmed to start at
2613 * the same offset, so unless there is a problem they
2614 * should match. This failure is an early indication that
2615 * hardware receive checksumming won't work.
2616 */
2617 if (likely((u16)(status >> 16) == (u16)status)) {
2618 struct sk_buff *skb = sky2->rx_ring[sky2->rx_next].skb;
2619 skb->ip_summed = CHECKSUM_COMPLETE;
2620 skb->csum = le16_to_cpu(status);
2621 } else {
2622 dev_notice(&sky2->hw->pdev->dev,
2623 "%s: receive checksum problem (status = %#x)\n",
2624 sky2->netdev->name, status);
2625
Michał Mirosławf5d64032011-04-10 03:13:21 +00002626 /* Disable checksum offload
2627 * It will be reenabled on next ndo_set_features, but if it's
2628 * really broken, will get disabled again
2629 */
2630 sky2->netdev->features &= ~NETIF_F_RXCSUM;
stephen hemminger375c5682010-02-07 06:28:36 +00002631 sky2_write32(sky2->hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
2632 BMU_DIS_RX_CHKSUM);
2633 }
2634}
2635
Stephen Hemmingerbf731302010-04-24 20:04:12 -07002636static void sky2_rx_hash(struct sky2_port *sky2, u32 status)
2637{
2638 struct sk_buff *skb;
2639
2640 skb = sky2->rx_ring[sky2->rx_next].skb;
2641 skb->rxhash = le32_to_cpu(status);
2642}
2643
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002644/* Process status response ring */
Stephen Hemminger26691832007-10-11 18:31:13 -07002645static int sky2_status_intr(struct sky2_hw *hw, int to_do, u16 idx)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002646{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002647 int work_done = 0;
Stephen Hemmingerbf15fe992009-06-17 07:30:36 +00002648 unsigned int total_bytes[2] = { 0 };
2649 unsigned int total_packets[2] = { 0 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002650
Stephen Hemmingeraf2a58a2005-12-09 11:35:04 -08002651 rmb();
Stephen Hemminger26691832007-10-11 18:31:13 -07002652 do {
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002653 struct sky2_port *sky2;
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002654 struct sky2_status_le *le = hw->st_le + hw->st_idx;
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002655 unsigned port;
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002656 struct net_device *dev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002657 struct sk_buff *skb;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002658 u32 status;
2659 u16 length;
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002660 u8 opcode = le->opcode;
2661
2662 if (!(opcode & HW_OWNER))
2663 break;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002664
stephen hemmingerefe91932010-04-22 13:42:56 +00002665 hw->st_idx = RING_NEXT(hw->st_idx, hw->st_size);
shemminger@osdl.orgbea86102005-10-26 12:16:10 -07002666
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002667 port = le->css & CSS_LINK_BIT;
Stephen Hemminger69161612007-06-04 17:23:26 -07002668 dev = hw->dev[port];
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002669 sky2 = netdev_priv(dev);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07002670 length = le16_to_cpu(le->length);
2671 status = le32_to_cpu(le->status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002672
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002673 le->opcode = 0;
2674 switch (opcode & ~HW_OWNER) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002675 case OP_RXSTAT:
Stephen Hemmingerbf15fe992009-06-17 07:30:36 +00002676 total_packets[port]++;
2677 total_bytes[port] += length;
Stephen Hemminger90c30332010-02-03 08:31:12 +00002678
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002679 skb = sky2_receive(dev, length, status);
Stephen Hemminger90c30332010-02-03 08:31:12 +00002680 if (!skb)
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002681 break;
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002682
Stephen Hemminger69161612007-06-04 17:23:26 -07002683 /* This chip reports checksum status differently */
Stephen Hemminger05745c42007-09-19 15:36:45 -07002684 if (hw->flags & SKY2_HW_NEW_LE) {
Michał Mirosławf5d64032011-04-10 03:13:21 +00002685 if ((dev->features & NETIF_F_RXCSUM) &&
Stephen Hemminger69161612007-06-04 17:23:26 -07002686 (le->css & (CSS_ISIPV4 | CSS_ISIPV6)) &&
2687 (le->css & CSS_TCPUDPCSOK))
2688 skb->ip_summed = CHECKSUM_UNNECESSARY;
2689 else
2690 skb->ip_summed = CHECKSUM_NONE;
2691 }
2692
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002693 skb->protocol = eth_type_trans(skb, dev);
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002694
Stephen Hemminger37e5a242009-06-17 07:30:39 +00002695 sky2_skb_rx(sky2, status, skb);
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002696
Stephen Hemminger22e11702006-07-12 15:23:48 -07002697 /* Stop after net poll weight */
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002698 if (++work_done >= to_do)
2699 goto exit_loop;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002700 break;
2701
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07002702 case OP_RXVLAN:
2703 sky2->rx_tag = length;
2704 break;
2705
2706 case OP_RXCHKSVLAN:
2707 sky2->rx_tag = length;
2708 /* fall through */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002709 case OP_RXCHKS:
Michał Mirosławf5d64032011-04-10 03:13:21 +00002710 if (likely(dev->features & NETIF_F_RXCSUM))
stephen hemminger375c5682010-02-07 06:28:36 +00002711 sky2_rx_checksum(sky2, status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002712 break;
2713
Stephen Hemmingerbf731302010-04-24 20:04:12 -07002714 case OP_RSS_HASH:
2715 sky2_rx_hash(sky2, status);
2716 break;
2717
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002718 case OP_TXINDEXLE:
Stephen Hemminger13b97b72005-12-09 11:35:03 -08002719 /* TX index reports status for both ports */
Stephen Hemmingerf55925d2006-05-08 15:11:28 -07002720 sky2_tx_done(hw->dev[0], status & 0xfff);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002721 if (hw->dev[1])
2722 sky2_tx_done(hw->dev[1],
2723 ((status >> 24) & 0xff)
2724 | (u16)(length & 0xf) << 8);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002725 break;
2726
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002727 default:
2728 if (net_ratelimit())
Joe Perchesada1db52010-02-17 15:01:59 +00002729 pr_warning("unknown status opcode 0x%x\n", opcode);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002730 }
Stephen Hemminger26691832007-10-11 18:31:13 -07002731 } while (hw->st_idx != idx);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002732
Stephen Hemmingerfe2a24d2006-08-01 11:55:23 -07002733 /* Fully processed status ring so clear irq */
2734 sky2_write32(hw, STAT_CTRL, SC_STAT_CLR_IRQ);
2735
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002736exit_loop:
Stephen Hemmingerbf15fe992009-06-17 07:30:36 +00002737 sky2_rx_done(hw, 0, total_packets[0], total_bytes[0]);
2738 sky2_rx_done(hw, 1, total_packets[1], total_bytes[1]);
Stephen Hemminger22e11702006-07-12 15:23:48 -07002739
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002740 return work_done;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002741}
2742
2743static void sky2_hw_error(struct sky2_hw *hw, unsigned port, u32 status)
2744{
2745 struct net_device *dev = hw->dev[port];
2746
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002747 if (net_ratelimit())
Joe Perchesada1db52010-02-17 15:01:59 +00002748 netdev_info(dev, "hw error interrupt status 0x%x\n", status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002749
2750 if (status & Y2_IS_PAR_RD1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002751 if (net_ratelimit())
Joe Perchesada1db52010-02-17 15:01:59 +00002752 netdev_err(dev, "ram data read parity error\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002753 /* Clear IRQ */
2754 sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_RD_PERR);
2755 }
2756
2757 if (status & Y2_IS_PAR_WR1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002758 if (net_ratelimit())
Joe Perchesada1db52010-02-17 15:01:59 +00002759 netdev_err(dev, "ram data write parity error\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002760
2761 sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_WR_PERR);
2762 }
2763
2764 if (status & Y2_IS_PAR_MAC1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002765 if (net_ratelimit())
Joe Perchesada1db52010-02-17 15:01:59 +00002766 netdev_err(dev, "MAC parity error\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002767 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_PE);
2768 }
2769
2770 if (status & Y2_IS_PAR_RX1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002771 if (net_ratelimit())
Joe Perchesada1db52010-02-17 15:01:59 +00002772 netdev_err(dev, "RX parity error\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002773 sky2_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), BMU_CLR_IRQ_PAR);
2774 }
2775
2776 if (status & Y2_IS_TCP_TXA1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002777 if (net_ratelimit())
Joe Perchesada1db52010-02-17 15:01:59 +00002778 netdev_err(dev, "TCP segmentation error\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002779 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_CLR_IRQ_TCP);
2780 }
2781}
2782
2783static void sky2_hw_intr(struct sky2_hw *hw)
2784{
Stephen Hemminger555382c2007-08-29 12:58:14 -07002785 struct pci_dev *pdev = hw->pdev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002786 u32 status = sky2_read32(hw, B0_HWE_ISRC);
Stephen Hemminger555382c2007-08-29 12:58:14 -07002787 u32 hwmsk = sky2_read32(hw, B0_HWE_IMSK);
2788
2789 status &= hwmsk;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002790
Stephen Hemminger793b8832005-09-14 16:06:14 -07002791 if (status & Y2_IS_TIST_OV)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002792 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002793
2794 if (status & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07002795 u16 pci_err;
2796
stephen hemmingera40ccc62010-01-24 18:46:06 +00002797 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08002798 pci_err = sky2_pci_read16(hw, PCI_STATUS);
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002799 if (net_ratelimit())
Stephen Hemminger555382c2007-08-29 12:58:14 -07002800 dev_err(&pdev->dev, "PCI hardware error (0x%x)\n",
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08002801 pci_err);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002802
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08002803 sky2_pci_write16(hw, PCI_STATUS,
Stephen Hemminger167f53d2007-09-25 19:01:02 -07002804 pci_err | PCI_STATUS_ERROR_BITS);
stephen hemmingera40ccc62010-01-24 18:46:06 +00002805 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002806 }
2807
2808 if (status & Y2_IS_PCI_EXP) {
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07002809 /* PCI-Express uncorrectable Error occurred */
Stephen Hemminger555382c2007-08-29 12:58:14 -07002810 u32 err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002811
stephen hemmingera40ccc62010-01-24 18:46:06 +00002812 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08002813 err = sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS);
2814 sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS,
2815 0xfffffffful);
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002816 if (net_ratelimit())
Stephen Hemminger555382c2007-08-29 12:58:14 -07002817 dev_err(&pdev->dev, "PCI Express error (0x%x)\n", err);
Stephen Hemmingercf06ffb2007-11-05 15:52:13 -08002818
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08002819 sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS);
stephen hemmingera40ccc62010-01-24 18:46:06 +00002820 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002821 }
2822
2823 if (status & Y2_HWE_L1_MASK)
2824 sky2_hw_error(hw, 0, status);
2825 status >>= 8;
2826 if (status & Y2_HWE_L1_MASK)
2827 sky2_hw_error(hw, 1, status);
2828}
2829
2830static void sky2_mac_intr(struct sky2_hw *hw, unsigned port)
2831{
2832 struct net_device *dev = hw->dev[port];
2833 struct sky2_port *sky2 = netdev_priv(dev);
2834 u8 status = sky2_read8(hw, SK_REG(port, GMAC_IRQ_SRC));
2835
Joe Perches6c35aba2010-02-15 08:34:21 +00002836 netif_info(sky2, intr, dev, "mac interrupt status 0x%x\n", status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002837
Stephen Hemmingera3caead2007-05-14 12:38:13 -07002838 if (status & GM_IS_RX_CO_OV)
2839 gma_read16(hw, port, GM_RX_IRQ_SRC);
2840
2841 if (status & GM_IS_TX_CO_OV)
2842 gma_read16(hw, port, GM_TX_IRQ_SRC);
2843
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002844 if (status & GM_IS_RX_FF_OR) {
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002845 ++dev->stats.rx_fifo_errors;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002846 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_CLI_RX_FO);
2847 }
2848
2849 if (status & GM_IS_TX_FF_UR) {
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002850 ++dev->stats.tx_fifo_errors;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002851 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_FU);
2852 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002853}
2854
Stephen Hemminger40b01722007-04-11 14:47:59 -07002855/* This should never happen it is a bug. */
Stephen Hemmingerc1197312009-08-18 15:17:07 +00002856static void sky2_le_error(struct sky2_hw *hw, unsigned port, u16 q)
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002857{
2858 struct net_device *dev = hw->dev[port];
Stephen Hemmingerc1197312009-08-18 15:17:07 +00002859 u16 idx = sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_GET_IDX));
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002860
Joe Perchesada1db52010-02-17 15:01:59 +00002861 dev_err(&hw->pdev->dev, "%s: descriptor error q=%#x get=%u put=%u\n",
Stephen Hemmingerc1197312009-08-18 15:17:07 +00002862 dev->name, (unsigned) q, (unsigned) idx,
2863 (unsigned) sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX)));
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002864
Stephen Hemminger40b01722007-04-11 14:47:59 -07002865 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_IRQ_CHK);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002866}
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002867
Stephen Hemminger75e80682007-09-19 15:36:46 -07002868static int sky2_rx_hung(struct net_device *dev)
2869{
2870 struct sky2_port *sky2 = netdev_priv(dev);
2871 struct sky2_hw *hw = sky2->hw;
2872 unsigned port = sky2->port;
2873 unsigned rxq = rxqaddr[port];
2874 u32 mac_rp = sky2_read32(hw, SK_REG(port, RX_GMF_RP));
2875 u8 mac_lev = sky2_read8(hw, SK_REG(port, RX_GMF_RLEV));
2876 u8 fifo_rp = sky2_read8(hw, Q_ADDR(rxq, Q_RP));
2877 u8 fifo_lev = sky2_read8(hw, Q_ADDR(rxq, Q_RL));
2878
2879 /* If idle and MAC or PCI is stuck */
2880 if (sky2->check.last == dev->last_rx &&
2881 ((mac_rp == sky2->check.mac_rp &&
2882 mac_lev != 0 && mac_lev >= sky2->check.mac_lev) ||
2883 /* Check if the PCI RX hang */
2884 (fifo_rp == sky2->check.fifo_rp &&
2885 fifo_lev != 0 && fifo_lev >= sky2->check.fifo_lev))) {
Joe Perchesada1db52010-02-17 15:01:59 +00002886 netdev_printk(KERN_DEBUG, dev,
2887 "hung mac %d:%d fifo %d (%d:%d)\n",
2888 mac_lev, mac_rp, fifo_lev,
2889 fifo_rp, sky2_read8(hw, Q_ADDR(rxq, Q_WP)));
Stephen Hemminger75e80682007-09-19 15:36:46 -07002890 return 1;
2891 } else {
2892 sky2->check.last = dev->last_rx;
2893 sky2->check.mac_rp = mac_rp;
2894 sky2->check.mac_lev = mac_lev;
2895 sky2->check.fifo_rp = fifo_rp;
2896 sky2->check.fifo_lev = fifo_lev;
2897 return 0;
2898 }
2899}
2900
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002901static void sky2_watchdog(unsigned long arg)
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002902{
Stephen Hemminger01bd7562006-05-08 15:11:30 -07002903 struct sky2_hw *hw = (struct sky2_hw *) arg;
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002904
Stephen Hemminger75e80682007-09-19 15:36:46 -07002905 /* Check for lost IRQ once a second */
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002906 if (sky2_read32(hw, B0_ISRC)) {
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002907 napi_schedule(&hw->napi);
Stephen Hemminger75e80682007-09-19 15:36:46 -07002908 } else {
2909 int i, active = 0;
2910
2911 for (i = 0; i < hw->ports; i++) {
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002912 struct net_device *dev = hw->dev[i];
Stephen Hemminger75e80682007-09-19 15:36:46 -07002913 if (!netif_running(dev))
2914 continue;
2915 ++active;
2916
2917 /* For chips with Rx FIFO, check if stuck */
Stephen Hemminger39dbd952008-02-04 19:45:13 -08002918 if ((hw->flags & SKY2_HW_RAM_BUFFER) &&
Stephen Hemminger75e80682007-09-19 15:36:46 -07002919 sky2_rx_hung(dev)) {
Joe Perchesada1db52010-02-17 15:01:59 +00002920 netdev_info(dev, "receiver hang detected\n");
Stephen Hemminger75e80682007-09-19 15:36:46 -07002921 schedule_work(&hw->restart_work);
2922 return;
2923 }
2924 }
2925
2926 if (active == 0)
2927 return;
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002928 }
2929
Stephen Hemminger75e80682007-09-19 15:36:46 -07002930 mod_timer(&hw->watchdog_timer, round_jiffies(jiffies + HZ));
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002931}
2932
Stephen Hemminger40b01722007-04-11 14:47:59 -07002933/* Hardware/software error handling */
2934static void sky2_err_intr(struct sky2_hw *hw, u32 status)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002935{
Stephen Hemminger40b01722007-04-11 14:47:59 -07002936 if (net_ratelimit())
2937 dev_warn(&hw->pdev->dev, "error interrupt status=%#x\n", status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002938
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002939 if (status & Y2_IS_HW_ERR)
2940 sky2_hw_intr(hw);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002941
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002942 if (status & Y2_IS_IRQ_MAC1)
2943 sky2_mac_intr(hw, 0);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002944
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002945 if (status & Y2_IS_IRQ_MAC2)
2946 sky2_mac_intr(hw, 1);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002947
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002948 if (status & Y2_IS_CHK_RX1)
Stephen Hemmingerc1197312009-08-18 15:17:07 +00002949 sky2_le_error(hw, 0, Q_R1);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002950
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002951 if (status & Y2_IS_CHK_RX2)
Stephen Hemmingerc1197312009-08-18 15:17:07 +00002952 sky2_le_error(hw, 1, Q_R2);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002953
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002954 if (status & Y2_IS_CHK_TXA1)
Stephen Hemmingerc1197312009-08-18 15:17:07 +00002955 sky2_le_error(hw, 0, Q_XA1);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002956
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002957 if (status & Y2_IS_CHK_TXA2)
Stephen Hemmingerc1197312009-08-18 15:17:07 +00002958 sky2_le_error(hw, 1, Q_XA2);
Stephen Hemminger40b01722007-04-11 14:47:59 -07002959}
2960
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002961static int sky2_poll(struct napi_struct *napi, int work_limit)
Stephen Hemminger40b01722007-04-11 14:47:59 -07002962{
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002963 struct sky2_hw *hw = container_of(napi, struct sky2_hw, napi);
Stephen Hemminger40b01722007-04-11 14:47:59 -07002964 u32 status = sky2_read32(hw, B0_Y2_SP_EISR);
David S. Miller6f535762007-10-11 18:08:29 -07002965 int work_done = 0;
Stephen Hemminger26691832007-10-11 18:31:13 -07002966 u16 idx;
Stephen Hemminger40b01722007-04-11 14:47:59 -07002967
2968 if (unlikely(status & Y2_IS_ERROR))
2969 sky2_err_intr(hw, status);
2970
2971 if (status & Y2_IS_IRQ_PHY1)
2972 sky2_phy_intr(hw, 0);
2973
2974 if (status & Y2_IS_IRQ_PHY2)
2975 sky2_phy_intr(hw, 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002976
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00002977 if (status & Y2_IS_PHY_QLNK)
2978 sky2_qlink_intr(hw);
2979
Stephen Hemminger26691832007-10-11 18:31:13 -07002980 while ((idx = sky2_read16(hw, STAT_PUT_IDX)) != hw->st_idx) {
2981 work_done += sky2_status_intr(hw, work_limit - work_done, idx);
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002982
David S. Miller6f535762007-10-11 18:08:29 -07002983 if (work_done >= work_limit)
Stephen Hemminger26691832007-10-11 18:31:13 -07002984 goto done;
Stephen Hemmingerfe2a24d2006-08-01 11:55:23 -07002985 }
David S. Miller6f535762007-10-11 18:08:29 -07002986
Stephen Hemminger26691832007-10-11 18:31:13 -07002987 napi_complete(napi);
2988 sky2_read32(hw, B0_Y2_SP_LISR);
2989done:
2990
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002991 return work_done;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002992}
2993
David Howells7d12e782006-10-05 14:55:46 +01002994static irqreturn_t sky2_intr(int irq, void *dev_id)
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002995{
2996 struct sky2_hw *hw = dev_id;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002997 u32 status;
2998
2999 /* Reading this mask interrupts as side effect */
3000 status = sky2_read32(hw, B0_Y2_SP_ISRC2);
3001 if (status == 0 || status == ~0)
3002 return IRQ_NONE;
3003
3004 prefetch(&hw->st_le[hw->st_idx]);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003005
3006 napi_schedule(&hw->napi);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003007
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003008 return IRQ_HANDLED;
3009}
3010
3011#ifdef CONFIG_NET_POLL_CONTROLLER
3012static void sky2_netpoll(struct net_device *dev)
3013{
3014 struct sky2_port *sky2 = netdev_priv(dev);
3015
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003016 napi_schedule(&sky2->hw->napi);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003017}
3018#endif
3019
3020/* Chip internal frequency for clock calculations */
Stephen Hemminger05745c42007-09-19 15:36:45 -07003021static u32 sky2_mhz(const struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003022{
Stephen Hemminger793b8832005-09-14 16:06:14 -07003023 switch (hw->chip_id) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003024 case CHIP_ID_YUKON_EC:
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08003025 case CHIP_ID_YUKON_EC_U:
Stephen Hemminger93745492007-02-06 10:45:43 -08003026 case CHIP_ID_YUKON_EX:
Stephen Hemmingered4d4162008-01-10 16:14:14 -08003027 case CHIP_ID_YUKON_SUPR:
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07003028 case CHIP_ID_YUKON_UL_2:
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003029 case CHIP_ID_YUKON_OPT:
stephen hemminger4fb99cd2011-07-07 05:50:59 +00003030 case CHIP_ID_YUKON_PRM:
3031 case CHIP_ID_YUKON_OP_2:
Stephen Hemminger05745c42007-09-19 15:36:45 -07003032 return 125;
3033
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003034 case CHIP_ID_YUKON_FE:
Stephen Hemminger05745c42007-09-19 15:36:45 -07003035 return 100;
3036
3037 case CHIP_ID_YUKON_FE_P:
3038 return 50;
3039
3040 case CHIP_ID_YUKON_XL:
3041 return 156;
3042
3043 default:
3044 BUG();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003045 }
3046}
3047
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003048static inline u32 sky2_us2clk(const struct sky2_hw *hw, u32 us)
3049{
Stephen Hemmingerfb17358f2005-12-09 11:34:56 -08003050 return sky2_mhz(hw) * us;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003051}
3052
Stephen Hemmingerfb17358f2005-12-09 11:34:56 -08003053static inline u32 sky2_clk2us(const struct sky2_hw *hw, u32 clk)
3054{
3055 return clk / sky2_mhz(hw);
3056}
3057
3058
Stephen Hemmingere3173832007-02-06 10:45:39 -08003059static int __devinit sky2_init(struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003060{
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003061 u8 t8;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003062
Stephen Hemminger167f53d2007-09-25 19:01:02 -07003063 /* Enable all clocks and check for bad PCI access */
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003064 sky2_pci_write32(hw, PCI_DEV_REG3, 0);
Stephen Hemminger451af332007-06-04 17:23:24 -07003065
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003066 sky2_write8(hw, B0_CTST, CS_RST_CLR);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08003067
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003068 hw->chip_id = sky2_read8(hw, B2_CHIP_ID);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003069 hw->chip_rev = (sky2_read8(hw, B2_MAC_CFG) & CFG_CHIP_R_MSK) >> 4;
3070
Mike McCormack060b9462010-07-29 03:34:52 +00003071 switch (hw->chip_id) {
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003072 case CHIP_ID_YUKON_XL:
Stephen Hemminger39dbd952008-02-04 19:45:13 -08003073 hw->flags = SKY2_HW_GIGABIT | SKY2_HW_NEWER_PHY;
Stephen Hemmingerbf731302010-04-24 20:04:12 -07003074 if (hw->chip_rev < CHIP_REV_YU_XL_A2)
3075 hw->flags |= SKY2_HW_RSS_BROKEN;
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003076 break;
3077
3078 case CHIP_ID_YUKON_EC_U:
3079 hw->flags = SKY2_HW_GIGABIT
3080 | SKY2_HW_NEWER_PHY
3081 | SKY2_HW_ADV_POWER_CTL;
3082 break;
3083
3084 case CHIP_ID_YUKON_EX:
3085 hw->flags = SKY2_HW_GIGABIT
3086 | SKY2_HW_NEWER_PHY
3087 | SKY2_HW_NEW_LE
stephen hemmingeraa5ca962011-07-07 13:40:00 +00003088 | SKY2_HW_ADV_POWER_CTL
3089 | SKY2_HW_RSS_CHKSUM;
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003090
3091 /* New transmit checksum */
3092 if (hw->chip_rev != CHIP_REV_YU_EX_B0)
3093 hw->flags |= SKY2_HW_AUTO_TX_SUM;
3094 break;
3095
3096 case CHIP_ID_YUKON_EC:
3097 /* This rev is really old, and requires untested workarounds */
3098 if (hw->chip_rev == CHIP_REV_YU_EC_A1) {
3099 dev_err(&hw->pdev->dev, "unsupported revision Yukon-EC rev A1\n");
3100 return -EOPNOTSUPP;
3101 }
Stephen Hemmingerbf731302010-04-24 20:04:12 -07003102 hw->flags = SKY2_HW_GIGABIT | SKY2_HW_RSS_BROKEN;
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003103 break;
3104
3105 case CHIP_ID_YUKON_FE:
Stephen Hemmingerbf731302010-04-24 20:04:12 -07003106 hw->flags = SKY2_HW_RSS_BROKEN;
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003107 break;
3108
Stephen Hemminger05745c42007-09-19 15:36:45 -07003109 case CHIP_ID_YUKON_FE_P:
3110 hw->flags = SKY2_HW_NEWER_PHY
3111 | SKY2_HW_NEW_LE
3112 | SKY2_HW_AUTO_TX_SUM
3113 | SKY2_HW_ADV_POWER_CTL;
Stephen Hemminger86aa7782011-01-09 15:54:15 -08003114
3115 /* The workaround for status conflicts VLAN tag detection. */
3116 if (hw->chip_rev == CHIP_REV_YU_FE2_A0)
stephen hemmingeraa5ca962011-07-07 13:40:00 +00003117 hw->flags |= SKY2_HW_VLAN_BROKEN | SKY2_HW_RSS_CHKSUM;
Stephen Hemminger05745c42007-09-19 15:36:45 -07003118 break;
Stephen Hemmingered4d4162008-01-10 16:14:14 -08003119
3120 case CHIP_ID_YUKON_SUPR:
3121 hw->flags = SKY2_HW_GIGABIT
3122 | SKY2_HW_NEWER_PHY
3123 | SKY2_HW_NEW_LE
3124 | SKY2_HW_AUTO_TX_SUM
3125 | SKY2_HW_ADV_POWER_CTL;
stephen hemmingeraa5ca962011-07-07 13:40:00 +00003126
3127 if (hw->chip_rev == CHIP_REV_YU_SU_A0)
3128 hw->flags |= SKY2_HW_RSS_CHKSUM;
Stephen Hemmingered4d4162008-01-10 16:14:14 -08003129 break;
3130
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07003131 case CHIP_ID_YUKON_UL_2:
Takashi Iwaib3386822009-12-03 05:12:01 +00003132 hw->flags = SKY2_HW_GIGABIT
3133 | SKY2_HW_ADV_POWER_CTL;
3134 break;
3135
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003136 case CHIP_ID_YUKON_OPT:
stephen hemminger4fb99cd2011-07-07 05:50:59 +00003137 case CHIP_ID_YUKON_PRM:
3138 case CHIP_ID_YUKON_OP_2:
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07003139 hw->flags = SKY2_HW_GIGABIT
Takashi Iwaib3386822009-12-03 05:12:01 +00003140 | SKY2_HW_NEW_LE
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07003141 | SKY2_HW_ADV_POWER_CTL;
3142 break;
3143
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003144 default:
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08003145 dev_err(&hw->pdev->dev, "unsupported chip type 0x%x\n",
3146 hw->chip_id);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003147 return -EOPNOTSUPP;
3148 }
3149
Stephen Hemmingere3173832007-02-06 10:45:39 -08003150 hw->pmd_type = sky2_read8(hw, B2_PMD_TYP);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003151 if (hw->pmd_type == 'L' || hw->pmd_type == 'S' || hw->pmd_type == 'P')
3152 hw->flags |= SKY2_HW_FIBRE_PHY;
3153
Stephen Hemmingere3173832007-02-06 10:45:39 -08003154 hw->ports = 1;
3155 t8 = sky2_read8(hw, B2_Y2_HW_RES);
3156 if ((t8 & CFG_DUAL_MAC_MSK) == CFG_DUAL_MAC_MSK) {
3157 if (!(sky2_read8(hw, B2_Y2_CLK_GATE) & Y2_STATUS_LNK2_INAC))
3158 ++hw->ports;
3159 }
3160
Mike McCormack74a61eb2009-09-21 04:08:52 +00003161 if (sky2_read8(hw, B2_E_0))
3162 hw->flags |= SKY2_HW_RAM_BUFFER;
3163
Stephen Hemmingere3173832007-02-06 10:45:39 -08003164 return 0;
3165}
3166
3167static void sky2_reset(struct sky2_hw *hw)
3168{
Stephen Hemminger555382c2007-08-29 12:58:14 -07003169 struct pci_dev *pdev = hw->pdev;
Stephen Hemmingere3173832007-02-06 10:45:39 -08003170 u16 status;
Jon Mason1a10cca2011-06-27 07:46:56 +00003171 int i;
Stephen Hemminger555382c2007-08-29 12:58:14 -07003172 u32 hwe_mask = Y2_HWE_ALL_MASK;
Stephen Hemmingere3173832007-02-06 10:45:39 -08003173
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003174 /* disable ASF */
stephen hemmingeracd12dd2010-02-07 06:24:50 +00003175 if (hw->chip_id == CHIP_ID_YUKON_EX
3176 || hw->chip_id == CHIP_ID_YUKON_SUPR) {
3177 sky2_write32(hw, CPU_WDOG, 0);
Stephen Hemminger4f44d8b2007-04-11 14:48:00 -07003178 status = sky2_read16(hw, HCU_CCSR);
3179 status &= ~(HCU_CCSR_AHB_RST | HCU_CCSR_CPU_RST_MODE |
3180 HCU_CCSR_UC_STATE_MSK);
stephen hemmingeracd12dd2010-02-07 06:24:50 +00003181 /*
3182 * CPU clock divider shouldn't be used because
3183 * - ASF firmware may malfunction
3184 * - Yukon-Supreme: Parallel FLASH doesn't support divided clocks
3185 */
3186 status &= ~HCU_CCSR_CPU_CLK_DIVIDE_MSK;
Stephen Hemminger4f44d8b2007-04-11 14:48:00 -07003187 sky2_write16(hw, HCU_CCSR, status);
stephen hemmingeracd12dd2010-02-07 06:24:50 +00003188 sky2_write32(hw, CPU_WDOG, 0);
Stephen Hemminger4f44d8b2007-04-11 14:48:00 -07003189 } else
3190 sky2_write8(hw, B28_Y2_ASF_STAT_CMD, Y2_ASF_RESET);
3191 sky2_write16(hw, B0_CTST, Y2_ASF_DISABLE);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003192
3193 /* do a SW reset */
3194 sky2_write8(hw, B0_CTST, CS_RST_SET);
3195 sky2_write8(hw, B0_CTST, CS_RST_CLR);
3196
Stephen Hemmingerac93a392007-11-05 15:52:08 -08003197 /* allow writes to PCI config */
3198 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
3199
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003200 /* clear PCI errors, if any */
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003201 status = sky2_pci_read16(hw, PCI_STATUS);
Stephen Hemminger167f53d2007-09-25 19:01:02 -07003202 status |= PCI_STATUS_ERROR_BITS;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003203 sky2_pci_write16(hw, PCI_STATUS, status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003204
3205 sky2_write8(hw, B0_CTST, CS_MRST_CLR);
3206
Jon Mason1a10cca2011-06-27 07:46:56 +00003207 if (pci_is_pcie(pdev)) {
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08003208 sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS,
3209 0xfffffffful);
Stephen Hemminger7bd656d2006-10-09 14:40:38 -07003210
Stephen Hemminger555382c2007-08-29 12:58:14 -07003211 /* If error bit is stuck on ignore it */
3212 if (sky2_read32(hw, B0_HWE_ISRC) & Y2_IS_PCI_EXP)
3213 dev_info(&pdev->dev, "ignoring stuck error report bit\n");
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08003214 else
Stephen Hemminger555382c2007-08-29 12:58:14 -07003215 hwe_mask |= Y2_IS_PCI_EXP;
3216 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003217
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08003218 sky2_power_on(hw);
stephen hemmingera40ccc62010-01-24 18:46:06 +00003219 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003220
3221 for (i = 0; i < hw->ports; i++) {
3222 sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET);
3223 sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_CLR);
Stephen Hemminger69161612007-06-04 17:23:26 -07003224
Stephen Hemmingered4d4162008-01-10 16:14:14 -08003225 if (hw->chip_id == CHIP_ID_YUKON_EX ||
3226 hw->chip_id == CHIP_ID_YUKON_SUPR)
Stephen Hemminger69161612007-06-04 17:23:26 -07003227 sky2_write16(hw, SK_REG(i, GMAC_CTRL),
3228 GMC_BYP_MACSECRX_ON | GMC_BYP_MACSECTX_ON
3229 | GMC_BYP_RETR_ON);
Stephen Hemminger877c8572009-10-29 06:37:08 +00003230
3231 }
3232
3233 if (hw->chip_id == CHIP_ID_YUKON_SUPR && hw->chip_rev > CHIP_REV_YU_SU_B0) {
3234 /* enable MACSec clock gating */
3235 sky2_pci_write32(hw, PCI_DEV_REG3, P_CLK_MACSEC_DIS);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003236 }
3237
stephen hemminger4fb99cd2011-07-07 05:50:59 +00003238 if (hw->chip_id == CHIP_ID_YUKON_OPT ||
3239 hw->chip_id == CHIP_ID_YUKON_PRM ||
3240 hw->chip_id == CHIP_ID_YUKON_OP_2) {
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003241 u16 reg;
3242 u32 msk;
3243
stephen hemminger4fb99cd2011-07-07 05:50:59 +00003244 if (hw->chip_id == CHIP_ID_YUKON_OPT && hw->chip_rev == 0) {
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003245 /* disable PCI-E PHY power down (set PHY reg 0x80, bit 7 */
3246 sky2_write32(hw, Y2_PEX_PHY_DATA, (0x80UL << 16) | (1 << 7));
3247
3248 /* set PHY Link Detect Timer to 1.1 second (11x 100ms) */
3249 reg = 10;
stephen hemminger4fb99cd2011-07-07 05:50:59 +00003250
3251 /* re-enable PEX PM in PEX PHY debug reg. 8 (clear bit 12) */
3252 sky2_write32(hw, Y2_PEX_PHY_DATA, PEX_DB_ACCESS | (0x08UL << 16));
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003253 } else {
3254 /* set PHY Link Detect Timer to 0.4 second (4x 100ms) */
3255 reg = 3;
3256 }
3257
3258 reg <<= PSM_CONFIG_REG4_TIMER_PHY_LINK_DETECT_BASE;
stephen hemminger4fb99cd2011-07-07 05:50:59 +00003259 reg |= PSM_CONFIG_REG4_RST_PHY_LINK_DETECT;
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003260
3261 /* reset PHY Link Detect */
stephen hemmingera40ccc62010-01-24 18:46:06 +00003262 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003263 sky2_pci_write16(hw, PSM_CONFIG_REG4, reg);
3264
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003265 /* enable PHY Quick Link */
3266 msk = sky2_read32(hw, B0_IMSK);
3267 msk |= Y2_IS_PHY_QLNK;
3268 sky2_write32(hw, B0_IMSK, msk);
3269
3270 /* check if PSMv2 was running before */
3271 reg = sky2_pci_read16(hw, PSM_CONFIG_REG3);
Jon Mason1a10cca2011-06-27 07:46:56 +00003272 if (reg & PCI_EXP_LNKCTL_ASPMC)
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003273 /* restore the PCIe Link Control register */
Jon Mason1a10cca2011-06-27 07:46:56 +00003274 sky2_pci_write16(hw, pdev->pcie_cap + PCI_EXP_LNKCTL,
3275 reg);
3276
stephen hemmingera40ccc62010-01-24 18:46:06 +00003277 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003278
3279 /* re-enable PEX PM in PEX PHY debug reg. 8 (clear bit 12) */
3280 sky2_write32(hw, Y2_PEX_PHY_DATA, PEX_DB_ACCESS | (0x08UL << 16));
3281 }
3282
Stephen Hemminger793b8832005-09-14 16:06:14 -07003283 /* Clear I2C IRQ noise */
3284 sky2_write32(hw, B2_I2C_IRQ, 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003285
3286 /* turn off hardware timer (unused) */
3287 sky2_write8(hw, B2_TI_CTRL, TIM_STOP);
3288 sky2_write8(hw, B2_TI_CTRL, TIM_CLR_IRQ);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003289
Stephen Hemminger69634ee2005-12-09 11:35:06 -08003290 /* Turn off descriptor polling */
3291 sky2_write32(hw, B28_DPT_CTRL, DPT_STOP);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003292
3293 /* Turn off receive timestamp */
3294 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_STOP);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003295 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003296
3297 /* enable the Tx Arbiters */
3298 for (i = 0; i < hw->ports; i++)
3299 sky2_write8(hw, SK_REG(i, TXA_CTRL), TXA_ENA_ARB);
3300
3301 /* Initialize ram interface */
3302 for (i = 0; i < hw->ports; i++) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07003303 sky2_write8(hw, RAM_BUFFER(i, B3_RI_CTRL), RI_RST_CLR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003304
3305 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R1), SK_RI_TO_53);
3306 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA1), SK_RI_TO_53);
3307 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS1), SK_RI_TO_53);
3308 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R1), SK_RI_TO_53);
3309 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA1), SK_RI_TO_53);
3310 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS1), SK_RI_TO_53);
3311 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R2), SK_RI_TO_53);
3312 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA2), SK_RI_TO_53);
3313 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS2), SK_RI_TO_53);
3314 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R2), SK_RI_TO_53);
3315 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA2), SK_RI_TO_53);
3316 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS2), SK_RI_TO_53);
3317 }
3318
Stephen Hemminger555382c2007-08-29 12:58:14 -07003319 sky2_write32(hw, B0_HWE_IMSK, hwe_mask);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003320
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003321 for (i = 0; i < hw->ports; i++)
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -07003322 sky2_gmac_reset(hw, i);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003323
stephen hemmingerefe91932010-04-22 13:42:56 +00003324 memset(hw->st_le, 0, hw->st_size * sizeof(struct sky2_status_le));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003325 hw->st_idx = 0;
3326
3327 sky2_write32(hw, STAT_CTRL, SC_STAT_RST_SET);
3328 sky2_write32(hw, STAT_CTRL, SC_STAT_RST_CLR);
3329
3330 sky2_write32(hw, STAT_LIST_ADDR_LO, hw->st_dma);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003331 sky2_write32(hw, STAT_LIST_ADDR_HI, (u64) hw->st_dma >> 32);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003332
3333 /* Set the list last index */
stephen hemmingerefe91932010-04-22 13:42:56 +00003334 sky2_write16(hw, STAT_LAST_IDX, hw->st_size - 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003335
Stephen Hemminger290d4de2006-03-20 15:48:15 -08003336 sky2_write16(hw, STAT_TX_IDX_TH, 10);
3337 sky2_write8(hw, STAT_FIFO_WM, 16);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003338
Stephen Hemminger290d4de2006-03-20 15:48:15 -08003339 /* set Status-FIFO ISR watermark */
3340 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0)
3341 sky2_write8(hw, STAT_FIFO_ISR_WM, 4);
3342 else
3343 sky2_write8(hw, STAT_FIFO_ISR_WM, 16);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003344
Stephen Hemminger290d4de2006-03-20 15:48:15 -08003345 sky2_write32(hw, STAT_TX_TIMER_INI, sky2_us2clk(hw, 1000));
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08003346 sky2_write32(hw, STAT_ISR_TIMER_INI, sky2_us2clk(hw, 20));
3347 sky2_write32(hw, STAT_LEV_TIMER_INI, sky2_us2clk(hw, 100));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003348
Stephen Hemminger793b8832005-09-14 16:06:14 -07003349 /* enable status unit */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003350 sky2_write32(hw, STAT_CTRL, SC_STAT_OP_ON);
3351
3352 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
3353 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START);
3354 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START);
Stephen Hemmingere3173832007-02-06 10:45:39 -08003355}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003356
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07003357/* Take device down (offline).
3358 * Equivalent to doing dev_stop() but this does not
Lucas De Marchi25985ed2011-03-30 22:57:33 -03003359 * inform upper layers of the transition.
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07003360 */
3361static void sky2_detach(struct net_device *dev)
3362{
3363 if (netif_running(dev)) {
Mike McCormackc36531b2009-12-31 00:55:31 +00003364 netif_tx_lock(dev);
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07003365 netif_device_detach(dev); /* stop txq */
Mike McCormackc36531b2009-12-31 00:55:31 +00003366 netif_tx_unlock(dev);
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07003367 sky2_down(dev);
3368 }
3369}
3370
3371/* Bring device back after doing sky2_detach */
3372static int sky2_reattach(struct net_device *dev)
3373{
3374 int err = 0;
3375
3376 if (netif_running(dev)) {
3377 err = sky2_up(dev);
3378 if (err) {
Joe Perchesada1db52010-02-17 15:01:59 +00003379 netdev_info(dev, "could not restart %d\n", err);
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07003380 dev_close(dev);
3381 } else {
3382 netif_device_attach(dev);
3383 sky2_set_multicast(dev);
3384 }
3385 }
3386
3387 return err;
3388}
3389
Mike McCormackd72ff8f2010-05-13 06:12:51 +00003390static void sky2_all_down(struct sky2_hw *hw)
Stephen Hemminger81906792007-02-15 16:40:33 -08003391{
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07003392 int i;
Stephen Hemminger81906792007-02-15 16:40:33 -08003393
Mike McCormackd72ff8f2010-05-13 06:12:51 +00003394 sky2_read32(hw, B0_IMSK);
Stephen Hemminger8cfcbe92007-12-03 17:02:17 -08003395 sky2_write32(hw, B0_IMSK, 0);
Mike McCormack93135a32010-05-13 06:12:50 +00003396 synchronize_irq(hw->pdev->irq);
3397 napi_disable(&hw->napi);
Stephen Hemminger81906792007-02-15 16:40:33 -08003398
Mike McCormack8a0c9222010-02-12 06:58:06 +00003399 for (i = 0; i < hw->ports; i++) {
3400 struct net_device *dev = hw->dev[i];
3401 struct sky2_port *sky2 = netdev_priv(dev);
3402
3403 if (!netif_running(dev))
3404 continue;
3405
3406 netif_carrier_off(dev);
3407 netif_tx_disable(dev);
3408 sky2_hw_down(sky2);
3409 }
Mike McCormackd72ff8f2010-05-13 06:12:51 +00003410}
Mike McCormack8a0c9222010-02-12 06:58:06 +00003411
Mike McCormackd72ff8f2010-05-13 06:12:51 +00003412static void sky2_all_up(struct sky2_hw *hw)
3413{
3414 u32 imask = Y2_IS_BASE;
3415 int i;
Mike McCormack8a0c9222010-02-12 06:58:06 +00003416
3417 for (i = 0; i < hw->ports; i++) {
3418 struct net_device *dev = hw->dev[i];
3419 struct sky2_port *sky2 = netdev_priv(dev);
3420
3421 if (!netif_running(dev))
3422 continue;
3423
3424 sky2_hw_up(sky2);
Mike McCormack37652522010-05-13 06:12:48 +00003425 sky2_set_multicast(dev);
Mike McCormackd72ff8f2010-05-13 06:12:51 +00003426 imask |= portirq_msk[i];
Mike McCormack8a0c9222010-02-12 06:58:06 +00003427 netif_wake_queue(dev);
3428 }
3429
3430 sky2_write32(hw, B0_IMSK, imask);
3431 sky2_read32(hw, B0_IMSK);
3432
3433 sky2_read32(hw, B0_Y2_SP_LISR);
3434 napi_enable(&hw->napi);
Mike McCormackd72ff8f2010-05-13 06:12:51 +00003435}
3436
3437static void sky2_restart(struct work_struct *work)
3438{
3439 struct sky2_hw *hw = container_of(work, struct sky2_hw, restart_work);
3440
3441 rtnl_lock();
3442
3443 sky2_all_down(hw);
3444 sky2_reset(hw);
3445 sky2_all_up(hw);
Stephen Hemminger81906792007-02-15 16:40:33 -08003446
Stephen Hemminger81906792007-02-15 16:40:33 -08003447 rtnl_unlock();
3448}
3449
Stephen Hemmingere3173832007-02-06 10:45:39 -08003450static inline u8 sky2_wol_supported(const struct sky2_hw *hw)
3451{
3452 return sky2_is_copper(hw) ? (WAKE_PHY | WAKE_MAGIC) : 0;
3453}
3454
3455static void sky2_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3456{
3457 const struct sky2_port *sky2 = netdev_priv(dev);
3458
3459 wol->supported = sky2_wol_supported(sky2->hw);
3460 wol->wolopts = sky2->wol;
3461}
3462
3463static int sky2_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3464{
3465 struct sky2_port *sky2 = netdev_priv(dev);
3466 struct sky2_hw *hw = sky2->hw;
Rafael J. Wysocki0f333d12010-12-26 08:44:32 +00003467 bool enable_wakeup = false;
3468 int i;
Stephen Hemmingere3173832007-02-06 10:45:39 -08003469
Joe Perches8e95a202009-12-03 07:58:21 +00003470 if ((wol->wolopts & ~sky2_wol_supported(sky2->hw)) ||
3471 !device_can_wakeup(&hw->pdev->dev))
Stephen Hemmingere3173832007-02-06 10:45:39 -08003472 return -EOPNOTSUPP;
3473
3474 sky2->wol = wol->wolopts;
Rafael J. Wysocki0f333d12010-12-26 08:44:32 +00003475
3476 for (i = 0; i < hw->ports; i++) {
3477 struct net_device *dev = hw->dev[i];
3478 struct sky2_port *sky2 = netdev_priv(dev);
3479
3480 if (sky2->wol)
3481 enable_wakeup = true;
3482 }
3483 device_set_wakeup_enable(&hw->pdev->dev, enable_wakeup);
3484
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003485 return 0;
3486}
3487
Stephen Hemminger28bd1812006-01-17 13:43:19 -08003488static u32 sky2_supported_modes(const struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003489{
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003490 if (sky2_is_copper(hw)) {
3491 u32 modes = SUPPORTED_10baseT_Half
3492 | SUPPORTED_10baseT_Full
3493 | SUPPORTED_100baseT_Half
Stephen Hemminger2aca31e2011-01-06 18:40:36 +00003494 | SUPPORTED_100baseT_Full;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003495
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003496 if (hw->flags & SKY2_HW_GIGABIT)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003497 modes |= SUPPORTED_1000baseT_Half
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003498 | SUPPORTED_1000baseT_Full;
3499 return modes;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003500 } else
Stephen Hemminger2aca31e2011-01-06 18:40:36 +00003501 return SUPPORTED_1000baseT_Half
3502 | SUPPORTED_1000baseT_Full;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003503}
3504
Stephen Hemminger793b8832005-09-14 16:06:14 -07003505static int sky2_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003506{
3507 struct sky2_port *sky2 = netdev_priv(dev);
3508 struct sky2_hw *hw = sky2->hw;
3509
3510 ecmd->transceiver = XCVR_INTERNAL;
3511 ecmd->supported = sky2_supported_modes(hw);
3512 ecmd->phy_address = PHY_ADDR_MARV;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003513 if (sky2_is_copper(hw)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003514 ecmd->port = PORT_TP;
David Decotigny70739492011-04-27 18:32:40 +00003515 ethtool_cmd_speed_set(ecmd, sky2->speed);
Stephen Hemminger2aca31e2011-01-06 18:40:36 +00003516 ecmd->supported |= SUPPORTED_Autoneg | SUPPORTED_TP;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003517 } else {
David Decotigny70739492011-04-27 18:32:40 +00003518 ethtool_cmd_speed_set(ecmd, SPEED_1000);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003519 ecmd->port = PORT_FIBRE;
Stephen Hemminger2aca31e2011-01-06 18:40:36 +00003520 ecmd->supported |= SUPPORTED_Autoneg | SUPPORTED_FIBRE;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003521 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003522
3523 ecmd->advertising = sky2->advertising;
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07003524 ecmd->autoneg = (sky2->flags & SKY2_FLAG_AUTO_SPEED)
3525 ? AUTONEG_ENABLE : AUTONEG_DISABLE;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003526 ecmd->duplex = sky2->duplex;
3527 return 0;
3528}
3529
3530static int sky2_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
3531{
3532 struct sky2_port *sky2 = netdev_priv(dev);
3533 const struct sky2_hw *hw = sky2->hw;
3534 u32 supported = sky2_supported_modes(hw);
3535
3536 if (ecmd->autoneg == AUTONEG_ENABLE) {
Stephen Hemminger2aca31e2011-01-06 18:40:36 +00003537 if (ecmd->advertising & ~supported)
3538 return -EINVAL;
3539
3540 if (sky2_is_copper(hw))
3541 sky2->advertising = ecmd->advertising |
3542 ADVERTISED_TP |
3543 ADVERTISED_Autoneg;
3544 else
3545 sky2->advertising = ecmd->advertising |
3546 ADVERTISED_FIBRE |
3547 ADVERTISED_Autoneg;
3548
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07003549 sky2->flags |= SKY2_FLAG_AUTO_SPEED;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003550 sky2->duplex = -1;
3551 sky2->speed = -1;
3552 } else {
3553 u32 setting;
David Decotigny25db0332011-04-27 18:32:39 +00003554 u32 speed = ethtool_cmd_speed(ecmd);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003555
David Decotigny25db0332011-04-27 18:32:39 +00003556 switch (speed) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003557 case SPEED_1000:
3558 if (ecmd->duplex == DUPLEX_FULL)
3559 setting = SUPPORTED_1000baseT_Full;
3560 else if (ecmd->duplex == DUPLEX_HALF)
3561 setting = SUPPORTED_1000baseT_Half;
3562 else
3563 return -EINVAL;
3564 break;
3565 case SPEED_100:
3566 if (ecmd->duplex == DUPLEX_FULL)
3567 setting = SUPPORTED_100baseT_Full;
3568 else if (ecmd->duplex == DUPLEX_HALF)
3569 setting = SUPPORTED_100baseT_Half;
3570 else
3571 return -EINVAL;
3572 break;
3573
3574 case SPEED_10:
3575 if (ecmd->duplex == DUPLEX_FULL)
3576 setting = SUPPORTED_10baseT_Full;
3577 else if (ecmd->duplex == DUPLEX_HALF)
3578 setting = SUPPORTED_10baseT_Half;
3579 else
3580 return -EINVAL;
3581 break;
3582 default:
3583 return -EINVAL;
3584 }
3585
3586 if ((setting & supported) == 0)
3587 return -EINVAL;
3588
David Decotigny25db0332011-04-27 18:32:39 +00003589 sky2->speed = speed;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003590 sky2->duplex = ecmd->duplex;
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07003591 sky2->flags &= ~SKY2_FLAG_AUTO_SPEED;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003592 }
3593
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +01003594 if (netif_running(dev)) {
Stephen Hemminger1b537562005-12-20 15:08:07 -08003595 sky2_phy_reinit(sky2);
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +01003596 sky2_set_multicast(dev);
3597 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003598
3599 return 0;
3600}
3601
3602static void sky2_get_drvinfo(struct net_device *dev,
3603 struct ethtool_drvinfo *info)
3604{
3605 struct sky2_port *sky2 = netdev_priv(dev);
3606
3607 strcpy(info->driver, DRV_NAME);
3608 strcpy(info->version, DRV_VERSION);
3609 strcpy(info->fw_version, "N/A");
3610 strcpy(info->bus_info, pci_name(sky2->hw->pdev));
3611}
3612
3613static const struct sky2_stat {
Stephen Hemminger793b8832005-09-14 16:06:14 -07003614 char name[ETH_GSTRING_LEN];
3615 u16 offset;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003616} sky2_stats[] = {
3617 { "tx_bytes", GM_TXO_OK_HI },
3618 { "rx_bytes", GM_RXO_OK_HI },
3619 { "tx_broadcast", GM_TXF_BC_OK },
3620 { "rx_broadcast", GM_RXF_BC_OK },
3621 { "tx_multicast", GM_TXF_MC_OK },
3622 { "rx_multicast", GM_RXF_MC_OK },
3623 { "tx_unicast", GM_TXF_UC_OK },
3624 { "rx_unicast", GM_RXF_UC_OK },
3625 { "tx_mac_pause", GM_TXF_MPAUSE },
3626 { "rx_mac_pause", GM_RXF_MPAUSE },
Stephen Hemmingereadfa7d2006-03-22 10:38:45 -08003627 { "collisions", GM_TXF_COL },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003628 { "late_collision",GM_TXF_LAT_COL },
3629 { "aborted", GM_TXF_ABO_COL },
Stephen Hemmingereadfa7d2006-03-22 10:38:45 -08003630 { "single_collisions", GM_TXF_SNG_COL },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003631 { "multi_collisions", GM_TXF_MUL_COL },
Stephen Hemmingereadfa7d2006-03-22 10:38:45 -08003632
Stephen Hemmingerd2604542006-03-23 08:51:36 -08003633 { "rx_short", GM_RXF_SHT },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003634 { "rx_runt", GM_RXE_FRAG },
Stephen Hemmingereadfa7d2006-03-22 10:38:45 -08003635 { "rx_64_byte_packets", GM_RXF_64B },
3636 { "rx_65_to_127_byte_packets", GM_RXF_127B },
3637 { "rx_128_to_255_byte_packets", GM_RXF_255B },
3638 { "rx_256_to_511_byte_packets", GM_RXF_511B },
3639 { "rx_512_to_1023_byte_packets", GM_RXF_1023B },
3640 { "rx_1024_to_1518_byte_packets", GM_RXF_1518B },
3641 { "rx_1518_to_max_byte_packets", GM_RXF_MAX_SZ },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003642 { "rx_too_long", GM_RXF_LNG_ERR },
Stephen Hemmingereadfa7d2006-03-22 10:38:45 -08003643 { "rx_fifo_overflow", GM_RXE_FIFO_OV },
3644 { "rx_jabber", GM_RXF_JAB_PKT },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003645 { "rx_fcs_error", GM_RXF_FCS_ERR },
Stephen Hemmingereadfa7d2006-03-22 10:38:45 -08003646
3647 { "tx_64_byte_packets", GM_TXF_64B },
3648 { "tx_65_to_127_byte_packets", GM_TXF_127B },
3649 { "tx_128_to_255_byte_packets", GM_TXF_255B },
3650 { "tx_256_to_511_byte_packets", GM_TXF_511B },
3651 { "tx_512_to_1023_byte_packets", GM_TXF_1023B },
3652 { "tx_1024_to_1518_byte_packets", GM_TXF_1518B },
3653 { "tx_1519_to_max_byte_packets", GM_TXF_MAX_SZ },
3654 { "tx_fifo_underrun", GM_TXE_FIFO_UR },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003655};
3656
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003657static u32 sky2_get_msglevel(struct net_device *netdev)
3658{
3659 struct sky2_port *sky2 = netdev_priv(netdev);
3660 return sky2->msg_enable;
3661}
3662
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003663static int sky2_nway_reset(struct net_device *dev)
3664{
3665 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003666
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07003667 if (!netif_running(dev) || !(sky2->flags & SKY2_FLAG_AUTO_SPEED))
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003668 return -EINVAL;
3669
Stephen Hemminger1b537562005-12-20 15:08:07 -08003670 sky2_phy_reinit(sky2);
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +01003671 sky2_set_multicast(dev);
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003672
3673 return 0;
3674}
3675
Stephen Hemminger793b8832005-09-14 16:06:14 -07003676static void sky2_phy_stats(struct sky2_port *sky2, u64 * data, unsigned count)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003677{
3678 struct sky2_hw *hw = sky2->hw;
3679 unsigned port = sky2->port;
3680 int i;
3681
stephen hemminger0885a302010-12-31 15:34:27 +00003682 data[0] = get_stats64(hw, port, GM_TXO_OK_LO);
3683 data[1] = get_stats64(hw, port, GM_RXO_OK_LO);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003684
Stephen Hemminger793b8832005-09-14 16:06:14 -07003685 for (i = 2; i < count; i++)
stephen hemminger0885a302010-12-31 15:34:27 +00003686 data[i] = get_stats32(hw, port, sky2_stats[i].offset);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003687}
3688
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003689static void sky2_set_msglevel(struct net_device *netdev, u32 value)
3690{
3691 struct sky2_port *sky2 = netdev_priv(netdev);
3692 sky2->msg_enable = value;
3693}
3694
Jeff Garzikb9f2c042007-10-03 18:07:32 -07003695static int sky2_get_sset_count(struct net_device *dev, int sset)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003696{
Jeff Garzikb9f2c042007-10-03 18:07:32 -07003697 switch (sset) {
3698 case ETH_SS_STATS:
3699 return ARRAY_SIZE(sky2_stats);
3700 default:
3701 return -EOPNOTSUPP;
3702 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003703}
3704
3705static void sky2_get_ethtool_stats(struct net_device *dev,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003706 struct ethtool_stats *stats, u64 * data)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003707{
3708 struct sky2_port *sky2 = netdev_priv(dev);
3709
Stephen Hemminger793b8832005-09-14 16:06:14 -07003710 sky2_phy_stats(sky2, data, ARRAY_SIZE(sky2_stats));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003711}
3712
Stephen Hemminger793b8832005-09-14 16:06:14 -07003713static void sky2_get_strings(struct net_device *dev, u32 stringset, u8 * data)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003714{
3715 int i;
3716
3717 switch (stringset) {
3718 case ETH_SS_STATS:
3719 for (i = 0; i < ARRAY_SIZE(sky2_stats); i++)
3720 memcpy(data + i * ETH_GSTRING_LEN,
3721 sky2_stats[i].name, ETH_GSTRING_LEN);
3722 break;
3723 }
3724}
3725
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003726static int sky2_set_mac_address(struct net_device *dev, void *p)
3727{
3728 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003729 struct sky2_hw *hw = sky2->hw;
3730 unsigned port = sky2->port;
3731 const struct sockaddr *addr = p;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003732
3733 if (!is_valid_ether_addr(addr->sa_data))
3734 return -EADDRNOTAVAIL;
3735
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003736 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003737 memcpy_toio(hw->regs + B2_MAC_1 + port * 8,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003738 dev->dev_addr, ETH_ALEN);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003739 memcpy_toio(hw->regs + B2_MAC_2 + port * 8,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003740 dev->dev_addr, ETH_ALEN);
Stephen Hemminger1b537562005-12-20 15:08:07 -08003741
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003742 /* virtual address for data */
3743 gma_set_addr(hw, port, GM_SRC_ADDR_2L, dev->dev_addr);
3744
3745 /* physical address: used for pause frames */
3746 gma_set_addr(hw, port, GM_SRC_ADDR_1L, dev->dev_addr);
Stephen Hemminger1b537562005-12-20 15:08:07 -08003747
3748 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003749}
3750
Mike McCormack060b9462010-07-29 03:34:52 +00003751static inline void sky2_add_filter(u8 filter[8], const u8 *addr)
Stephen Hemmingera052b522006-10-17 10:24:23 -07003752{
3753 u32 bit;
3754
3755 bit = ether_crc(ETH_ALEN, addr) & 63;
3756 filter[bit >> 3] |= 1 << (bit & 7);
3757}
3758
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003759static void sky2_set_multicast(struct net_device *dev)
3760{
3761 struct sky2_port *sky2 = netdev_priv(dev);
3762 struct sky2_hw *hw = sky2->hw;
3763 unsigned port = sky2->port;
Jiri Pirko22bedad32010-04-01 21:22:57 +00003764 struct netdev_hw_addr *ha;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003765 u16 reg;
3766 u8 filter[8];
Stephen Hemmingera052b522006-10-17 10:24:23 -07003767 int rx_pause;
3768 static const u8 pause_mc_addr[ETH_ALEN] = { 0x1, 0x80, 0xc2, 0x0, 0x0, 0x1 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003769
Stephen Hemmingera052b522006-10-17 10:24:23 -07003770 rx_pause = (sky2->flow_status == FC_RX || sky2->flow_status == FC_BOTH);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003771 memset(filter, 0, sizeof(filter));
3772
3773 reg = gma_read16(hw, port, GM_RX_CTRL);
3774 reg |= GM_RXCR_UCF_ENA;
3775
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07003776 if (dev->flags & IFF_PROMISC) /* promiscuous */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003777 reg &= ~(GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA);
Stephen Hemmingera052b522006-10-17 10:24:23 -07003778 else if (dev->flags & IFF_ALLMULTI)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003779 memset(filter, 0xff, sizeof(filter));
Jiri Pirko4cd24ea2010-02-08 04:30:35 +00003780 else if (netdev_mc_empty(dev) && !rx_pause)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003781 reg &= ~GM_RXCR_MCF_ENA;
3782 else {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003783 reg |= GM_RXCR_MCF_ENA;
3784
Stephen Hemmingera052b522006-10-17 10:24:23 -07003785 if (rx_pause)
3786 sky2_add_filter(filter, pause_mc_addr);
3787
Jiri Pirko22bedad32010-04-01 21:22:57 +00003788 netdev_for_each_mc_addr(ha, dev)
3789 sky2_add_filter(filter, ha->addr);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003790 }
3791
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003792 gma_write16(hw, port, GM_MC_ADDR_H1,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003793 (u16) filter[0] | ((u16) filter[1] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003794 gma_write16(hw, port, GM_MC_ADDR_H2,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003795 (u16) filter[2] | ((u16) filter[3] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003796 gma_write16(hw, port, GM_MC_ADDR_H3,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003797 (u16) filter[4] | ((u16) filter[5] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003798 gma_write16(hw, port, GM_MC_ADDR_H4,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003799 (u16) filter[6] | ((u16) filter[7] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003800
3801 gma_write16(hw, port, GM_RX_CTRL, reg);
3802}
3803
stephen hemminger0885a302010-12-31 15:34:27 +00003804static struct rtnl_link_stats64 *sky2_get_stats(struct net_device *dev,
3805 struct rtnl_link_stats64 *stats)
3806{
3807 struct sky2_port *sky2 = netdev_priv(dev);
3808 struct sky2_hw *hw = sky2->hw;
3809 unsigned port = sky2->port;
3810 unsigned int start;
3811 u64 _bytes, _packets;
3812
3813 do {
3814 start = u64_stats_fetch_begin_bh(&sky2->rx_stats.syncp);
3815 _bytes = sky2->rx_stats.bytes;
3816 _packets = sky2->rx_stats.packets;
3817 } while (u64_stats_fetch_retry_bh(&sky2->rx_stats.syncp, start));
3818
3819 stats->rx_packets = _packets;
3820 stats->rx_bytes = _bytes;
3821
3822 do {
3823 start = u64_stats_fetch_begin_bh(&sky2->tx_stats.syncp);
3824 _bytes = sky2->tx_stats.bytes;
3825 _packets = sky2->tx_stats.packets;
3826 } while (u64_stats_fetch_retry_bh(&sky2->tx_stats.syncp, start));
3827
3828 stats->tx_packets = _packets;
3829 stats->tx_bytes = _bytes;
3830
3831 stats->multicast = get_stats32(hw, port, GM_RXF_MC_OK)
3832 + get_stats32(hw, port, GM_RXF_BC_OK);
3833
3834 stats->collisions = get_stats32(hw, port, GM_TXF_COL);
3835
3836 stats->rx_length_errors = get_stats32(hw, port, GM_RXF_LNG_ERR);
3837 stats->rx_crc_errors = get_stats32(hw, port, GM_RXF_FCS_ERR);
3838 stats->rx_frame_errors = get_stats32(hw, port, GM_RXF_SHT)
3839 + get_stats32(hw, port, GM_RXE_FRAG);
3840 stats->rx_over_errors = get_stats32(hw, port, GM_RXE_FIFO_OV);
3841
3842 stats->rx_dropped = dev->stats.rx_dropped;
3843 stats->rx_fifo_errors = dev->stats.rx_fifo_errors;
3844 stats->tx_fifo_errors = dev->stats.tx_fifo_errors;
3845
3846 return stats;
3847}
3848
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003849/* Can have one global because blinking is controlled by
3850 * ethtool and that is always under RTNL mutex
3851 */
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003852static void sky2_led(struct sky2_port *sky2, enum led_mode mode)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003853{
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003854 struct sky2_hw *hw = sky2->hw;
3855 unsigned port = sky2->port;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003856
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003857 spin_lock_bh(&sky2->phy_lock);
3858 if (hw->chip_id == CHIP_ID_YUKON_EC_U ||
3859 hw->chip_id == CHIP_ID_YUKON_EX ||
3860 hw->chip_id == CHIP_ID_YUKON_SUPR) {
3861 u16 pg;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003862 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
3863 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003864
3865 switch (mode) {
3866 case MO_LED_OFF:
3867 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3868 PHY_M_LEDC_LOS_CTRL(8) |
3869 PHY_M_LEDC_INIT_CTRL(8) |
3870 PHY_M_LEDC_STA1_CTRL(8) |
3871 PHY_M_LEDC_STA0_CTRL(8));
3872 break;
3873 case MO_LED_ON:
3874 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3875 PHY_M_LEDC_LOS_CTRL(9) |
3876 PHY_M_LEDC_INIT_CTRL(9) |
3877 PHY_M_LEDC_STA1_CTRL(9) |
3878 PHY_M_LEDC_STA0_CTRL(9));
3879 break;
3880 case MO_LED_BLINK:
3881 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3882 PHY_M_LEDC_LOS_CTRL(0xa) |
3883 PHY_M_LEDC_INIT_CTRL(0xa) |
3884 PHY_M_LEDC_STA1_CTRL(0xa) |
3885 PHY_M_LEDC_STA0_CTRL(0xa));
3886 break;
3887 case MO_LED_NORM:
3888 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3889 PHY_M_LEDC_LOS_CTRL(1) |
3890 PHY_M_LEDC_INIT_CTRL(8) |
3891 PHY_M_LEDC_STA1_CTRL(7) |
3892 PHY_M_LEDC_STA0_CTRL(7));
3893 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07003894
3895 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003896 } else
Jeff Garzik7d2e3cb2008-05-13 01:41:58 -04003897 gm_phy_write(hw, port, PHY_MARV_LED_OVER,
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003898 PHY_M_LED_MO_DUP(mode) |
3899 PHY_M_LED_MO_10(mode) |
3900 PHY_M_LED_MO_100(mode) |
3901 PHY_M_LED_MO_1000(mode) |
3902 PHY_M_LED_MO_RX(mode) |
3903 PHY_M_LED_MO_TX(mode));
3904
3905 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003906}
3907
3908/* blink LED's for finding board */
stephen hemminger74e532f2011-04-04 08:43:41 +00003909static int sky2_set_phys_id(struct net_device *dev,
3910 enum ethtool_phys_id_state state)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003911{
3912 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003913
stephen hemminger74e532f2011-04-04 08:43:41 +00003914 switch (state) {
3915 case ETHTOOL_ID_ACTIVE:
Allan, Bruce Wfce55922011-04-13 13:09:10 +00003916 return 1; /* cycle on/off once per second */
stephen hemminger74e532f2011-04-04 08:43:41 +00003917 case ETHTOOL_ID_INACTIVE:
3918 sky2_led(sky2, MO_LED_NORM);
3919 break;
3920 case ETHTOOL_ID_ON:
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003921 sky2_led(sky2, MO_LED_ON);
stephen hemminger74e532f2011-04-04 08:43:41 +00003922 break;
3923 case ETHTOOL_ID_OFF:
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003924 sky2_led(sky2, MO_LED_OFF);
stephen hemminger74e532f2011-04-04 08:43:41 +00003925 break;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003926 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003927
3928 return 0;
3929}
3930
3931static void sky2_get_pauseparam(struct net_device *dev,
3932 struct ethtool_pauseparam *ecmd)
3933{
3934 struct sky2_port *sky2 = netdev_priv(dev);
3935
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003936 switch (sky2->flow_mode) {
3937 case FC_NONE:
3938 ecmd->tx_pause = ecmd->rx_pause = 0;
3939 break;
3940 case FC_TX:
3941 ecmd->tx_pause = 1, ecmd->rx_pause = 0;
3942 break;
3943 case FC_RX:
3944 ecmd->tx_pause = 0, ecmd->rx_pause = 1;
3945 break;
3946 case FC_BOTH:
3947 ecmd->tx_pause = ecmd->rx_pause = 1;
3948 }
3949
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07003950 ecmd->autoneg = (sky2->flags & SKY2_FLAG_AUTO_PAUSE)
3951 ? AUTONEG_ENABLE : AUTONEG_DISABLE;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003952}
3953
3954static int sky2_set_pauseparam(struct net_device *dev,
3955 struct ethtool_pauseparam *ecmd)
3956{
3957 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003958
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07003959 if (ecmd->autoneg == AUTONEG_ENABLE)
3960 sky2->flags |= SKY2_FLAG_AUTO_PAUSE;
3961 else
3962 sky2->flags &= ~SKY2_FLAG_AUTO_PAUSE;
3963
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003964 sky2->flow_mode = sky2_flow(ecmd->rx_pause, ecmd->tx_pause);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003965
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003966 if (netif_running(dev))
3967 sky2_phy_reinit(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003968
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07003969 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003970}
3971
Stephen Hemmingerfb17358f2005-12-09 11:34:56 -08003972static int sky2_get_coalesce(struct net_device *dev,
3973 struct ethtool_coalesce *ecmd)
3974{
3975 struct sky2_port *sky2 = netdev_priv(dev);
3976 struct sky2_hw *hw = sky2->hw;
3977
3978 if (sky2_read8(hw, STAT_TX_TIMER_CTRL) == TIM_STOP)
3979 ecmd->tx_coalesce_usecs = 0;
3980 else {
3981 u32 clks = sky2_read32(hw, STAT_TX_TIMER_INI);
3982 ecmd->tx_coalesce_usecs = sky2_clk2us(hw, clks);
3983 }
3984 ecmd->tx_max_coalesced_frames = sky2_read16(hw, STAT_TX_IDX_TH);
3985
3986 if (sky2_read8(hw, STAT_LEV_TIMER_CTRL) == TIM_STOP)
3987 ecmd->rx_coalesce_usecs = 0;
3988 else {
3989 u32 clks = sky2_read32(hw, STAT_LEV_TIMER_INI);
3990 ecmd->rx_coalesce_usecs = sky2_clk2us(hw, clks);
3991 }
3992 ecmd->rx_max_coalesced_frames = sky2_read8(hw, STAT_FIFO_WM);
3993
3994 if (sky2_read8(hw, STAT_ISR_TIMER_CTRL) == TIM_STOP)
3995 ecmd->rx_coalesce_usecs_irq = 0;
3996 else {
3997 u32 clks = sky2_read32(hw, STAT_ISR_TIMER_INI);
3998 ecmd->rx_coalesce_usecs_irq = sky2_clk2us(hw, clks);
3999 }
4000
4001 ecmd->rx_max_coalesced_frames_irq = sky2_read8(hw, STAT_FIFO_ISR_WM);
4002
4003 return 0;
4004}
4005
4006/* Note: this affect both ports */
4007static int sky2_set_coalesce(struct net_device *dev,
4008 struct ethtool_coalesce *ecmd)
4009{
4010 struct sky2_port *sky2 = netdev_priv(dev);
4011 struct sky2_hw *hw = sky2->hw;
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08004012 const u32 tmax = sky2_clk2us(hw, 0x0ffffff);
Stephen Hemmingerfb17358f2005-12-09 11:34:56 -08004013
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08004014 if (ecmd->tx_coalesce_usecs > tmax ||
4015 ecmd->rx_coalesce_usecs > tmax ||
4016 ecmd->rx_coalesce_usecs_irq > tmax)
Stephen Hemmingerfb17358f2005-12-09 11:34:56 -08004017 return -EINVAL;
4018
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00004019 if (ecmd->tx_max_coalesced_frames >= sky2->tx_ring_size-1)
Stephen Hemmingerfb17358f2005-12-09 11:34:56 -08004020 return -EINVAL;
Stephen Hemmingerff81fbb2006-02-22 11:44:59 -08004021 if (ecmd->rx_max_coalesced_frames > RX_MAX_PENDING)
Stephen Hemmingerfb17358f2005-12-09 11:34:56 -08004022 return -EINVAL;
Mike McCormack060b9462010-07-29 03:34:52 +00004023 if (ecmd->rx_max_coalesced_frames_irq > RX_MAX_PENDING)
Stephen Hemmingerfb17358f2005-12-09 11:34:56 -08004024 return -EINVAL;
4025
4026 if (ecmd->tx_coalesce_usecs == 0)
4027 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_STOP);
4028 else {
4029 sky2_write32(hw, STAT_TX_TIMER_INI,
4030 sky2_us2clk(hw, ecmd->tx_coalesce_usecs));
4031 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
4032 }
4033 sky2_write16(hw, STAT_TX_IDX_TH, ecmd->tx_max_coalesced_frames);
4034
4035 if (ecmd->rx_coalesce_usecs == 0)
4036 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_STOP);
4037 else {
4038 sky2_write32(hw, STAT_LEV_TIMER_INI,
4039 sky2_us2clk(hw, ecmd->rx_coalesce_usecs));
4040 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START);
4041 }
4042 sky2_write8(hw, STAT_FIFO_WM, ecmd->rx_max_coalesced_frames);
4043
4044 if (ecmd->rx_coalesce_usecs_irq == 0)
4045 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_STOP);
4046 else {
Stephen Hemmingerd28d4872006-01-30 11:37:56 -08004047 sky2_write32(hw, STAT_ISR_TIMER_INI,
Stephen Hemmingerfb17358f2005-12-09 11:34:56 -08004048 sky2_us2clk(hw, ecmd->rx_coalesce_usecs_irq));
4049 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START);
4050 }
4051 sky2_write8(hw, STAT_FIFO_ISR_WM, ecmd->rx_max_coalesced_frames_irq);
4052 return 0;
4053}
4054
Stephen Hemminger793b8832005-09-14 16:06:14 -07004055static void sky2_get_ringparam(struct net_device *dev,
4056 struct ethtool_ringparam *ering)
4057{
4058 struct sky2_port *sky2 = netdev_priv(dev);
4059
4060 ering->rx_max_pending = RX_MAX_PENDING;
4061 ering->rx_mini_max_pending = 0;
4062 ering->rx_jumbo_max_pending = 0;
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00004063 ering->tx_max_pending = TX_MAX_PENDING;
Stephen Hemminger793b8832005-09-14 16:06:14 -07004064
4065 ering->rx_pending = sky2->rx_pending;
4066 ering->rx_mini_pending = 0;
4067 ering->rx_jumbo_pending = 0;
4068 ering->tx_pending = sky2->tx_pending;
4069}
4070
4071static int sky2_set_ringparam(struct net_device *dev,
4072 struct ethtool_ringparam *ering)
4073{
4074 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004075
4076 if (ering->rx_pending > RX_MAX_PENDING ||
4077 ering->rx_pending < 8 ||
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00004078 ering->tx_pending < TX_MIN_PENDING ||
4079 ering->tx_pending > TX_MAX_PENDING)
Stephen Hemminger793b8832005-09-14 16:06:14 -07004080 return -EINVAL;
4081
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07004082 sky2_detach(dev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004083
4084 sky2->rx_pending = ering->rx_pending;
4085 sky2->tx_pending = ering->tx_pending;
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00004086 sky2->tx_ring_size = roundup_pow_of_two(sky2->tx_pending+1);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004087
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07004088 return sky2_reattach(dev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004089}
4090
Stephen Hemminger793b8832005-09-14 16:06:14 -07004091static int sky2_get_regs_len(struct net_device *dev)
4092{
Stephen Hemminger6e4cbb32005-09-19 15:47:57 -07004093 return 0x4000;
Stephen Hemminger793b8832005-09-14 16:06:14 -07004094}
4095
Mike McCormackc32bbff2009-12-31 00:49:43 +00004096static int sky2_reg_access_ok(struct sky2_hw *hw, unsigned int b)
4097{
4098 /* This complicated switch statement is to make sure and
4099 * only access regions that are unreserved.
4100 * Some blocks are only valid on dual port cards.
4101 */
4102 switch (b) {
4103 /* second port */
4104 case 5: /* Tx Arbiter 2 */
4105 case 9: /* RX2 */
4106 case 14 ... 15: /* TX2 */
4107 case 17: case 19: /* Ram Buffer 2 */
4108 case 22 ... 23: /* Tx Ram Buffer 2 */
4109 case 25: /* Rx MAC Fifo 1 */
4110 case 27: /* Tx MAC Fifo 2 */
4111 case 31: /* GPHY 2 */
4112 case 40 ... 47: /* Pattern Ram 2 */
4113 case 52: case 54: /* TCP Segmentation 2 */
4114 case 112 ... 116: /* GMAC 2 */
4115 return hw->ports > 1;
4116
4117 case 0: /* Control */
4118 case 2: /* Mac address */
4119 case 4: /* Tx Arbiter 1 */
4120 case 7: /* PCI express reg */
4121 case 8: /* RX1 */
4122 case 12 ... 13: /* TX1 */
4123 case 16: case 18:/* Rx Ram Buffer 1 */
4124 case 20 ... 21: /* Tx Ram Buffer 1 */
4125 case 24: /* Rx MAC Fifo 1 */
4126 case 26: /* Tx MAC Fifo 1 */
4127 case 28 ... 29: /* Descriptor and status unit */
4128 case 30: /* GPHY 1*/
4129 case 32 ... 39: /* Pattern Ram 1 */
4130 case 48: case 50: /* TCP Segmentation 1 */
4131 case 56 ... 60: /* PCI space */
4132 case 80 ... 84: /* GMAC 1 */
4133 return 1;
4134
4135 default:
4136 return 0;
4137 }
4138}
4139
Stephen Hemminger793b8832005-09-14 16:06:14 -07004140/*
4141 * Returns copy of control register region
Stephen Hemminger3ead5db2007-06-04 17:23:21 -07004142 * Note: ethtool_get_regs always provides full size (16k) buffer
Stephen Hemminger793b8832005-09-14 16:06:14 -07004143 */
4144static void sky2_get_regs(struct net_device *dev, struct ethtool_regs *regs,
4145 void *p)
4146{
4147 const struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004148 const void __iomem *io = sky2->hw->regs;
Stephen Hemminger295b54c2007-10-11 19:47:22 -07004149 unsigned int b;
Stephen Hemminger793b8832005-09-14 16:06:14 -07004150
4151 regs->version = 1;
Stephen Hemminger793b8832005-09-14 16:06:14 -07004152
Stephen Hemminger295b54c2007-10-11 19:47:22 -07004153 for (b = 0; b < 128; b++) {
Mike McCormackc32bbff2009-12-31 00:49:43 +00004154 /* skip poisonous diagnostic ram region in block 3 */
4155 if (b == 3)
Stephen Hemminger295b54c2007-10-11 19:47:22 -07004156 memcpy_fromio(p + 0x10, io + 0x10, 128 - 0x10);
Mike McCormackc32bbff2009-12-31 00:49:43 +00004157 else if (sky2_reg_access_ok(sky2->hw, b))
Stephen Hemminger295b54c2007-10-11 19:47:22 -07004158 memcpy_fromio(p, io, 128);
Mike McCormackc32bbff2009-12-31 00:49:43 +00004159 else
Stephen Hemminger295b54c2007-10-11 19:47:22 -07004160 memset(p, 0, 128);
Stephen Hemminger3ead5db2007-06-04 17:23:21 -07004161
Stephen Hemminger295b54c2007-10-11 19:47:22 -07004162 p += 128;
4163 io += 128;
4164 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07004165}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004166
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004167static int sky2_get_eeprom_len(struct net_device *dev)
4168{
4169 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08004170 struct sky2_hw *hw = sky2->hw;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004171 u16 reg2;
4172
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08004173 reg2 = sky2_pci_read16(hw, PCI_DEV_REG2);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004174 return 1 << ( ((reg2 & PCI_VPD_ROM_SZ) >> 14) + 8);
4175}
4176
Stephen Hemminger14132352008-08-27 20:46:26 -07004177static int sky2_vpd_wait(const struct sky2_hw *hw, int cap, u16 busy)
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004178{
Stephen Hemminger14132352008-08-27 20:46:26 -07004179 unsigned long start = jiffies;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004180
Stephen Hemminger14132352008-08-27 20:46:26 -07004181 while ( (sky2_pci_read16(hw, cap + PCI_VPD_ADDR) & PCI_VPD_ADDR_F) == busy) {
4182 /* Can take up to 10.6 ms for write */
4183 if (time_after(jiffies, start + HZ/4)) {
Joe Perchesada1db52010-02-17 15:01:59 +00004184 dev_err(&hw->pdev->dev, "VPD cycle timed out\n");
Stephen Hemminger14132352008-08-27 20:46:26 -07004185 return -ETIMEDOUT;
4186 }
4187 mdelay(1);
4188 }
Stephen Hemminger167f53d2007-09-25 19:01:02 -07004189
Stephen Hemminger14132352008-08-27 20:46:26 -07004190 return 0;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004191}
4192
Stephen Hemminger14132352008-08-27 20:46:26 -07004193static int sky2_vpd_read(struct sky2_hw *hw, int cap, void *data,
4194 u16 offset, size_t length)
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004195{
Stephen Hemminger14132352008-08-27 20:46:26 -07004196 int rc = 0;
4197
4198 while (length > 0) {
4199 u32 val;
4200
4201 sky2_pci_write16(hw, cap + PCI_VPD_ADDR, offset);
4202 rc = sky2_vpd_wait(hw, cap, 0);
4203 if (rc)
4204 break;
4205
4206 val = sky2_pci_read32(hw, cap + PCI_VPD_DATA);
4207
4208 memcpy(data, &val, min(sizeof(val), length));
4209 offset += sizeof(u32);
4210 data += sizeof(u32);
4211 length -= sizeof(u32);
4212 }
4213
4214 return rc;
4215}
4216
4217static int sky2_vpd_write(struct sky2_hw *hw, int cap, const void *data,
4218 u16 offset, unsigned int length)
4219{
4220 unsigned int i;
4221 int rc = 0;
4222
4223 for (i = 0; i < length; i += sizeof(u32)) {
4224 u32 val = *(u32 *)(data + i);
4225
4226 sky2_pci_write32(hw, cap + PCI_VPD_DATA, val);
4227 sky2_pci_write32(hw, cap + PCI_VPD_ADDR, offset | PCI_VPD_ADDR_F);
4228
4229 rc = sky2_vpd_wait(hw, cap, PCI_VPD_ADDR_F);
4230 if (rc)
4231 break;
4232 }
4233 return rc;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004234}
4235
4236static int sky2_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
4237 u8 *data)
4238{
4239 struct sky2_port *sky2 = netdev_priv(dev);
4240 int cap = pci_find_capability(sky2->hw->pdev, PCI_CAP_ID_VPD);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004241
4242 if (!cap)
4243 return -EINVAL;
4244
4245 eeprom->magic = SKY2_EEPROM_MAGIC;
4246
Stephen Hemminger14132352008-08-27 20:46:26 -07004247 return sky2_vpd_read(sky2->hw, cap, data, eeprom->offset, eeprom->len);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004248}
4249
4250static int sky2_set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
4251 u8 *data)
4252{
4253 struct sky2_port *sky2 = netdev_priv(dev);
4254 int cap = pci_find_capability(sky2->hw->pdev, PCI_CAP_ID_VPD);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004255
4256 if (!cap)
4257 return -EINVAL;
4258
4259 if (eeprom->magic != SKY2_EEPROM_MAGIC)
4260 return -EINVAL;
4261
Stephen Hemminger14132352008-08-27 20:46:26 -07004262 /* Partial writes not supported */
4263 if ((eeprom->offset & 3) || (eeprom->len & 3))
4264 return -EINVAL;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004265
Stephen Hemminger14132352008-08-27 20:46:26 -07004266 return sky2_vpd_write(sky2->hw, cap, data, eeprom->offset, eeprom->len);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004267}
4268
Michał Mirosławf5d64032011-04-10 03:13:21 +00004269static u32 sky2_fix_features(struct net_device *dev, u32 features)
4270{
4271 const struct sky2_port *sky2 = netdev_priv(dev);
4272 const struct sky2_hw *hw = sky2->hw;
4273
4274 /* In order to do Jumbo packets on these chips, need to turn off the
4275 * transmit store/forward. Therefore checksum offload won't work.
4276 */
stephen hemmingeraa5ca962011-07-07 13:40:00 +00004277 if (dev->mtu > ETH_DATA_LEN && hw->chip_id == CHIP_ID_YUKON_EC_U) {
4278 netdev_info(dev, "checksum offload not possible with jumbo frames\n");
Michał Mirosławf5d64032011-04-10 03:13:21 +00004279 features &= ~(NETIF_F_TSO|NETIF_F_SG|NETIF_F_ALL_CSUM);
stephen hemmingeraa5ca962011-07-07 13:40:00 +00004280 }
4281
4282 /* Some hardware requires receive checksum for RSS to work. */
4283 if ( (features & NETIF_F_RXHASH) &&
4284 !(features & NETIF_F_RXCSUM) &&
4285 (sky2->hw->flags & SKY2_HW_RSS_CHKSUM)) {
4286 netdev_info(dev, "receive hashing forces receive checksum\n");
4287 features |= NETIF_F_RXCSUM;
4288 }
Michał Mirosławf5d64032011-04-10 03:13:21 +00004289
4290 return features;
4291}
4292
4293static int sky2_set_features(struct net_device *dev, u32 features)
Stephen Hemmingerbf731302010-04-24 20:04:12 -07004294{
4295 struct sky2_port *sky2 = netdev_priv(dev);
Michał Mirosławf5d64032011-04-10 03:13:21 +00004296 u32 changed = dev->features ^ features;
Stephen Hemmingerbf731302010-04-24 20:04:12 -07004297
Michał Mirosławf5d64032011-04-10 03:13:21 +00004298 if (changed & NETIF_F_RXCSUM) {
4299 u32 on = features & NETIF_F_RXCSUM;
4300 sky2_write32(sky2->hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
4301 on ? BMU_ENA_RX_CHKSUM : BMU_DIS_RX_CHKSUM);
4302 }
Stephen Hemminger86aa7782011-01-09 15:54:15 -08004303
Michał Mirosławf5d64032011-04-10 03:13:21 +00004304 if (changed & NETIF_F_RXHASH)
4305 rx_set_rss(dev, features);
Stephen Hemminger86aa7782011-01-09 15:54:15 -08004306
Michał Mirosławf5d64032011-04-10 03:13:21 +00004307 if (changed & (NETIF_F_HW_VLAN_TX|NETIF_F_HW_VLAN_RX))
4308 sky2_vlan_mode(dev, features);
Stephen Hemmingerbf731302010-04-24 20:04:12 -07004309
4310 return 0;
4311}
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004312
Jeff Garzik7282d492006-09-13 14:30:00 -04004313static const struct ethtool_ops sky2_ethtool_ops = {
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004314 .get_settings = sky2_get_settings,
4315 .set_settings = sky2_set_settings,
4316 .get_drvinfo = sky2_get_drvinfo,
4317 .get_wol = sky2_get_wol,
4318 .set_wol = sky2_set_wol,
4319 .get_msglevel = sky2_get_msglevel,
4320 .set_msglevel = sky2_set_msglevel,
4321 .nway_reset = sky2_nway_reset,
4322 .get_regs_len = sky2_get_regs_len,
4323 .get_regs = sky2_get_regs,
4324 .get_link = ethtool_op_get_link,
4325 .get_eeprom_len = sky2_get_eeprom_len,
4326 .get_eeprom = sky2_get_eeprom,
4327 .set_eeprom = sky2_set_eeprom,
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004328 .get_strings = sky2_get_strings,
4329 .get_coalesce = sky2_get_coalesce,
4330 .set_coalesce = sky2_set_coalesce,
4331 .get_ringparam = sky2_get_ringparam,
4332 .set_ringparam = sky2_set_ringparam,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004333 .get_pauseparam = sky2_get_pauseparam,
4334 .set_pauseparam = sky2_set_pauseparam,
stephen hemminger74e532f2011-04-04 08:43:41 +00004335 .set_phys_id = sky2_set_phys_id,
Jeff Garzikb9f2c042007-10-03 18:07:32 -07004336 .get_sset_count = sky2_get_sset_count,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004337 .get_ethtool_stats = sky2_get_ethtool_stats,
4338};
4339
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004340#ifdef CONFIG_SKY2_DEBUG
4341
4342static struct dentry *sky2_debug;
4343
Stephen Hemmingere4c2abe2009-02-03 11:27:29 +00004344
4345/*
4346 * Read and parse the first part of Vital Product Data
4347 */
4348#define VPD_SIZE 128
4349#define VPD_MAGIC 0x82
4350
4351static const struct vpd_tag {
4352 char tag[2];
4353 char *label;
4354} vpd_tags[] = {
4355 { "PN", "Part Number" },
4356 { "EC", "Engineering Level" },
4357 { "MN", "Manufacturer" },
4358 { "SN", "Serial Number" },
4359 { "YA", "Asset Tag" },
4360 { "VL", "First Error Log Message" },
4361 { "VF", "Second Error Log Message" },
4362 { "VB", "Boot Agent ROM Configuration" },
4363 { "VE", "EFI UNDI Configuration" },
4364};
4365
4366static void sky2_show_vpd(struct seq_file *seq, struct sky2_hw *hw)
4367{
4368 size_t vpd_size;
4369 loff_t offs;
4370 u8 len;
4371 unsigned char *buf;
4372 u16 reg2;
4373
4374 reg2 = sky2_pci_read16(hw, PCI_DEV_REG2);
4375 vpd_size = 1 << ( ((reg2 & PCI_VPD_ROM_SZ) >> 14) + 8);
4376
4377 seq_printf(seq, "%s Product Data\n", pci_name(hw->pdev));
4378 buf = kmalloc(vpd_size, GFP_KERNEL);
4379 if (!buf) {
4380 seq_puts(seq, "no memory!\n");
4381 return;
4382 }
4383
4384 if (pci_read_vpd(hw->pdev, 0, vpd_size, buf) < 0) {
4385 seq_puts(seq, "VPD read failed\n");
4386 goto out;
4387 }
4388
4389 if (buf[0] != VPD_MAGIC) {
4390 seq_printf(seq, "VPD tag mismatch: %#x\n", buf[0]);
4391 goto out;
4392 }
4393 len = buf[1];
4394 if (len == 0 || len > vpd_size - 4) {
4395 seq_printf(seq, "Invalid id length: %d\n", len);
4396 goto out;
4397 }
4398
4399 seq_printf(seq, "%.*s\n", len, buf + 3);
4400 offs = len + 3;
4401
4402 while (offs < vpd_size - 4) {
4403 int i;
4404
4405 if (!memcmp("RW", buf + offs, 2)) /* end marker */
4406 break;
4407 len = buf[offs + 2];
4408 if (offs + len + 3 >= vpd_size)
4409 break;
4410
4411 for (i = 0; i < ARRAY_SIZE(vpd_tags); i++) {
4412 if (!memcmp(vpd_tags[i].tag, buf + offs, 2)) {
4413 seq_printf(seq, " %s: %.*s\n",
4414 vpd_tags[i].label, len, buf + offs + 3);
4415 break;
4416 }
4417 }
4418 offs += len + 3;
4419 }
4420out:
4421 kfree(buf);
4422}
4423
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004424static int sky2_debug_show(struct seq_file *seq, void *v)
4425{
4426 struct net_device *dev = seq->private;
4427 const struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07004428 struct sky2_hw *hw = sky2->hw;
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004429 unsigned port = sky2->port;
4430 unsigned idx, last;
4431 int sop;
4432
Stephen Hemmingere4c2abe2009-02-03 11:27:29 +00004433 sky2_show_vpd(seq, hw);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004434
Stephen Hemmingere4c2abe2009-02-03 11:27:29 +00004435 seq_printf(seq, "\nIRQ src=%x mask=%x control=%x\n",
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004436 sky2_read32(hw, B0_ISRC),
4437 sky2_read32(hw, B0_IMSK),
4438 sky2_read32(hw, B0_Y2_SP_ICR));
4439
Stephen Hemmingere4c2abe2009-02-03 11:27:29 +00004440 if (!netif_running(dev)) {
4441 seq_printf(seq, "network not running\n");
4442 return 0;
4443 }
4444
Stephen Hemmingerbea33482007-10-03 16:41:36 -07004445 napi_disable(&hw->napi);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004446 last = sky2_read16(hw, STAT_PUT_IDX);
4447
stephen hemmingerefe91932010-04-22 13:42:56 +00004448 seq_printf(seq, "Status ring %u\n", hw->st_size);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004449 if (hw->st_idx == last)
4450 seq_puts(seq, "Status ring (empty)\n");
4451 else {
4452 seq_puts(seq, "Status ring\n");
stephen hemmingerefe91932010-04-22 13:42:56 +00004453 for (idx = hw->st_idx; idx != last && idx < hw->st_size;
4454 idx = RING_NEXT(idx, hw->st_size)) {
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004455 const struct sky2_status_le *le = hw->st_le + idx;
4456 seq_printf(seq, "[%d] %#x %d %#x\n",
4457 idx, le->opcode, le->length, le->status);
4458 }
4459 seq_puts(seq, "\n");
4460 }
4461
4462 seq_printf(seq, "Tx ring pending=%u...%u report=%d done=%d\n",
4463 sky2->tx_cons, sky2->tx_prod,
4464 sky2_read16(hw, port == 0 ? STAT_TXA1_RIDX : STAT_TXA2_RIDX),
4465 sky2_read16(hw, Q_ADDR(txqaddr[port], Q_DONE)));
4466
4467 /* Dump contents of tx ring */
4468 sop = 1;
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00004469 for (idx = sky2->tx_next; idx != sky2->tx_prod && idx < sky2->tx_ring_size;
4470 idx = RING_NEXT(idx, sky2->tx_ring_size)) {
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004471 const struct sky2_tx_le *le = sky2->tx_le + idx;
4472 u32 a = le32_to_cpu(le->addr);
4473
4474 if (sop)
4475 seq_printf(seq, "%u:", idx);
4476 sop = 0;
4477
Mike McCormack060b9462010-07-29 03:34:52 +00004478 switch (le->opcode & ~HW_OWNER) {
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004479 case OP_ADDR64:
4480 seq_printf(seq, " %#x:", a);
4481 break;
4482 case OP_LRGLEN:
4483 seq_printf(seq, " mtu=%d", a);
4484 break;
4485 case OP_VLAN:
4486 seq_printf(seq, " vlan=%d", be16_to_cpu(le->length));
4487 break;
4488 case OP_TCPLISW:
4489 seq_printf(seq, " csum=%#x", a);
4490 break;
4491 case OP_LARGESEND:
4492 seq_printf(seq, " tso=%#x(%d)", a, le16_to_cpu(le->length));
4493 break;
4494 case OP_PACKET:
4495 seq_printf(seq, " %#x(%d)", a, le16_to_cpu(le->length));
4496 break;
4497 case OP_BUFFER:
4498 seq_printf(seq, " frag=%#x(%d)", a, le16_to_cpu(le->length));
4499 break;
4500 default:
4501 seq_printf(seq, " op=%#x,%#x(%d)", le->opcode,
4502 a, le16_to_cpu(le->length));
4503 }
4504
4505 if (le->ctrl & EOP) {
4506 seq_putc(seq, '\n');
4507 sop = 1;
4508 }
4509 }
4510
4511 seq_printf(seq, "\nRx ring hw get=%d put=%d last=%d\n",
4512 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_GET_IDX)),
Mike McCormackc409c342009-07-21 14:51:20 +00004513 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_PUT_IDX)),
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004514 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_LAST_IDX)));
4515
David S. Millerd1d08d12008-01-07 20:53:33 -08004516 sky2_read32(hw, B0_Y2_SP_LISR);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07004517 napi_enable(&hw->napi);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004518 return 0;
4519}
4520
4521static int sky2_debug_open(struct inode *inode, struct file *file)
4522{
4523 return single_open(file, sky2_debug_show, inode->i_private);
4524}
4525
4526static const struct file_operations sky2_debug_fops = {
4527 .owner = THIS_MODULE,
4528 .open = sky2_debug_open,
4529 .read = seq_read,
4530 .llseek = seq_lseek,
4531 .release = single_release,
4532};
4533
4534/*
4535 * Use network device events to create/remove/rename
4536 * debugfs file entries
4537 */
4538static int sky2_device_event(struct notifier_block *unused,
4539 unsigned long event, void *ptr)
4540{
4541 struct net_device *dev = ptr;
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07004542 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004543
Stephen Hemminger1436b3012008-11-19 21:59:54 -08004544 if (dev->netdev_ops->ndo_open != sky2_up || !sky2_debug)
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07004545 return NOTIFY_DONE;
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004546
Mike McCormack060b9462010-07-29 03:34:52 +00004547 switch (event) {
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07004548 case NETDEV_CHANGENAME:
4549 if (sky2->debugfs) {
4550 sky2->debugfs = debugfs_rename(sky2_debug, sky2->debugfs,
4551 sky2_debug, dev->name);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004552 }
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07004553 break;
4554
4555 case NETDEV_GOING_DOWN:
4556 if (sky2->debugfs) {
Joe Perchesada1db52010-02-17 15:01:59 +00004557 netdev_printk(KERN_DEBUG, dev, "remove debugfs\n");
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07004558 debugfs_remove(sky2->debugfs);
4559 sky2->debugfs = NULL;
4560 }
4561 break;
4562
4563 case NETDEV_UP:
4564 sky2->debugfs = debugfs_create_file(dev->name, S_IRUGO,
4565 sky2_debug, dev,
4566 &sky2_debug_fops);
4567 if (IS_ERR(sky2->debugfs))
4568 sky2->debugfs = NULL;
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004569 }
4570
4571 return NOTIFY_DONE;
4572}
4573
4574static struct notifier_block sky2_notifier = {
4575 .notifier_call = sky2_device_event,
4576};
4577
4578
4579static __init void sky2_debug_init(void)
4580{
4581 struct dentry *ent;
4582
4583 ent = debugfs_create_dir("sky2", NULL);
4584 if (!ent || IS_ERR(ent))
4585 return;
4586
4587 sky2_debug = ent;
4588 register_netdevice_notifier(&sky2_notifier);
4589}
4590
4591static __exit void sky2_debug_cleanup(void)
4592{
4593 if (sky2_debug) {
4594 unregister_netdevice_notifier(&sky2_notifier);
4595 debugfs_remove(sky2_debug);
4596 sky2_debug = NULL;
4597 }
4598}
4599
4600#else
4601#define sky2_debug_init()
4602#define sky2_debug_cleanup()
4603#endif
4604
Stephen Hemminger1436b3012008-11-19 21:59:54 -08004605/* Two copies of network device operations to handle special case of
4606 not allowing netpoll on second port */
4607static const struct net_device_ops sky2_netdev_ops[2] = {
4608 {
4609 .ndo_open = sky2_up,
4610 .ndo_stop = sky2_down,
Stephen Hemminger00829822008-11-20 20:14:53 -08004611 .ndo_start_xmit = sky2_xmit_frame,
Stephen Hemminger1436b3012008-11-19 21:59:54 -08004612 .ndo_do_ioctl = sky2_ioctl,
4613 .ndo_validate_addr = eth_validate_addr,
4614 .ndo_set_mac_address = sky2_set_mac_address,
4615 .ndo_set_multicast_list = sky2_set_multicast,
4616 .ndo_change_mtu = sky2_change_mtu,
Michał Mirosławf5d64032011-04-10 03:13:21 +00004617 .ndo_fix_features = sky2_fix_features,
4618 .ndo_set_features = sky2_set_features,
Stephen Hemminger1436b3012008-11-19 21:59:54 -08004619 .ndo_tx_timeout = sky2_tx_timeout,
stephen hemminger0885a302010-12-31 15:34:27 +00004620 .ndo_get_stats64 = sky2_get_stats,
Stephen Hemminger1436b3012008-11-19 21:59:54 -08004621#ifdef CONFIG_NET_POLL_CONTROLLER
4622 .ndo_poll_controller = sky2_netpoll,
4623#endif
4624 },
4625 {
4626 .ndo_open = sky2_up,
4627 .ndo_stop = sky2_down,
Stephen Hemminger00829822008-11-20 20:14:53 -08004628 .ndo_start_xmit = sky2_xmit_frame,
Stephen Hemminger1436b3012008-11-19 21:59:54 -08004629 .ndo_do_ioctl = sky2_ioctl,
4630 .ndo_validate_addr = eth_validate_addr,
4631 .ndo_set_mac_address = sky2_set_mac_address,
4632 .ndo_set_multicast_list = sky2_set_multicast,
4633 .ndo_change_mtu = sky2_change_mtu,
Michał Mirosławf5d64032011-04-10 03:13:21 +00004634 .ndo_fix_features = sky2_fix_features,
4635 .ndo_set_features = sky2_set_features,
Stephen Hemminger1436b3012008-11-19 21:59:54 -08004636 .ndo_tx_timeout = sky2_tx_timeout,
stephen hemminger0885a302010-12-31 15:34:27 +00004637 .ndo_get_stats64 = sky2_get_stats,
Stephen Hemminger1436b3012008-11-19 21:59:54 -08004638 },
4639};
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004640
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004641/* Initialize network device */
4642static __devinit struct net_device *sky2_init_netdev(struct sky2_hw *hw,
Stephen Hemmingere3173832007-02-06 10:45:39 -08004643 unsigned port,
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004644 int highmem, int wol)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004645{
4646 struct sky2_port *sky2;
4647 struct net_device *dev = alloc_etherdev(sizeof(*sky2));
4648
4649 if (!dev) {
Joe Perches898eb712007-10-18 03:06:30 -07004650 dev_err(&hw->pdev->dev, "etherdev alloc failed\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004651 return NULL;
4652 }
4653
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004654 SET_NETDEV_DEV(dev, &hw->pdev->dev);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08004655 dev->irq = hw->pdev->irq;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004656 SET_ETHTOOL_OPS(dev, &sky2_ethtool_ops);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004657 dev->watchdog_timeo = TX_WATCHDOG;
Stephen Hemminger1436b3012008-11-19 21:59:54 -08004658 dev->netdev_ops = &sky2_netdev_ops[port];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004659
4660 sky2 = netdev_priv(dev);
4661 sky2->netdev = dev;
4662 sky2->hw = hw;
4663 sky2->msg_enable = netif_msg_init(debug, default_msg);
4664
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004665 /* Auto speed and flow control */
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07004666 sky2->flags = SKY2_FLAG_AUTO_SPEED | SKY2_FLAG_AUTO_PAUSE;
4667 if (hw->chip_id != CHIP_ID_YUKON_XL)
Michał Mirosławf5d64032011-04-10 03:13:21 +00004668 dev->hw_features |= NETIF_F_RXCSUM;
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07004669
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07004670 sky2->flow_mode = FC_BOTH;
4671
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004672 sky2->duplex = -1;
4673 sky2->speed = -1;
4674 sky2->advertising = sky2_supported_modes(hw);
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004675 sky2->wol = wol;
Stephen Hemminger75d070c2005-12-09 11:35:11 -08004676
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08004677 spin_lock_init(&sky2->phy_lock);
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00004678
Stephen Hemminger793b8832005-09-14 16:06:14 -07004679 sky2->tx_pending = TX_DEF_PENDING;
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00004680 sky2->tx_ring_size = roundup_pow_of_two(TX_DEF_PENDING+1);
Stephen Hemminger290d4de2006-03-20 15:48:15 -08004681 sky2->rx_pending = RX_DEF_PENDING;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004682
4683 hw->dev[port] = dev;
4684
4685 sky2->port = port;
4686
Michał Mirosławf5d64032011-04-10 03:13:21 +00004687 dev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_SG | NETIF_F_TSO;
Stephen Hemminger86aa7782011-01-09 15:54:15 -08004688
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004689 if (highmem)
4690 dev->features |= NETIF_F_HIGHDMA;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004691
Stephen Hemmingerbf731302010-04-24 20:04:12 -07004692 /* Enable receive hashing unless hardware is known broken */
4693 if (!(hw->flags & SKY2_HW_RSS_BROKEN))
Michał Mirosławf5d64032011-04-10 03:13:21 +00004694 dev->hw_features |= NETIF_F_RXHASH;
Stephen Hemmingerbf731302010-04-24 20:04:12 -07004695
Michał Mirosławf5d64032011-04-10 03:13:21 +00004696 if (!(hw->flags & SKY2_HW_VLAN_BROKEN)) {
4697 dev->hw_features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
4698 dev->vlan_features |= SKY2_VLAN_OFFLOADS;
4699 }
4700
4701 dev->features |= dev->hw_features;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07004702
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004703 /* read the mac address */
Stephen Hemminger793b8832005-09-14 16:06:14 -07004704 memcpy_fromio(dev->dev_addr, hw->regs + B2_MAC_1 + port * 8, ETH_ALEN);
Stephen Hemminger2995bfb72005-09-28 10:01:03 -07004705 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004706
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004707 return dev;
4708}
4709
Stephen Hemminger28bd1812006-01-17 13:43:19 -08004710static void __devinit sky2_show_addr(struct net_device *dev)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004711{
4712 const struct sky2_port *sky2 = netdev_priv(dev);
4713
Joe Perches6c35aba2010-02-15 08:34:21 +00004714 netif_info(sky2, probe, dev, "addr %pM\n", dev->dev_addr);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004715}
4716
Stephen Hemmingerfb2690a92006-03-20 15:48:19 -08004717/* Handle software interrupt used during MSI test */
David Howells7d12e782006-10-05 14:55:46 +01004718static irqreturn_t __devinit sky2_test_intr(int irq, void *dev_id)
Stephen Hemmingerfb2690a92006-03-20 15:48:19 -08004719{
4720 struct sky2_hw *hw = dev_id;
4721 u32 status = sky2_read32(hw, B0_Y2_SP_ISRC2);
4722
4723 if (status == 0)
4724 return IRQ_NONE;
4725
4726 if (status & Y2_IS_IRQ_SW) {
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004727 hw->flags |= SKY2_HW_USE_MSI;
Stephen Hemmingerfb2690a92006-03-20 15:48:19 -08004728 wake_up(&hw->msi_wait);
4729 sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ);
4730 }
4731 sky2_write32(hw, B0_Y2_SP_ICR, 2);
4732
4733 return IRQ_HANDLED;
4734}
4735
4736/* Test interrupt path by forcing a a software IRQ */
4737static int __devinit sky2_test_msi(struct sky2_hw *hw)
4738{
4739 struct pci_dev *pdev = hw->pdev;
4740 int err;
4741
Mike McCormack060b9462010-07-29 03:34:52 +00004742 init_waitqueue_head(&hw->msi_wait);
shemminger@osdl.orgbb507fe2006-08-28 10:00:48 -07004743
Stephen Hemmingerfb2690a92006-03-20 15:48:19 -08004744 sky2_write32(hw, B0_IMSK, Y2_IS_IRQ_SW);
4745
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004746 err = request_irq(pdev->irq, sky2_test_intr, 0, DRV_NAME, hw);
Stephen Hemmingerfb2690a92006-03-20 15:48:19 -08004747 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004748 dev_err(&pdev->dev, "cannot assign irq %d\n", pdev->irq);
Stephen Hemmingerfb2690a92006-03-20 15:48:19 -08004749 return err;
4750 }
4751
Stephen Hemmingerfb2690a92006-03-20 15:48:19 -08004752 sky2_write8(hw, B0_CTST, CS_ST_SW_IRQ);
shemminger@osdl.orgbb507fe2006-08-28 10:00:48 -07004753 sky2_read8(hw, B0_CTST);
Stephen Hemmingerfb2690a92006-03-20 15:48:19 -08004754
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004755 wait_event_timeout(hw->msi_wait, (hw->flags & SKY2_HW_USE_MSI), HZ/10);
Stephen Hemmingerfb2690a92006-03-20 15:48:19 -08004756
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004757 if (!(hw->flags & SKY2_HW_USE_MSI)) {
Stephen Hemmingerfb2690a92006-03-20 15:48:19 -08004758 /* MSI test failed, go back to INTx mode */
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004759 dev_info(&pdev->dev, "No interrupt generated using MSI, "
4760 "switching to INTx mode.\n");
Stephen Hemmingerfb2690a92006-03-20 15:48:19 -08004761
4762 err = -EOPNOTSUPP;
4763 sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ);
4764 }
4765
4766 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemminger2bffc232006-10-17 10:17:18 -07004767 sky2_read32(hw, B0_IMSK);
Stephen Hemmingerfb2690a92006-03-20 15:48:19 -08004768
4769 free_irq(pdev->irq, hw);
4770
4771 return err;
4772}
4773
Stephen Hemmingerc7127a32008-06-17 09:04:25 -07004774/* This driver supports yukon2 chipset only */
4775static const char *sky2_name(u8 chipid, char *buf, int sz)
4776{
4777 const char *name[] = {
4778 "XL", /* 0xb3 */
4779 "EC Ultra", /* 0xb4 */
4780 "Extreme", /* 0xb5 */
4781 "EC", /* 0xb6 */
4782 "FE", /* 0xb7 */
4783 "FE+", /* 0xb8 */
4784 "Supreme", /* 0xb9 */
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07004785 "UL 2", /* 0xba */
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00004786 "Unknown", /* 0xbb */
4787 "Optima", /* 0xbc */
stephen hemminger4fb99cd2011-07-07 05:50:59 +00004788 "Optima Prime", /* 0xbd */
4789 "Optima 2", /* 0xbe */
Stephen Hemmingerc7127a32008-06-17 09:04:25 -07004790 };
4791
stephen hemminger4fb99cd2011-07-07 05:50:59 +00004792 if (chipid >= CHIP_ID_YUKON_XL && chipid <= CHIP_ID_YUKON_OP_2)
Stephen Hemmingerc7127a32008-06-17 09:04:25 -07004793 strncpy(buf, name[chipid - CHIP_ID_YUKON_XL], sz);
4794 else
4795 snprintf(buf, sz, "(chip %#x)", chipid);
4796 return buf;
4797}
4798
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004799static int __devinit sky2_probe(struct pci_dev *pdev,
4800 const struct pci_device_id *ent)
4801{
shemminger@linux-foundation.org7f60c64b2007-01-26 11:38:36 -08004802 struct net_device *dev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004803 struct sky2_hw *hw;
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004804 int err, using_dac = 0, wol_default;
Stephen Hemminger38345072009-02-03 11:27:30 +00004805 u32 reg;
Stephen Hemmingerc7127a32008-06-17 09:04:25 -07004806 char buf1[16];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004807
Stephen Hemminger793b8832005-09-14 16:06:14 -07004808 err = pci_enable_device(pdev);
4809 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004810 dev_err(&pdev->dev, "cannot enable PCI device\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004811 goto err_out;
4812 }
4813
Stephen Hemminger6cc90a52009-06-11 07:03:47 +00004814 /* Get configuration information
4815 * Note: only regular PCI config access once to test for HW issues
4816 * other PCI access through shared memory for speed and to
4817 * avoid MMCONFIG problems.
4818 */
4819 err = pci_read_config_dword(pdev, PCI_DEV_REG2, &reg);
4820 if (err) {
4821 dev_err(&pdev->dev, "PCI read config failed\n");
4822 goto err_out;
4823 }
4824
4825 if (~reg == 0) {
4826 dev_err(&pdev->dev, "PCI configuration read error\n");
4827 goto err_out;
4828 }
4829
Stephen Hemminger793b8832005-09-14 16:06:14 -07004830 err = pci_request_regions(pdev, DRV_NAME);
4831 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004832 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
Stephen Hemminger44a1d2e2007-04-30 14:23:49 -07004833 goto err_out_disable;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004834 }
4835
4836 pci_set_master(pdev);
4837
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004838 if (sizeof(dma_addr_t) > sizeof(u32) &&
Yang Hongyang6a355282009-04-06 19:01:13 -07004839 !(err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))) {
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004840 using_dac = 1;
Yang Hongyang6a355282009-04-06 19:01:13 -07004841 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004842 if (err < 0) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004843 dev_err(&pdev->dev, "unable to obtain 64 bit DMA "
4844 "for consistent allocations\n");
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004845 goto err_out_free_regions;
4846 }
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004847 } else {
Yang Hongyang284901a2009-04-06 19:01:15 -07004848 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004849 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004850 dev_err(&pdev->dev, "no usable DMA configuration\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004851 goto err_out_free_regions;
4852 }
4853 }
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004854
Stephen Hemminger38345072009-02-03 11:27:30 +00004855
4856#ifdef __BIG_ENDIAN
4857 /* The sk98lin vendor driver uses hardware byte swapping but
4858 * this driver uses software swapping.
4859 */
4860 reg &= ~PCI_REV_DESC;
Mike McCormack060b9462010-07-29 03:34:52 +00004861 err = pci_write_config_dword(pdev, PCI_DEV_REG2, reg);
Stephen Hemminger38345072009-02-03 11:27:30 +00004862 if (err) {
4863 dev_err(&pdev->dev, "PCI write config failed\n");
4864 goto err_out_free_regions;
4865 }
4866#endif
4867
Rafael J. Wysocki9d731d72008-10-12 20:59:48 -07004868 wol_default = device_may_wakeup(&pdev->dev) ? WAKE_MAGIC : 0;
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004869
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004870 err = -ENOMEM;
Stephen Hemminger66466792009-10-01 07:11:46 +00004871
4872 hw = kzalloc(sizeof(*hw) + strlen(DRV_NAME "@pci:")
4873 + strlen(pci_name(pdev)) + 1, GFP_KERNEL);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004874 if (!hw) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004875 dev_err(&pdev->dev, "cannot allocate hardware struct\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004876 goto err_out_free_regions;
4877 }
4878
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004879 hw->pdev = pdev;
Stephen Hemminger66466792009-10-01 07:11:46 +00004880 sprintf(hw->irq_name, DRV_NAME "@pci:%s", pci_name(pdev));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004881
4882 hw->regs = ioremap_nocache(pci_resource_start(pdev, 0), 0x4000);
4883 if (!hw->regs) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004884 dev_err(&pdev->dev, "cannot map device registers\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004885 goto err_out_free_hw;
4886 }
4887
Stephen Hemmingere3173832007-02-06 10:45:39 -08004888 err = sky2_init(hw);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004889 if (err)
Stephen Hemminger793b8832005-09-14 16:06:14 -07004890 goto err_out_iounmap;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004891
stephen hemmingerefe91932010-04-22 13:42:56 +00004892 /* ring for status responses */
Stephen Hemmingerbf731302010-04-24 20:04:12 -07004893 hw->st_size = hw->ports * roundup_pow_of_two(3*RX_MAX_PENDING + TX_MAX_PENDING);
stephen hemmingerefe91932010-04-22 13:42:56 +00004894 hw->st_le = pci_alloc_consistent(pdev, hw->st_size * sizeof(struct sky2_status_le),
4895 &hw->st_dma);
4896 if (!hw->st_le)
4897 goto err_out_reset;
4898
Stephen Hemmingerc844d482008-08-27 20:48:23 -07004899 dev_info(&pdev->dev, "Yukon-2 %s chip revision %d\n",
4900 sky2_name(hw->chip_id, buf1, sizeof(buf1)), hw->chip_rev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004901
Stephen Hemmingere3173832007-02-06 10:45:39 -08004902 sky2_reset(hw);
4903
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004904 dev = sky2_init_netdev(hw, 0, using_dac, wol_default);
shemminger@linux-foundation.org7f60c64b2007-01-26 11:38:36 -08004905 if (!dev) {
4906 err = -ENOMEM;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004907 goto err_out_free_pci;
shemminger@linux-foundation.org7f60c64b2007-01-26 11:38:36 -08004908 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004909
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004910 if (!disable_msi && pci_enable_msi(pdev) == 0) {
4911 err = sky2_test_msi(hw);
4912 if (err == -EOPNOTSUPP)
4913 pci_disable_msi(pdev);
4914 else if (err)
4915 goto err_out_free_netdev;
4916 }
4917
Stephen Hemminger793b8832005-09-14 16:06:14 -07004918 err = register_netdev(dev);
4919 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004920 dev_err(&pdev->dev, "cannot register net device\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004921 goto err_out_free_netdev;
4922 }
4923
Brandon Philips33cb7d32009-10-29 13:58:07 +00004924 netif_carrier_off(dev);
4925
Stephen Hemminger6de16232007-10-17 13:26:42 -07004926 netif_napi_add(dev, &hw->napi, sky2_poll, NAPI_WEIGHT);
4927
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004928 err = request_irq(pdev->irq, sky2_intr,
4929 (hw->flags & SKY2_HW_USE_MSI) ? 0 : IRQF_SHARED,
Stephen Hemminger66466792009-10-01 07:11:46 +00004930 hw->irq_name, hw);
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004931 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004932 dev_err(&pdev->dev, "cannot assign irq %d\n", pdev->irq);
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004933 goto err_out_unregister;
4934 }
4935 sky2_write32(hw, B0_IMSK, Y2_IS_BASE);
Stephen Hemminger6de16232007-10-17 13:26:42 -07004936 napi_enable(&hw->napi);
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004937
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004938 sky2_show_addr(dev);
4939
shemminger@linux-foundation.org7f60c64b2007-01-26 11:38:36 -08004940 if (hw->ports > 1) {
4941 struct net_device *dev1;
4942
Stephen Hemmingerca519272009-09-14 06:22:29 +00004943 err = -ENOMEM;
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004944 dev1 = sky2_init_netdev(hw, 1, using_dac, wol_default);
Stephen Hemmingerca519272009-09-14 06:22:29 +00004945 if (dev1 && (err = register_netdev(dev1)) == 0)
4946 sky2_show_addr(dev1);
4947 else {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004948 dev_warn(&pdev->dev,
4949 "register of second port failed (%d)\n", err);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004950 hw->dev[1] = NULL;
Stephen Hemmingerca519272009-09-14 06:22:29 +00004951 hw->ports = 1;
4952 if (dev1)
4953 free_netdev(dev1);
4954 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004955 }
4956
Stephen Hemminger32c2c302007-08-21 14:34:03 -07004957 setup_timer(&hw->watchdog_timer, sky2_watchdog, (unsigned long) hw);
Stephen Hemminger81906792007-02-15 16:40:33 -08004958 INIT_WORK(&hw->restart_work, sky2_restart);
4959
Stephen Hemminger793b8832005-09-14 16:06:14 -07004960 pci_set_drvdata(pdev, hw);
Rafael J. Wysocki1ae861e2009-12-31 12:15:54 +01004961 pdev->d3_delay = 150;
Stephen Hemminger793b8832005-09-14 16:06:14 -07004962
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004963 return 0;
4964
Stephen Hemminger793b8832005-09-14 16:06:14 -07004965err_out_unregister:
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004966 if (hw->flags & SKY2_HW_USE_MSI)
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004967 pci_disable_msi(pdev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004968 unregister_netdev(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004969err_out_free_netdev:
4970 free_netdev(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004971err_out_free_pci:
stephen hemmingerefe91932010-04-22 13:42:56 +00004972 pci_free_consistent(pdev, hw->st_size * sizeof(struct sky2_status_le),
4973 hw->st_le, hw->st_dma);
4974err_out_reset:
Stephen Hemminger793b8832005-09-14 16:06:14 -07004975 sky2_write8(hw, B0_CTST, CS_RST_SET);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004976err_out_iounmap:
4977 iounmap(hw->regs);
4978err_out_free_hw:
4979 kfree(hw);
4980err_out_free_regions:
4981 pci_release_regions(pdev);
Stephen Hemminger44a1d2e2007-04-30 14:23:49 -07004982err_out_disable:
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004983 pci_disable_device(pdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004984err_out:
Stephen Hemminger549a68c2007-05-11 11:21:44 -07004985 pci_set_drvdata(pdev, NULL);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004986 return err;
4987}
4988
4989static void __devexit sky2_remove(struct pci_dev *pdev)
4990{
Stephen Hemminger793b8832005-09-14 16:06:14 -07004991 struct sky2_hw *hw = pci_get_drvdata(pdev);
Stephen Hemminger6de16232007-10-17 13:26:42 -07004992 int i;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004993
Stephen Hemminger793b8832005-09-14 16:06:14 -07004994 if (!hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004995 return;
4996
Stephen Hemminger32c2c302007-08-21 14:34:03 -07004997 del_timer_sync(&hw->watchdog_timer);
Stephen Hemminger6de16232007-10-17 13:26:42 -07004998 cancel_work_sync(&hw->restart_work);
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07004999
Stephen Hemmingerb877fe22007-10-22 13:39:09 -07005000 for (i = hw->ports-1; i >= 0; --i)
Stephen Hemminger6de16232007-10-17 13:26:42 -07005001 unregister_netdev(hw->dev[i]);
Stephen Hemminger81906792007-02-15 16:40:33 -08005002
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07005003 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005004
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08005005 sky2_power_aux(hw);
5006
Stephen Hemminger793b8832005-09-14 16:06:14 -07005007 sky2_write8(hw, B0_CTST, CS_RST_SET);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07005008 sky2_read8(hw, B0_CTST);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005009
5010 free_irq(pdev->irq, hw);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07005011 if (hw->flags & SKY2_HW_USE_MSI)
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08005012 pci_disable_msi(pdev);
stephen hemmingerefe91932010-04-22 13:42:56 +00005013 pci_free_consistent(pdev, hw->st_size * sizeof(struct sky2_status_le),
5014 hw->st_le, hw->st_dma);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005015 pci_release_regions(pdev);
5016 pci_disable_device(pdev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07005017
Stephen Hemmingerb877fe22007-10-22 13:39:09 -07005018 for (i = hw->ports-1; i >= 0; --i)
Stephen Hemminger6de16232007-10-17 13:26:42 -07005019 free_netdev(hw->dev[i]);
5020
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005021 iounmap(hw->regs);
5022 kfree(hw);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07005023
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005024 pci_set_drvdata(pdev, NULL);
5025}
5026
Rafael J. Wysocki0f333d12010-12-26 08:44:32 +00005027static int sky2_suspend(struct device *dev)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005028{
Rafael J. Wysocki0f333d12010-12-26 08:44:32 +00005029 struct pci_dev *pdev = to_pci_dev(dev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07005030 struct sky2_hw *hw = pci_get_drvdata(pdev);
Rafael J. Wysocki0f333d12010-12-26 08:44:32 +00005031 int i;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005032
Stephen Hemminger549a68c2007-05-11 11:21:44 -07005033 if (!hw)
5034 return 0;
5035
Stephen Hemminger063a0b32008-04-02 09:03:23 -07005036 del_timer_sync(&hw->watchdog_timer);
5037 cancel_work_sync(&hw->restart_work);
5038
Stephen Hemminger19720732009-08-14 05:15:16 +00005039 rtnl_lock();
Mike McCormack3403aca2010-05-13 06:12:52 +00005040
5041 sky2_all_down(hw);
Stephen Hemmingerf05267e2006-06-13 17:17:28 +09005042 for (i = 0; i < hw->ports; i++) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005043 struct net_device *dev = hw->dev[i];
Stephen Hemmingere3173832007-02-06 10:45:39 -08005044 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005045
Stephen Hemmingere3173832007-02-06 10:45:39 -08005046 if (sky2->wol)
5047 sky2_wol_init(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005048 }
5049
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08005050 sky2_power_aux(hw);
Stephen Hemminger19720732009-08-14 05:15:16 +00005051 rtnl_unlock();
Stephen Hemmingere3173832007-02-06 10:45:39 -08005052
Stephen Hemminger2ccc99b2006-06-13 17:17:27 +09005053 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005054}
5055
Michel Lespinasse94252762011-03-06 16:14:50 +00005056#ifdef CONFIG_PM_SLEEP
Rafael J. Wysocki0f333d12010-12-26 08:44:32 +00005057static int sky2_resume(struct device *dev)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005058{
Rafael J. Wysocki0f333d12010-12-26 08:44:32 +00005059 struct pci_dev *pdev = to_pci_dev(dev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07005060 struct sky2_hw *hw = pci_get_drvdata(pdev);
Mike McCormack3403aca2010-05-13 06:12:52 +00005061 int err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005062
Stephen Hemminger549a68c2007-05-11 11:21:44 -07005063 if (!hw)
5064 return 0;
5065
Stephen Hemminger1ad5b4a2007-04-07 16:02:27 -07005066 /* Re-enable all clocks */
stephen hemmingera0db28b2010-02-07 06:23:53 +00005067 err = pci_write_config_dword(pdev, PCI_DEV_REG3, 0);
5068 if (err) {
5069 dev_err(&pdev->dev, "PCI write config failed\n");
5070 goto out;
5071 }
Stephen Hemminger1ad5b4a2007-04-07 16:02:27 -07005072
Mike McCormack3403aca2010-05-13 06:12:52 +00005073 rtnl_lock();
Stephen Hemmingere3173832007-02-06 10:45:39 -08005074 sky2_reset(hw);
Mike McCormack3403aca2010-05-13 06:12:52 +00005075 sky2_all_up(hw);
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07005076 rtnl_unlock();
Stephen Hemmingereb35cf62006-06-13 17:17:31 +09005077
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08005078 return 0;
Stephen Hemminger08c06d82006-01-30 11:37:54 -08005079out:
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07005080
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08005081 dev_err(&pdev->dev, "resume failed (%d)\n", err);
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08005082 pci_disable_device(pdev);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08005083 return err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005084}
Rafael J. Wysocki0f333d12010-12-26 08:44:32 +00005085
5086static SIMPLE_DEV_PM_OPS(sky2_pm_ops, sky2_suspend, sky2_resume);
5087#define SKY2_PM_OPS (&sky2_pm_ops)
5088
5089#else
5090
5091#define SKY2_PM_OPS NULL
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005092#endif
5093
Stephen Hemmingere3173832007-02-06 10:45:39 -08005094static void sky2_shutdown(struct pci_dev *pdev)
5095{
Rafael J. Wysocki0f333d12010-12-26 08:44:32 +00005096 sky2_suspend(&pdev->dev);
5097 pci_wake_from_d3(pdev, device_may_wakeup(&pdev->dev));
5098 pci_set_power_state(pdev, PCI_D3hot);
Stephen Hemmingere3173832007-02-06 10:45:39 -08005099}
5100
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005101static struct pci_driver sky2_driver = {
Stephen Hemminger793b8832005-09-14 16:06:14 -07005102 .name = DRV_NAME,
5103 .id_table = sky2_id_table,
5104 .probe = sky2_probe,
5105 .remove = __devexit_p(sky2_remove),
Stephen Hemmingere3173832007-02-06 10:45:39 -08005106 .shutdown = sky2_shutdown,
Rafael J. Wysocki0f333d12010-12-26 08:44:32 +00005107 .driver.pm = SKY2_PM_OPS,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005108};
5109
5110static int __init sky2_init_module(void)
5111{
Joe Perchesada1db52010-02-17 15:01:59 +00005112 pr_info("driver version " DRV_VERSION "\n");
Stephen Hemmingerc844d482008-08-27 20:48:23 -07005113
Stephen Hemminger3cf26752007-07-09 15:33:35 -07005114 sky2_debug_init();
shemminger@osdl.org50241c42005-11-30 11:45:22 -08005115 return pci_register_driver(&sky2_driver);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005116}
5117
5118static void __exit sky2_cleanup_module(void)
5119{
5120 pci_unregister_driver(&sky2_driver);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07005121 sky2_debug_cleanup();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005122}
5123
5124module_init(sky2_init_module);
5125module_exit(sky2_cleanup_module);
5126
5127MODULE_DESCRIPTION("Marvell Yukon 2 Gigabit Ethernet driver");
Stephen Hemminger65ebe6342007-01-23 11:38:57 -08005128MODULE_AUTHOR("Stephen Hemminger <shemminger@linux-foundation.org>");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005129MODULE_LICENSE("GPL");
shemminger@osdl.org5f4f9dc2005-11-30 11:45:23 -08005130MODULE_VERSION(DRV_VERSION);