| * STMicroelectronics sdhci-st MMC/SD controller |
| |
| This file documents the differences between the core properties in |
| Documentation/devicetree/bindings/mmc/mmc.txt and the properties |
| used by the sdhci-st driver. |
| |
| Required properties: |
| - compatible: Must be "st,sdhci" and it can be compatible to "st,sdhci-stih407" |
| to set the internal glue logic used for configuring the MMC |
| subsystem (mmcss) inside the FlashSS (available in STiH407 SoC |
| family). |
| |
| - clock-names: Should be "mmc" and "icn". (NB: The latter is not compulsory) |
| See: Documentation/devicetree/bindings/resource-names.txt |
| - clocks: Phandle to the clock. |
| See: Documentation/devicetree/bindings/clock/clock-bindings.txt |
| |
| - interrupts: One mmc interrupt should be described here. |
| - interrupt-names: Should be "mmcirq". |
| |
| - pinctrl-names: A pinctrl state names "default" must be defined. |
| - pinctrl-0: Phandle referencing pin configuration of the sd/emmc controller. |
| See: Documentation/devicetree/bindings/pinctrl/pinctrl-binding.txt |
| |
| - reg: This must provide the host controller base address and it can also |
| contain the FlashSS Top register for TX/RX delay used by the driver |
| to configure DLL inside the flashSS, if so reg-names must also be |
| specified. |
| |
| Optional properties: |
| - reg-names: Should be "mmc" and "top-mmc-delay". "top-mmc-delay" is optional |
| for eMMC on stih407 family silicon to configure DLL inside FlashSS. |
| |
| - non-removable: Non-removable slot. Also used for configuring mmcss in STiH407 SoC |
| family. |
| See: Documentation/devicetree/bindings/mmc/mmc.txt. |
| |
| - bus-width: Number of data lines. |
| See: Documentation/devicetree/bindings/mmc/mmc.txt. |
| |
| - max-frequency: Can be 200MHz, 100MHz or 50MHz (default) and used for |
| configuring the CCONFIG3 in the mmcss. |
| See: Documentation/devicetree/bindings/mmc/mmc.txt. |
| |
| - resets: Phandle and reset specifier pair to softreset line of HC IP. |
| See: Documentation/devicetree/bindings/reset/reset.txt |
| |
| - vqmmc-supply: Phandle to the regulator dt node, mentioned as the vcc/vdd |
| supply in eMMC/SD specs. |
| |
| - sd-uhs-sdr50: To enable the SDR50 in the mmcss. |
| See: Documentation/devicetree/bindings/mmc/mmc.txt. |
| |
| - sd-uhs-sdr104: To enable the SDR104 in the mmcss. |
| See: Documentation/devicetree/bindings/mmc/mmc.txt. |
| |
| - sd-uhs-ddr50: To enable the DDR50 in the mmcss. |
| See: Documentation/devicetree/bindings/mmc/mmc.txt. |
| |
| Example: |
| |
| /* Example stih416e eMMC configuration */ |
| |
| mmc0: sdhci@fe81e000 { |
| compatible = "st,sdhci"; |
| reg = <0xfe81e000 0x1000>; |
| interrupts = <GIC_SPI 127 IRQ_TYPE_NONE>; |
| interrupt-names = "mmcirq"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_mmc0>; |
| clock-names = "mmc"; |
| clocks = <&clk_s_a1_ls 1>; |
| bus-width = <8> |
| |
| /* Example SD stih407 family configuration */ |
| |
| mmc1: sdhci@9080000 { |
| compatible = "st,sdhci-stih407", "st,sdhci"; |
| reg = <0x09080000 0x7ff>; |
| reg-names = "mmc"; |
| interrupts = <GIC_SPI 90 IRQ_TYPE_NONE>; |
| interrupt-names = "mmcirq"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_sd1>; |
| clock-names = "mmc"; |
| clocks = <&clk_s_c0_flexgen CLK_MMC_1>; |
| resets = <&softreset STIH407_MMC1_SOFTRESET>; |
| bus-width = <4>; |
| }; |
| |
| /* Example eMMC stih407 family configuration */ |
| |
| mmc0: sdhci@9060000 { |
| compatible = "st,sdhci-stih407", "st,sdhci"; |
| reg = <0x09060000 0x7ff>, <0x9061008 0x20>; |
| reg-names = "mmc", "top-mmc-delay"; |
| interrupts = <GIC_SPI 92 IRQ_TYPE_NONE>; |
| interrupt-names = "mmcirq"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_mmc0>; |
| clock-names = "mmc"; |
| clocks = <&clk_s_c0_flexgen CLK_MMC_0>; |
| vqmmc-supply = <&vmmc_reg>; |
| max-frequency = <200000000>; |
| bus-width = <8>; |
| non-removable; |
| sd-uhs-sdr50; |
| sd-uhs-sdr104; |
| sd-uhs-ddr50; |
| }; |