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Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001/*
2 * Copyright (C) 2015 Microchip Technology
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, see <http://www.gnu.org/licenses/>.
16 */
17#include <linux/version.h>
18#include <linux/module.h>
19#include <linux/netdevice.h>
20#include <linux/etherdevice.h>
21#include <linux/ethtool.h>
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000022#include <linux/usb.h>
23#include <linux/crc32.h>
24#include <linux/signal.h>
25#include <linux/slab.h>
26#include <linux/if_vlan.h>
27#include <linux/uaccess.h>
28#include <linux/list.h>
29#include <linux/ip.h>
30#include <linux/ipv6.h>
31#include <linux/mdio.h>
Andrew Lunnc6e970a2017-03-28 23:45:06 +020032#include <linux/phy.h>
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000033#include <net/ip6_checksum.h>
Woojung Huhcc89c322016-11-01 20:02:00 +000034#include <linux/interrupt.h>
35#include <linux/irqdomain.h>
36#include <linux/irq.h>
37#include <linux/irqchip/chained_irq.h>
Woojung.Huh@microchip.combdfba55e2015-09-16 23:41:07 +000038#include <linux/microchipphy.h>
Raghuram Chary J89b36fb2018-04-28 11:33:14 +053039#include <linux/phy_fixed.h>
Phil Elwell1827b062018-04-19 17:59:39 +010040#include <linux/of_mdio.h>
Phil Elwell760db292018-04-19 17:59:38 +010041#include <linux/of_net.h>
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000042#include "lan78xx.h"
43
44#define DRIVER_AUTHOR "WOOJUNG HUH <woojung.huh@microchip.com>"
45#define DRIVER_DESC "LAN78XX USB 3.0 Gigabit Ethernet Devices"
46#define DRIVER_NAME "lan78xx"
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000047
48#define TX_TIMEOUT_JIFFIES (5 * HZ)
49#define THROTTLE_JIFFIES (HZ / 8)
50#define UNLINK_TIMEOUT_MS 3
51
52#define RX_MAX_QUEUE_MEMORY (60 * 1518)
53
54#define SS_USB_PKT_SIZE (1024)
55#define HS_USB_PKT_SIZE (512)
56#define FS_USB_PKT_SIZE (64)
57
58#define MAX_RX_FIFO_SIZE (12 * 1024)
59#define MAX_TX_FIFO_SIZE (12 * 1024)
60#define DEFAULT_BURST_CAP_SIZE (MAX_TX_FIFO_SIZE)
61#define DEFAULT_BULK_IN_DELAY (0x0800)
62#define MAX_SINGLE_PACKET_SIZE (9000)
63#define DEFAULT_TX_CSUM_ENABLE (true)
64#define DEFAULT_RX_CSUM_ENABLE (true)
65#define DEFAULT_TSO_CSUM_ENABLE (true)
66#define DEFAULT_VLAN_FILTER_ENABLE (true)
Dave Stevensonec21ecf2018-06-25 15:07:14 +010067#define DEFAULT_VLAN_RX_OFFLOAD (true)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000068#define TX_OVERHEAD (8)
69#define RXW_PADDING 2
70
71#define LAN78XX_USB_VENDOR_ID (0x0424)
72#define LAN7800_USB_PRODUCT_ID (0x7800)
73#define LAN7850_USB_PRODUCT_ID (0x7850)
Woojung Huh02dc1f32016-12-07 20:26:25 +000074#define LAN7801_USB_PRODUCT_ID (0x7801)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000075#define LAN78XX_EEPROM_MAGIC (0x78A5)
76#define LAN78XX_OTP_MAGIC (0x78F3)
77
78#define MII_READ 1
79#define MII_WRITE 0
80
81#define EEPROM_INDICATOR (0xA5)
82#define EEPROM_MAC_OFFSET (0x01)
83#define MAX_EEPROM_SIZE 512
84#define OTP_INDICATOR_1 (0xF3)
85#define OTP_INDICATOR_2 (0xF7)
86
87#define WAKE_ALL (WAKE_PHY | WAKE_UCAST | \
88 WAKE_MCAST | WAKE_BCAST | \
89 WAKE_ARP | WAKE_MAGIC)
90
91/* USB related defines */
92#define BULK_IN_PIPE 1
93#define BULK_OUT_PIPE 2
94
95/* default autosuspend delay (mSec)*/
96#define DEFAULT_AUTOSUSPEND_DELAY (10 * 1000)
97
Woojung Huh20ff5562016-03-16 22:10:40 +000098/* statistic update interval (mSec) */
99#define STAT_UPDATE_TIMER (1 * 1000)
100
Woojung Huhcc89c322016-11-01 20:02:00 +0000101/* defines interrupts from interrupt EP */
102#define MAX_INT_EP (32)
103#define INT_EP_INTEP (31)
104#define INT_EP_OTP_WR_DONE (28)
105#define INT_EP_EEE_TX_LPI_START (26)
106#define INT_EP_EEE_TX_LPI_STOP (25)
107#define INT_EP_EEE_RX_LPI (24)
108#define INT_EP_MAC_RESET_TIMEOUT (23)
109#define INT_EP_RDFO (22)
110#define INT_EP_TXE (21)
111#define INT_EP_USB_STATUS (20)
112#define INT_EP_TX_DIS (19)
113#define INT_EP_RX_DIS (18)
114#define INT_EP_PHY (17)
115#define INT_EP_DP (16)
116#define INT_EP_MAC_ERR (15)
117#define INT_EP_TDFU (14)
118#define INT_EP_TDFO (13)
119#define INT_EP_UTX (12)
120#define INT_EP_GPIO_11 (11)
121#define INT_EP_GPIO_10 (10)
122#define INT_EP_GPIO_9 (9)
123#define INT_EP_GPIO_8 (8)
124#define INT_EP_GPIO_7 (7)
125#define INT_EP_GPIO_6 (6)
126#define INT_EP_GPIO_5 (5)
127#define INT_EP_GPIO_4 (4)
128#define INT_EP_GPIO_3 (3)
129#define INT_EP_GPIO_2 (2)
130#define INT_EP_GPIO_1 (1)
131#define INT_EP_GPIO_0 (0)
132
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000133static const char lan78xx_gstrings[][ETH_GSTRING_LEN] = {
134 "RX FCS Errors",
135 "RX Alignment Errors",
136 "Rx Fragment Errors",
137 "RX Jabber Errors",
138 "RX Undersize Frame Errors",
139 "RX Oversize Frame Errors",
140 "RX Dropped Frames",
141 "RX Unicast Byte Count",
142 "RX Broadcast Byte Count",
143 "RX Multicast Byte Count",
144 "RX Unicast Frames",
145 "RX Broadcast Frames",
146 "RX Multicast Frames",
147 "RX Pause Frames",
148 "RX 64 Byte Frames",
149 "RX 65 - 127 Byte Frames",
150 "RX 128 - 255 Byte Frames",
151 "RX 256 - 511 Bytes Frames",
152 "RX 512 - 1023 Byte Frames",
153 "RX 1024 - 1518 Byte Frames",
154 "RX Greater 1518 Byte Frames",
155 "EEE RX LPI Transitions",
156 "EEE RX LPI Time",
157 "TX FCS Errors",
158 "TX Excess Deferral Errors",
159 "TX Carrier Errors",
160 "TX Bad Byte Count",
161 "TX Single Collisions",
162 "TX Multiple Collisions",
163 "TX Excessive Collision",
164 "TX Late Collisions",
165 "TX Unicast Byte Count",
166 "TX Broadcast Byte Count",
167 "TX Multicast Byte Count",
168 "TX Unicast Frames",
169 "TX Broadcast Frames",
170 "TX Multicast Frames",
171 "TX Pause Frames",
172 "TX 64 Byte Frames",
173 "TX 65 - 127 Byte Frames",
174 "TX 128 - 255 Byte Frames",
175 "TX 256 - 511 Bytes Frames",
176 "TX 512 - 1023 Byte Frames",
177 "TX 1024 - 1518 Byte Frames",
178 "TX Greater 1518 Byte Frames",
179 "EEE TX LPI Transitions",
180 "EEE TX LPI Time",
181};
182
183struct lan78xx_statstage {
184 u32 rx_fcs_errors;
185 u32 rx_alignment_errors;
186 u32 rx_fragment_errors;
187 u32 rx_jabber_errors;
188 u32 rx_undersize_frame_errors;
189 u32 rx_oversize_frame_errors;
190 u32 rx_dropped_frames;
191 u32 rx_unicast_byte_count;
192 u32 rx_broadcast_byte_count;
193 u32 rx_multicast_byte_count;
194 u32 rx_unicast_frames;
195 u32 rx_broadcast_frames;
196 u32 rx_multicast_frames;
197 u32 rx_pause_frames;
198 u32 rx_64_byte_frames;
199 u32 rx_65_127_byte_frames;
200 u32 rx_128_255_byte_frames;
201 u32 rx_256_511_bytes_frames;
202 u32 rx_512_1023_byte_frames;
203 u32 rx_1024_1518_byte_frames;
204 u32 rx_greater_1518_byte_frames;
205 u32 eee_rx_lpi_transitions;
206 u32 eee_rx_lpi_time;
207 u32 tx_fcs_errors;
208 u32 tx_excess_deferral_errors;
209 u32 tx_carrier_errors;
210 u32 tx_bad_byte_count;
211 u32 tx_single_collisions;
212 u32 tx_multiple_collisions;
213 u32 tx_excessive_collision;
214 u32 tx_late_collisions;
215 u32 tx_unicast_byte_count;
216 u32 tx_broadcast_byte_count;
217 u32 tx_multicast_byte_count;
218 u32 tx_unicast_frames;
219 u32 tx_broadcast_frames;
220 u32 tx_multicast_frames;
221 u32 tx_pause_frames;
222 u32 tx_64_byte_frames;
223 u32 tx_65_127_byte_frames;
224 u32 tx_128_255_byte_frames;
225 u32 tx_256_511_bytes_frames;
226 u32 tx_512_1023_byte_frames;
227 u32 tx_1024_1518_byte_frames;
228 u32 tx_greater_1518_byte_frames;
229 u32 eee_tx_lpi_transitions;
230 u32 eee_tx_lpi_time;
231};
232
Woojung Huh20ff5562016-03-16 22:10:40 +0000233struct lan78xx_statstage64 {
234 u64 rx_fcs_errors;
235 u64 rx_alignment_errors;
236 u64 rx_fragment_errors;
237 u64 rx_jabber_errors;
238 u64 rx_undersize_frame_errors;
239 u64 rx_oversize_frame_errors;
240 u64 rx_dropped_frames;
241 u64 rx_unicast_byte_count;
242 u64 rx_broadcast_byte_count;
243 u64 rx_multicast_byte_count;
244 u64 rx_unicast_frames;
245 u64 rx_broadcast_frames;
246 u64 rx_multicast_frames;
247 u64 rx_pause_frames;
248 u64 rx_64_byte_frames;
249 u64 rx_65_127_byte_frames;
250 u64 rx_128_255_byte_frames;
251 u64 rx_256_511_bytes_frames;
252 u64 rx_512_1023_byte_frames;
253 u64 rx_1024_1518_byte_frames;
254 u64 rx_greater_1518_byte_frames;
255 u64 eee_rx_lpi_transitions;
256 u64 eee_rx_lpi_time;
257 u64 tx_fcs_errors;
258 u64 tx_excess_deferral_errors;
259 u64 tx_carrier_errors;
260 u64 tx_bad_byte_count;
261 u64 tx_single_collisions;
262 u64 tx_multiple_collisions;
263 u64 tx_excessive_collision;
264 u64 tx_late_collisions;
265 u64 tx_unicast_byte_count;
266 u64 tx_broadcast_byte_count;
267 u64 tx_multicast_byte_count;
268 u64 tx_unicast_frames;
269 u64 tx_broadcast_frames;
270 u64 tx_multicast_frames;
271 u64 tx_pause_frames;
272 u64 tx_64_byte_frames;
273 u64 tx_65_127_byte_frames;
274 u64 tx_128_255_byte_frames;
275 u64 tx_256_511_bytes_frames;
276 u64 tx_512_1023_byte_frames;
277 u64 tx_1024_1518_byte_frames;
278 u64 tx_greater_1518_byte_frames;
279 u64 eee_tx_lpi_transitions;
280 u64 eee_tx_lpi_time;
281};
282
Raghuram Chary J49621862018-04-20 11:43:50 +0530283static u32 lan78xx_regs[] = {
284 ID_REV,
285 INT_STS,
286 HW_CFG,
287 PMT_CTL,
288 E2P_CMD,
289 E2P_DATA,
290 USB_STATUS,
291 VLAN_TYPE,
292 MAC_CR,
293 MAC_RX,
294 MAC_TX,
295 FLOW,
296 ERR_STS,
297 MII_ACC,
298 MII_DATA,
299 EEE_TX_LPI_REQ_DLY,
300 EEE_TW_TX_SYS,
301 EEE_TX_LPI_REM_DLY,
302 WUCSR
303};
304
305#define PHY_REG_SIZE (32 * sizeof(u32))
306
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000307struct lan78xx_net;
308
309struct lan78xx_priv {
310 struct lan78xx_net *dev;
311 u32 rfe_ctl;
312 u32 mchash_table[DP_SEL_VHF_HASH_LEN]; /* multicat hash table */
313 u32 pfilter_table[NUM_OF_MAF][2]; /* perfect filter table */
314 u32 vlan_table[DP_SEL_VHF_VLAN_LEN];
315 struct mutex dataport_mutex; /* for dataport access */
316 spinlock_t rfe_ctl_lock; /* for rfe register access */
317 struct work_struct set_multicast;
318 struct work_struct set_vlan;
319 u32 wol;
320};
321
322enum skb_state {
323 illegal = 0,
324 tx_start,
325 tx_done,
326 rx_start,
327 rx_done,
328 rx_cleanup,
329 unlink_start
330};
331
332struct skb_data { /* skb->cb is one of these */
333 struct urb *urb;
334 struct lan78xx_net *dev;
335 enum skb_state state;
336 size_t length;
Woojung Huh74d79a22016-04-25 22:22:32 +0000337 int num_of_packet;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000338};
339
340struct usb_context {
341 struct usb_ctrlrequest req;
342 struct lan78xx_net *dev;
343};
344
345#define EVENT_TX_HALT 0
346#define EVENT_RX_HALT 1
347#define EVENT_RX_MEMORY 2
348#define EVENT_STS_SPLIT 3
349#define EVENT_LINK_RESET 4
350#define EVENT_RX_PAUSED 5
351#define EVENT_DEV_WAKING 6
352#define EVENT_DEV_ASLEEP 7
353#define EVENT_DEV_OPEN 8
Woojung Huh20ff5562016-03-16 22:10:40 +0000354#define EVENT_STAT_UPDATE 9
355
356struct statstage {
357 struct mutex access_lock; /* for stats access */
358 struct lan78xx_statstage saved;
359 struct lan78xx_statstage rollover_count;
360 struct lan78xx_statstage rollover_max;
361 struct lan78xx_statstage64 curr_stat;
362};
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000363
Woojung Huhcc89c322016-11-01 20:02:00 +0000364struct irq_domain_data {
365 struct irq_domain *irqdomain;
366 unsigned int phyirq;
367 struct irq_chip *irqchip;
368 irq_flow_handler_t irq_handler;
369 u32 irqenable;
370 struct mutex irq_lock; /* for irq bus access */
371};
372
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000373struct lan78xx_net {
374 struct net_device *net;
375 struct usb_device *udev;
376 struct usb_interface *intf;
377 void *driver_priv;
378
379 int rx_qlen;
380 int tx_qlen;
381 struct sk_buff_head rxq;
382 struct sk_buff_head txq;
383 struct sk_buff_head done;
384 struct sk_buff_head rxq_pause;
385 struct sk_buff_head txq_pend;
386
387 struct tasklet_struct bh;
388 struct delayed_work wq;
389
390 struct usb_host_endpoint *ep_blkin;
391 struct usb_host_endpoint *ep_blkout;
392 struct usb_host_endpoint *ep_intr;
393
394 int msg_enable;
395
396 struct urb *urb_intr;
397 struct usb_anchor deferred;
398
399 struct mutex phy_mutex; /* for phy access */
400 unsigned pipe_in, pipe_out, pipe_intr;
401
402 u32 hard_mtu; /* count any extra framing */
403 size_t rx_urb_size; /* size for rx urbs */
404
405 unsigned long flags;
406
407 wait_queue_head_t *wait;
408 unsigned char suspend_count;
409
410 unsigned maxpacket;
411 struct timer_list delay;
Woojung Huh20ff5562016-03-16 22:10:40 +0000412 struct timer_list stat_monitor;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000413
414 unsigned long data[5];
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000415
416 int link_on;
417 u8 mdix_ctrl;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +0000418
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000419 u32 chipid;
420 u32 chiprev;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +0000421 struct mii_bus *mdiobus;
Woojung Huh02dc1f32016-12-07 20:26:25 +0000422 phy_interface_t interface;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +0000423
424 int fc_autoneg;
425 u8 fc_request_control;
Woojung Huh20ff5562016-03-16 22:10:40 +0000426
427 int delta;
428 struct statstage stats;
Woojung Huhcc89c322016-11-01 20:02:00 +0000429
430 struct irq_domain_data domain_data;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000431};
432
Woojung Huh02dc1f32016-12-07 20:26:25 +0000433/* define external phy id */
434#define PHY_LAN8835 (0x0007C130)
435#define PHY_KSZ9031RNX (0x00221620)
436
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000437/* use ethtool to change the level for any given device */
438static int msg_level = -1;
439module_param(msg_level, int, 0);
440MODULE_PARM_DESC(msg_level, "Override default message level");
441
442static int lan78xx_read_reg(struct lan78xx_net *dev, u32 index, u32 *data)
443{
444 u32 *buf = kmalloc(sizeof(u32), GFP_KERNEL);
445 int ret;
446
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000447 if (!buf)
448 return -ENOMEM;
449
450 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
451 USB_VENDOR_REQUEST_READ_REGISTER,
452 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
453 0, index, buf, 4, USB_CTRL_GET_TIMEOUT);
454 if (likely(ret >= 0)) {
455 le32_to_cpus(buf);
456 *data = *buf;
457 } else {
458 netdev_warn(dev->net,
459 "Failed to read register index 0x%08x. ret = %d",
460 index, ret);
461 }
462
463 kfree(buf);
464
465 return ret;
466}
467
468static int lan78xx_write_reg(struct lan78xx_net *dev, u32 index, u32 data)
469{
470 u32 *buf = kmalloc(sizeof(u32), GFP_KERNEL);
471 int ret;
472
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000473 if (!buf)
474 return -ENOMEM;
475
476 *buf = data;
477 cpu_to_le32s(buf);
478
479 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
480 USB_VENDOR_REQUEST_WRITE_REGISTER,
481 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
482 0, index, buf, 4, USB_CTRL_SET_TIMEOUT);
483 if (unlikely(ret < 0)) {
484 netdev_warn(dev->net,
485 "Failed to write register index 0x%08x. ret = %d",
486 index, ret);
487 }
488
489 kfree(buf);
490
491 return ret;
492}
493
494static int lan78xx_read_stats(struct lan78xx_net *dev,
495 struct lan78xx_statstage *data)
496{
497 int ret = 0;
498 int i;
499 struct lan78xx_statstage *stats;
500 u32 *src;
501 u32 *dst;
502
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000503 stats = kmalloc(sizeof(*stats), GFP_KERNEL);
504 if (!stats)
505 return -ENOMEM;
506
507 ret = usb_control_msg(dev->udev,
508 usb_rcvctrlpipe(dev->udev, 0),
509 USB_VENDOR_REQUEST_GET_STATS,
510 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
511 0,
512 0,
513 (void *)stats,
514 sizeof(*stats),
515 USB_CTRL_SET_TIMEOUT);
516 if (likely(ret >= 0)) {
517 src = (u32 *)stats;
518 dst = (u32 *)data;
519 for (i = 0; i < sizeof(*stats)/sizeof(u32); i++) {
520 le32_to_cpus(&src[i]);
521 dst[i] = src[i];
522 }
523 } else {
524 netdev_warn(dev->net,
525 "Failed to read stat ret = 0x%x", ret);
526 }
527
528 kfree(stats);
529
530 return ret;
531}
532
Woojung Huh20ff5562016-03-16 22:10:40 +0000533#define check_counter_rollover(struct1, dev_stats, member) { \
534 if (struct1->member < dev_stats.saved.member) \
535 dev_stats.rollover_count.member++; \
536 }
537
538static void lan78xx_check_stat_rollover(struct lan78xx_net *dev,
539 struct lan78xx_statstage *stats)
540{
541 check_counter_rollover(stats, dev->stats, rx_fcs_errors);
542 check_counter_rollover(stats, dev->stats, rx_alignment_errors);
543 check_counter_rollover(stats, dev->stats, rx_fragment_errors);
544 check_counter_rollover(stats, dev->stats, rx_jabber_errors);
545 check_counter_rollover(stats, dev->stats, rx_undersize_frame_errors);
546 check_counter_rollover(stats, dev->stats, rx_oversize_frame_errors);
547 check_counter_rollover(stats, dev->stats, rx_dropped_frames);
548 check_counter_rollover(stats, dev->stats, rx_unicast_byte_count);
549 check_counter_rollover(stats, dev->stats, rx_broadcast_byte_count);
550 check_counter_rollover(stats, dev->stats, rx_multicast_byte_count);
551 check_counter_rollover(stats, dev->stats, rx_unicast_frames);
552 check_counter_rollover(stats, dev->stats, rx_broadcast_frames);
553 check_counter_rollover(stats, dev->stats, rx_multicast_frames);
554 check_counter_rollover(stats, dev->stats, rx_pause_frames);
555 check_counter_rollover(stats, dev->stats, rx_64_byte_frames);
556 check_counter_rollover(stats, dev->stats, rx_65_127_byte_frames);
557 check_counter_rollover(stats, dev->stats, rx_128_255_byte_frames);
558 check_counter_rollover(stats, dev->stats, rx_256_511_bytes_frames);
559 check_counter_rollover(stats, dev->stats, rx_512_1023_byte_frames);
560 check_counter_rollover(stats, dev->stats, rx_1024_1518_byte_frames);
561 check_counter_rollover(stats, dev->stats, rx_greater_1518_byte_frames);
562 check_counter_rollover(stats, dev->stats, eee_rx_lpi_transitions);
563 check_counter_rollover(stats, dev->stats, eee_rx_lpi_time);
564 check_counter_rollover(stats, dev->stats, tx_fcs_errors);
565 check_counter_rollover(stats, dev->stats, tx_excess_deferral_errors);
566 check_counter_rollover(stats, dev->stats, tx_carrier_errors);
567 check_counter_rollover(stats, dev->stats, tx_bad_byte_count);
568 check_counter_rollover(stats, dev->stats, tx_single_collisions);
569 check_counter_rollover(stats, dev->stats, tx_multiple_collisions);
570 check_counter_rollover(stats, dev->stats, tx_excessive_collision);
571 check_counter_rollover(stats, dev->stats, tx_late_collisions);
572 check_counter_rollover(stats, dev->stats, tx_unicast_byte_count);
573 check_counter_rollover(stats, dev->stats, tx_broadcast_byte_count);
574 check_counter_rollover(stats, dev->stats, tx_multicast_byte_count);
575 check_counter_rollover(stats, dev->stats, tx_unicast_frames);
576 check_counter_rollover(stats, dev->stats, tx_broadcast_frames);
577 check_counter_rollover(stats, dev->stats, tx_multicast_frames);
578 check_counter_rollover(stats, dev->stats, tx_pause_frames);
579 check_counter_rollover(stats, dev->stats, tx_64_byte_frames);
580 check_counter_rollover(stats, dev->stats, tx_65_127_byte_frames);
581 check_counter_rollover(stats, dev->stats, tx_128_255_byte_frames);
582 check_counter_rollover(stats, dev->stats, tx_256_511_bytes_frames);
583 check_counter_rollover(stats, dev->stats, tx_512_1023_byte_frames);
584 check_counter_rollover(stats, dev->stats, tx_1024_1518_byte_frames);
585 check_counter_rollover(stats, dev->stats, tx_greater_1518_byte_frames);
586 check_counter_rollover(stats, dev->stats, eee_tx_lpi_transitions);
587 check_counter_rollover(stats, dev->stats, eee_tx_lpi_time);
588
589 memcpy(&dev->stats.saved, stats, sizeof(struct lan78xx_statstage));
590}
591
592static void lan78xx_update_stats(struct lan78xx_net *dev)
593{
594 u32 *p, *count, *max;
595 u64 *data;
596 int i;
597 struct lan78xx_statstage lan78xx_stats;
598
599 if (usb_autopm_get_interface(dev->intf) < 0)
600 return;
601
602 p = (u32 *)&lan78xx_stats;
603 count = (u32 *)&dev->stats.rollover_count;
604 max = (u32 *)&dev->stats.rollover_max;
605 data = (u64 *)&dev->stats.curr_stat;
606
607 mutex_lock(&dev->stats.access_lock);
608
609 if (lan78xx_read_stats(dev, &lan78xx_stats) > 0)
610 lan78xx_check_stat_rollover(dev, &lan78xx_stats);
611
612 for (i = 0; i < (sizeof(lan78xx_stats) / (sizeof(u32))); i++)
613 data[i] = (u64)p[i] + ((u64)count[i] * ((u64)max[i] + 1));
614
615 mutex_unlock(&dev->stats.access_lock);
616
617 usb_autopm_put_interface(dev->intf);
618}
619
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000620/* Loop until the read is completed with timeout called with phy_mutex held */
621static int lan78xx_phy_wait_not_busy(struct lan78xx_net *dev)
622{
623 unsigned long start_time = jiffies;
624 u32 val;
625 int ret;
626
627 do {
628 ret = lan78xx_read_reg(dev, MII_ACC, &val);
629 if (unlikely(ret < 0))
630 return -EIO;
631
632 if (!(val & MII_ACC_MII_BUSY_))
633 return 0;
634 } while (!time_after(jiffies, start_time + HZ));
635
636 return -EIO;
637}
638
639static inline u32 mii_access(int id, int index, int read)
640{
641 u32 ret;
642
643 ret = ((u32)id << MII_ACC_PHY_ADDR_SHIFT_) & MII_ACC_PHY_ADDR_MASK_;
644 ret |= ((u32)index << MII_ACC_MIIRINDA_SHIFT_) & MII_ACC_MIIRINDA_MASK_;
645 if (read)
646 ret |= MII_ACC_MII_READ_;
647 else
648 ret |= MII_ACC_MII_WRITE_;
649 ret |= MII_ACC_MII_BUSY_;
650
651 return ret;
652}
653
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000654static int lan78xx_wait_eeprom(struct lan78xx_net *dev)
655{
656 unsigned long start_time = jiffies;
657 u32 val;
658 int ret;
659
660 do {
661 ret = lan78xx_read_reg(dev, E2P_CMD, &val);
662 if (unlikely(ret < 0))
663 return -EIO;
664
665 if (!(val & E2P_CMD_EPC_BUSY_) ||
666 (val & E2P_CMD_EPC_TIMEOUT_))
667 break;
668 usleep_range(40, 100);
669 } while (!time_after(jiffies, start_time + HZ));
670
671 if (val & (E2P_CMD_EPC_TIMEOUT_ | E2P_CMD_EPC_BUSY_)) {
672 netdev_warn(dev->net, "EEPROM read operation timeout");
673 return -EIO;
674 }
675
676 return 0;
677}
678
679static int lan78xx_eeprom_confirm_not_busy(struct lan78xx_net *dev)
680{
681 unsigned long start_time = jiffies;
682 u32 val;
683 int ret;
684
685 do {
686 ret = lan78xx_read_reg(dev, E2P_CMD, &val);
687 if (unlikely(ret < 0))
688 return -EIO;
689
690 if (!(val & E2P_CMD_EPC_BUSY_))
691 return 0;
692
693 usleep_range(40, 100);
694 } while (!time_after(jiffies, start_time + HZ));
695
696 netdev_warn(dev->net, "EEPROM is busy");
697 return -EIO;
698}
699
700static int lan78xx_read_raw_eeprom(struct lan78xx_net *dev, u32 offset,
701 u32 length, u8 *data)
702{
703 u32 val;
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000704 u32 saved;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000705 int i, ret;
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000706 int retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000707
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000708 /* depends on chip, some EEPROM pins are muxed with LED function.
709 * disable & restore LED function to access EEPROM.
710 */
711 ret = lan78xx_read_reg(dev, HW_CFG, &val);
712 saved = val;
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000713 if (dev->chipid == ID_REV_CHIP_ID_7800_) {
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000714 val &= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_);
715 ret = lan78xx_write_reg(dev, HW_CFG, val);
716 }
717
718 retval = lan78xx_eeprom_confirm_not_busy(dev);
719 if (retval)
720 return retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000721
722 for (i = 0; i < length; i++) {
723 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_READ_;
724 val |= (offset & E2P_CMD_EPC_ADDR_MASK_);
725 ret = lan78xx_write_reg(dev, E2P_CMD, val);
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000726 if (unlikely(ret < 0)) {
727 retval = -EIO;
728 goto exit;
729 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000730
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000731 retval = lan78xx_wait_eeprom(dev);
732 if (retval < 0)
733 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000734
735 ret = lan78xx_read_reg(dev, E2P_DATA, &val);
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000736 if (unlikely(ret < 0)) {
737 retval = -EIO;
738 goto exit;
739 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000740
741 data[i] = val & 0xFF;
742 offset++;
743 }
744
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000745 retval = 0;
746exit:
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000747 if (dev->chipid == ID_REV_CHIP_ID_7800_)
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000748 ret = lan78xx_write_reg(dev, HW_CFG, saved);
749
750 return retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000751}
752
753static int lan78xx_read_eeprom(struct lan78xx_net *dev, u32 offset,
754 u32 length, u8 *data)
755{
756 u8 sig;
757 int ret;
758
759 ret = lan78xx_read_raw_eeprom(dev, 0, 1, &sig);
760 if ((ret == 0) && (sig == EEPROM_INDICATOR))
761 ret = lan78xx_read_raw_eeprom(dev, offset, length, data);
762 else
763 ret = -EINVAL;
764
765 return ret;
766}
767
768static int lan78xx_write_raw_eeprom(struct lan78xx_net *dev, u32 offset,
769 u32 length, u8 *data)
770{
771 u32 val;
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000772 u32 saved;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000773 int i, ret;
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000774 int retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000775
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000776 /* depends on chip, some EEPROM pins are muxed with LED function.
777 * disable & restore LED function to access EEPROM.
778 */
779 ret = lan78xx_read_reg(dev, HW_CFG, &val);
780 saved = val;
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000781 if (dev->chipid == ID_REV_CHIP_ID_7800_) {
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000782 val &= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_);
783 ret = lan78xx_write_reg(dev, HW_CFG, val);
784 }
785
786 retval = lan78xx_eeprom_confirm_not_busy(dev);
787 if (retval)
788 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000789
790 /* Issue write/erase enable command */
791 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_EWEN_;
792 ret = lan78xx_write_reg(dev, E2P_CMD, val);
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000793 if (unlikely(ret < 0)) {
794 retval = -EIO;
795 goto exit;
796 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000797
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000798 retval = lan78xx_wait_eeprom(dev);
799 if (retval < 0)
800 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000801
802 for (i = 0; i < length; i++) {
803 /* Fill data register */
804 val = data[i];
805 ret = lan78xx_write_reg(dev, E2P_DATA, val);
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000806 if (ret < 0) {
807 retval = -EIO;
808 goto exit;
809 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000810
811 /* Send "write" command */
812 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_WRITE_;
813 val |= (offset & E2P_CMD_EPC_ADDR_MASK_);
814 ret = lan78xx_write_reg(dev, E2P_CMD, val);
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000815 if (ret < 0) {
816 retval = -EIO;
817 goto exit;
818 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000819
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000820 retval = lan78xx_wait_eeprom(dev);
821 if (retval < 0)
822 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000823
824 offset++;
825 }
826
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000827 retval = 0;
828exit:
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000829 if (dev->chipid == ID_REV_CHIP_ID_7800_)
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000830 ret = lan78xx_write_reg(dev, HW_CFG, saved);
831
832 return retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000833}
834
835static int lan78xx_read_raw_otp(struct lan78xx_net *dev, u32 offset,
836 u32 length, u8 *data)
837{
838 int i;
839 int ret;
840 u32 buf;
841 unsigned long timeout;
842
843 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
844
845 if (buf & OTP_PWR_DN_PWRDN_N_) {
846 /* clear it and wait to be cleared */
847 ret = lan78xx_write_reg(dev, OTP_PWR_DN, 0);
848
849 timeout = jiffies + HZ;
850 do {
851 usleep_range(1, 10);
852 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
853 if (time_after(jiffies, timeout)) {
854 netdev_warn(dev->net,
855 "timeout on OTP_PWR_DN");
856 return -EIO;
857 }
858 } while (buf & OTP_PWR_DN_PWRDN_N_);
859 }
860
861 for (i = 0; i < length; i++) {
862 ret = lan78xx_write_reg(dev, OTP_ADDR1,
863 ((offset + i) >> 8) & OTP_ADDR1_15_11);
864 ret = lan78xx_write_reg(dev, OTP_ADDR2,
865 ((offset + i) & OTP_ADDR2_10_3));
866
867 ret = lan78xx_write_reg(dev, OTP_FUNC_CMD, OTP_FUNC_CMD_READ_);
868 ret = lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_);
869
870 timeout = jiffies + HZ;
871 do {
872 udelay(1);
873 ret = lan78xx_read_reg(dev, OTP_STATUS, &buf);
874 if (time_after(jiffies, timeout)) {
875 netdev_warn(dev->net,
876 "timeout on OTP_STATUS");
877 return -EIO;
878 }
879 } while (buf & OTP_STATUS_BUSY_);
880
881 ret = lan78xx_read_reg(dev, OTP_RD_DATA, &buf);
882
883 data[i] = (u8)(buf & 0xFF);
884 }
885
886 return 0;
887}
888
Woojung.Huh@microchip.com9fb60662016-01-05 17:29:59 +0000889static int lan78xx_write_raw_otp(struct lan78xx_net *dev, u32 offset,
890 u32 length, u8 *data)
891{
892 int i;
893 int ret;
894 u32 buf;
895 unsigned long timeout;
896
897 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
898
899 if (buf & OTP_PWR_DN_PWRDN_N_) {
900 /* clear it and wait to be cleared */
901 ret = lan78xx_write_reg(dev, OTP_PWR_DN, 0);
902
903 timeout = jiffies + HZ;
904 do {
905 udelay(1);
906 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
907 if (time_after(jiffies, timeout)) {
908 netdev_warn(dev->net,
909 "timeout on OTP_PWR_DN completion");
910 return -EIO;
911 }
912 } while (buf & OTP_PWR_DN_PWRDN_N_);
913 }
914
915 /* set to BYTE program mode */
916 ret = lan78xx_write_reg(dev, OTP_PRGM_MODE, OTP_PRGM_MODE_BYTE_);
917
918 for (i = 0; i < length; i++) {
919 ret = lan78xx_write_reg(dev, OTP_ADDR1,
920 ((offset + i) >> 8) & OTP_ADDR1_15_11);
921 ret = lan78xx_write_reg(dev, OTP_ADDR2,
922 ((offset + i) & OTP_ADDR2_10_3));
923 ret = lan78xx_write_reg(dev, OTP_PRGM_DATA, data[i]);
924 ret = lan78xx_write_reg(dev, OTP_TST_CMD, OTP_TST_CMD_PRGVRFY_);
925 ret = lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_);
926
927 timeout = jiffies + HZ;
928 do {
929 udelay(1);
930 ret = lan78xx_read_reg(dev, OTP_STATUS, &buf);
931 if (time_after(jiffies, timeout)) {
932 netdev_warn(dev->net,
933 "Timeout on OTP_STATUS completion");
934 return -EIO;
935 }
936 } while (buf & OTP_STATUS_BUSY_);
937 }
938
939 return 0;
940}
941
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000942static int lan78xx_read_otp(struct lan78xx_net *dev, u32 offset,
943 u32 length, u8 *data)
944{
945 u8 sig;
946 int ret;
947
948 ret = lan78xx_read_raw_otp(dev, 0, 1, &sig);
949
950 if (ret == 0) {
951 if (sig == OTP_INDICATOR_1)
952 offset = offset;
953 else if (sig == OTP_INDICATOR_2)
954 offset += 0x100;
955 else
956 ret = -EINVAL;
Phil Elwell4bfc3382018-04-11 10:59:17 +0100957 if (!ret)
958 ret = lan78xx_read_raw_otp(dev, offset, length, data);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000959 }
960
961 return ret;
962}
963
964static int lan78xx_dataport_wait_not_busy(struct lan78xx_net *dev)
965{
966 int i, ret;
967
968 for (i = 0; i < 100; i++) {
969 u32 dp_sel;
970
971 ret = lan78xx_read_reg(dev, DP_SEL, &dp_sel);
972 if (unlikely(ret < 0))
973 return -EIO;
974
975 if (dp_sel & DP_SEL_DPRDY_)
976 return 0;
977
978 usleep_range(40, 100);
979 }
980
981 netdev_warn(dev->net, "lan78xx_dataport_wait_not_busy timed out");
982
983 return -EIO;
984}
985
986static int lan78xx_dataport_write(struct lan78xx_net *dev, u32 ram_select,
987 u32 addr, u32 length, u32 *buf)
988{
989 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
990 u32 dp_sel;
991 int i, ret;
992
993 if (usb_autopm_get_interface(dev->intf) < 0)
994 return 0;
995
996 mutex_lock(&pdata->dataport_mutex);
997
998 ret = lan78xx_dataport_wait_not_busy(dev);
999 if (ret < 0)
1000 goto done;
1001
1002 ret = lan78xx_read_reg(dev, DP_SEL, &dp_sel);
1003
1004 dp_sel &= ~DP_SEL_RSEL_MASK_;
1005 dp_sel |= ram_select;
1006 ret = lan78xx_write_reg(dev, DP_SEL, dp_sel);
1007
1008 for (i = 0; i < length; i++) {
1009 ret = lan78xx_write_reg(dev, DP_ADDR, addr + i);
1010
1011 ret = lan78xx_write_reg(dev, DP_DATA, buf[i]);
1012
1013 ret = lan78xx_write_reg(dev, DP_CMD, DP_CMD_WRITE_);
1014
1015 ret = lan78xx_dataport_wait_not_busy(dev);
1016 if (ret < 0)
1017 goto done;
1018 }
1019
1020done:
1021 mutex_unlock(&pdata->dataport_mutex);
1022 usb_autopm_put_interface(dev->intf);
1023
1024 return ret;
1025}
1026
1027static void lan78xx_set_addr_filter(struct lan78xx_priv *pdata,
1028 int index, u8 addr[ETH_ALEN])
1029{
1030 u32 temp;
1031
1032 if ((pdata) && (index > 0) && (index < NUM_OF_MAF)) {
1033 temp = addr[3];
1034 temp = addr[2] | (temp << 8);
1035 temp = addr[1] | (temp << 8);
1036 temp = addr[0] | (temp << 8);
1037 pdata->pfilter_table[index][1] = temp;
1038 temp = addr[5];
1039 temp = addr[4] | (temp << 8);
1040 temp |= MAF_HI_VALID_ | MAF_HI_TYPE_DST_;
1041 pdata->pfilter_table[index][0] = temp;
1042 }
1043}
1044
1045/* returns hash bit number for given MAC address */
1046static inline u32 lan78xx_hash(char addr[ETH_ALEN])
1047{
1048 return (ether_crc(ETH_ALEN, addr) >> 23) & 0x1ff;
1049}
1050
1051static void lan78xx_deferred_multicast_write(struct work_struct *param)
1052{
1053 struct lan78xx_priv *pdata =
1054 container_of(param, struct lan78xx_priv, set_multicast);
1055 struct lan78xx_net *dev = pdata->dev;
1056 int i;
1057 int ret;
1058
1059 netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x\n",
1060 pdata->rfe_ctl);
1061
1062 lan78xx_dataport_write(dev, DP_SEL_RSEL_VLAN_DA_, DP_SEL_VHF_VLAN_LEN,
1063 DP_SEL_VHF_HASH_LEN, pdata->mchash_table);
1064
1065 for (i = 1; i < NUM_OF_MAF; i++) {
1066 ret = lan78xx_write_reg(dev, MAF_HI(i), 0);
1067 ret = lan78xx_write_reg(dev, MAF_LO(i),
1068 pdata->pfilter_table[i][1]);
1069 ret = lan78xx_write_reg(dev, MAF_HI(i),
1070 pdata->pfilter_table[i][0]);
1071 }
1072
1073 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
1074}
1075
1076static void lan78xx_set_multicast(struct net_device *netdev)
1077{
1078 struct lan78xx_net *dev = netdev_priv(netdev);
1079 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
1080 unsigned long flags;
1081 int i;
1082
1083 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
1084
1085 pdata->rfe_ctl &= ~(RFE_CTL_UCAST_EN_ | RFE_CTL_MCAST_EN_ |
1086 RFE_CTL_DA_PERFECT_ | RFE_CTL_MCAST_HASH_);
1087
1088 for (i = 0; i < DP_SEL_VHF_HASH_LEN; i++)
1089 pdata->mchash_table[i] = 0;
1090 /* pfilter_table[0] has own HW address */
1091 for (i = 1; i < NUM_OF_MAF; i++) {
1092 pdata->pfilter_table[i][0] =
1093 pdata->pfilter_table[i][1] = 0;
1094 }
1095
1096 pdata->rfe_ctl |= RFE_CTL_BCAST_EN_;
1097
1098 if (dev->net->flags & IFF_PROMISC) {
1099 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled");
1100 pdata->rfe_ctl |= RFE_CTL_MCAST_EN_ | RFE_CTL_UCAST_EN_;
1101 } else {
1102 if (dev->net->flags & IFF_ALLMULTI) {
1103 netif_dbg(dev, drv, dev->net,
1104 "receive all multicast enabled");
1105 pdata->rfe_ctl |= RFE_CTL_MCAST_EN_;
1106 }
1107 }
1108
1109 if (netdev_mc_count(dev->net)) {
1110 struct netdev_hw_addr *ha;
1111 int i;
1112
1113 netif_dbg(dev, drv, dev->net, "receive multicast hash filter");
1114
1115 pdata->rfe_ctl |= RFE_CTL_DA_PERFECT_;
1116
1117 i = 1;
1118 netdev_for_each_mc_addr(ha, netdev) {
1119 /* set first 32 into Perfect Filter */
1120 if (i < 33) {
1121 lan78xx_set_addr_filter(pdata, i, ha->addr);
1122 } else {
1123 u32 bitnum = lan78xx_hash(ha->addr);
1124
1125 pdata->mchash_table[bitnum / 32] |=
1126 (1 << (bitnum % 32));
1127 pdata->rfe_ctl |= RFE_CTL_MCAST_HASH_;
1128 }
1129 i++;
1130 }
1131 }
1132
1133 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
1134
1135 /* defer register writes to a sleepable context */
1136 schedule_work(&pdata->set_multicast);
1137}
1138
1139static int lan78xx_update_flowcontrol(struct lan78xx_net *dev, u8 duplex,
1140 u16 lcladv, u16 rmtadv)
1141{
1142 u32 flow = 0, fct_flow = 0;
1143 int ret;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001144 u8 cap;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001145
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001146 if (dev->fc_autoneg)
1147 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
1148 else
1149 cap = dev->fc_request_control;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001150
1151 if (cap & FLOW_CTRL_TX)
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001152 flow |= (FLOW_CR_TX_FCEN_ | 0xFFFF);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001153
1154 if (cap & FLOW_CTRL_RX)
1155 flow |= FLOW_CR_RX_FCEN_;
1156
1157 if (dev->udev->speed == USB_SPEED_SUPER)
1158 fct_flow = 0x817;
1159 else if (dev->udev->speed == USB_SPEED_HIGH)
1160 fct_flow = 0x211;
1161
1162 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s",
1163 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
1164 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
1165
1166 ret = lan78xx_write_reg(dev, FCT_FLOW, fct_flow);
1167
1168 /* threshold value should be set before enabling flow */
1169 ret = lan78xx_write_reg(dev, FLOW, flow);
1170
1171 return 0;
1172}
1173
1174static int lan78xx_link_reset(struct lan78xx_net *dev)
1175{
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001176 struct phy_device *phydev = dev->net->phydev;
Philippe Reynes6e765102016-10-09 12:07:04 +02001177 struct ethtool_link_ksettings ecmd;
Geert Uytterhoeven99c79ec2015-09-04 12:47:28 +02001178 int ladv, radv, ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001179 u32 buf;
1180
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001181 /* clear LAN78xx interrupt status */
1182 ret = lan78xx_write_reg(dev, INT_STS, INT_STS_PHY_INT_);
1183 if (unlikely(ret < 0))
1184 return -EIO;
1185
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001186 phy_read_status(phydev);
1187
1188 if (!phydev->link && dev->link_on) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001189 dev->link_on = false;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001190
1191 /* reset MAC */
1192 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1193 if (unlikely(ret < 0))
1194 return -EIO;
1195 buf |= MAC_CR_RST_;
1196 ret = lan78xx_write_reg(dev, MAC_CR, buf);
1197 if (unlikely(ret < 0))
1198 return -EIO;
Woojung.Huh@microchip.come4953912016-01-27 22:57:52 +00001199
Woojung Huh20ff5562016-03-16 22:10:40 +00001200 del_timer(&dev->stat_monitor);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001201 } else if (phydev->link && !dev->link_on) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001202 dev->link_on = true;
1203
Philippe Reynes6e765102016-10-09 12:07:04 +02001204 phy_ethtool_ksettings_get(phydev, &ecmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001205
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001206 if (dev->udev->speed == USB_SPEED_SUPER) {
Philippe Reynes6e765102016-10-09 12:07:04 +02001207 if (ecmd.base.speed == 1000) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001208 /* disable U2 */
1209 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
1210 buf &= ~USB_CFG1_DEV_U2_INIT_EN_;
1211 ret = lan78xx_write_reg(dev, USB_CFG1, buf);
1212 /* enable U1 */
1213 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
1214 buf |= USB_CFG1_DEV_U1_INIT_EN_;
1215 ret = lan78xx_write_reg(dev, USB_CFG1, buf);
1216 } else {
1217 /* enable U1 & U2 */
1218 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
1219 buf |= USB_CFG1_DEV_U2_INIT_EN_;
1220 buf |= USB_CFG1_DEV_U1_INIT_EN_;
1221 ret = lan78xx_write_reg(dev, USB_CFG1, buf);
1222 }
1223 }
1224
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001225 ladv = phy_read(phydev, MII_ADVERTISE);
Geert Uytterhoeven99c79ec2015-09-04 12:47:28 +02001226 if (ladv < 0)
1227 return ladv;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001228
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001229 radv = phy_read(phydev, MII_LPA);
Geert Uytterhoeven99c79ec2015-09-04 12:47:28 +02001230 if (radv < 0)
1231 return radv;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001232
1233 netif_dbg(dev, link, dev->net,
1234 "speed: %u duplex: %d anadv: 0x%04x anlpa: 0x%04x",
Philippe Reynes6e765102016-10-09 12:07:04 +02001235 ecmd.base.speed, ecmd.base.duplex, ladv, radv);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001236
Philippe Reynes6e765102016-10-09 12:07:04 +02001237 ret = lan78xx_update_flowcontrol(dev, ecmd.base.duplex, ladv,
1238 radv);
Woojung Huh20ff5562016-03-16 22:10:40 +00001239
1240 if (!timer_pending(&dev->stat_monitor)) {
1241 dev->delta = 1;
1242 mod_timer(&dev->stat_monitor,
1243 jiffies + STAT_UPDATE_TIMER);
1244 }
Stefan Wahren136f55f2018-07-28 09:52:10 +02001245
1246 tasklet_schedule(&dev->bh);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001247 }
1248
1249 return ret;
1250}
1251
1252/* some work can't be done in tasklets, so we use keventd
1253 *
1254 * NOTE: annoying asymmetry: if it's active, schedule_work() fails,
1255 * but tasklet_schedule() doesn't. hope the failure is rare.
1256 */
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08001257static void lan78xx_defer_kevent(struct lan78xx_net *dev, int work)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001258{
1259 set_bit(work, &dev->flags);
1260 if (!schedule_delayed_work(&dev->wq, 0))
1261 netdev_err(dev->net, "kevent %d may have been dropped\n", work);
1262}
1263
1264static void lan78xx_status(struct lan78xx_net *dev, struct urb *urb)
1265{
1266 u32 intdata;
1267
1268 if (urb->actual_length != 4) {
1269 netdev_warn(dev->net,
1270 "unexpected urb length %d", urb->actual_length);
1271 return;
1272 }
1273
1274 memcpy(&intdata, urb->transfer_buffer, 4);
1275 le32_to_cpus(&intdata);
1276
1277 if (intdata & INT_ENP_PHY_INT) {
1278 netif_dbg(dev, link, dev->net, "PHY INTR: 0x%08x\n", intdata);
Woojung Huhcc89c322016-11-01 20:02:00 +00001279 lan78xx_defer_kevent(dev, EVENT_LINK_RESET);
1280
1281 if (dev->domain_data.phyirq > 0)
1282 generic_handle_irq(dev->domain_data.phyirq);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001283 } else
1284 netdev_warn(dev->net,
1285 "unexpected interrupt: 0x%08x\n", intdata);
1286}
1287
1288static int lan78xx_ethtool_get_eeprom_len(struct net_device *netdev)
1289{
1290 return MAX_EEPROM_SIZE;
1291}
1292
1293static int lan78xx_ethtool_get_eeprom(struct net_device *netdev,
1294 struct ethtool_eeprom *ee, u8 *data)
1295{
1296 struct lan78xx_net *dev = netdev_priv(netdev);
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301297 int ret;
1298
1299 ret = usb_autopm_get_interface(dev->intf);
1300 if (ret)
1301 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001302
1303 ee->magic = LAN78XX_EEPROM_MAGIC;
1304
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301305 ret = lan78xx_read_raw_eeprom(dev, ee->offset, ee->len, data);
1306
1307 usb_autopm_put_interface(dev->intf);
1308
1309 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001310}
1311
1312static int lan78xx_ethtool_set_eeprom(struct net_device *netdev,
1313 struct ethtool_eeprom *ee, u8 *data)
1314{
1315 struct lan78xx_net *dev = netdev_priv(netdev);
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301316 int ret;
1317
1318 ret = usb_autopm_get_interface(dev->intf);
1319 if (ret)
1320 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001321
Nisar Sayedc0776822017-09-21 02:36:37 +05301322 /* Invalid EEPROM_INDICATOR at offset zero will result in a failure
1323 * to load data from EEPROM
1324 */
1325 if (ee->magic == LAN78XX_EEPROM_MAGIC)
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301326 ret = lan78xx_write_raw_eeprom(dev, ee->offset, ee->len, data);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001327 else if ((ee->magic == LAN78XX_OTP_MAGIC) &&
1328 (ee->offset == 0) &&
1329 (ee->len == 512) &&
1330 (data[0] == OTP_INDICATOR_1))
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301331 ret = lan78xx_write_raw_otp(dev, ee->offset, ee->len, data);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001332
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301333 usb_autopm_put_interface(dev->intf);
1334
1335 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001336}
1337
1338static void lan78xx_get_strings(struct net_device *netdev, u32 stringset,
1339 u8 *data)
1340{
1341 if (stringset == ETH_SS_STATS)
1342 memcpy(data, lan78xx_gstrings, sizeof(lan78xx_gstrings));
1343}
1344
1345static int lan78xx_get_sset_count(struct net_device *netdev, int sset)
1346{
1347 if (sset == ETH_SS_STATS)
1348 return ARRAY_SIZE(lan78xx_gstrings);
1349 else
1350 return -EOPNOTSUPP;
1351}
1352
1353static void lan78xx_get_stats(struct net_device *netdev,
1354 struct ethtool_stats *stats, u64 *data)
1355{
1356 struct lan78xx_net *dev = netdev_priv(netdev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001357
Woojung Huh20ff5562016-03-16 22:10:40 +00001358 lan78xx_update_stats(dev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001359
Woojung Huh20ff5562016-03-16 22:10:40 +00001360 mutex_lock(&dev->stats.access_lock);
1361 memcpy(data, &dev->stats.curr_stat, sizeof(dev->stats.curr_stat));
1362 mutex_unlock(&dev->stats.access_lock);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001363}
1364
1365static void lan78xx_get_wol(struct net_device *netdev,
1366 struct ethtool_wolinfo *wol)
1367{
1368 struct lan78xx_net *dev = netdev_priv(netdev);
1369 int ret;
1370 u32 buf;
1371 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
1372
1373 if (usb_autopm_get_interface(dev->intf) < 0)
1374 return;
1375
1376 ret = lan78xx_read_reg(dev, USB_CFG0, &buf);
1377 if (unlikely(ret < 0)) {
1378 wol->supported = 0;
1379 wol->wolopts = 0;
1380 } else {
1381 if (buf & USB_CFG_RMT_WKP_) {
1382 wol->supported = WAKE_ALL;
1383 wol->wolopts = pdata->wol;
1384 } else {
1385 wol->supported = 0;
1386 wol->wolopts = 0;
1387 }
1388 }
1389
1390 usb_autopm_put_interface(dev->intf);
1391}
1392
1393static int lan78xx_set_wol(struct net_device *netdev,
1394 struct ethtool_wolinfo *wol)
1395{
1396 struct lan78xx_net *dev = netdev_priv(netdev);
1397 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
1398 int ret;
1399
1400 ret = usb_autopm_get_interface(dev->intf);
1401 if (ret < 0)
1402 return ret;
1403
1404 pdata->wol = 0;
1405 if (wol->wolopts & WAKE_UCAST)
1406 pdata->wol |= WAKE_UCAST;
1407 if (wol->wolopts & WAKE_MCAST)
1408 pdata->wol |= WAKE_MCAST;
1409 if (wol->wolopts & WAKE_BCAST)
1410 pdata->wol |= WAKE_BCAST;
1411 if (wol->wolopts & WAKE_MAGIC)
1412 pdata->wol |= WAKE_MAGIC;
1413 if (wol->wolopts & WAKE_PHY)
1414 pdata->wol |= WAKE_PHY;
1415 if (wol->wolopts & WAKE_ARP)
1416 pdata->wol |= WAKE_ARP;
1417
1418 device_set_wakeup_enable(&dev->udev->dev, (bool)wol->wolopts);
1419
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001420 phy_ethtool_set_wol(netdev->phydev, wol);
1421
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001422 usb_autopm_put_interface(dev->intf);
1423
1424 return ret;
1425}
1426
1427static int lan78xx_get_eee(struct net_device *net, struct ethtool_eee *edata)
1428{
1429 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001430 struct phy_device *phydev = net->phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001431 int ret;
1432 u32 buf;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001433
1434 ret = usb_autopm_get_interface(dev->intf);
1435 if (ret < 0)
1436 return ret;
1437
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001438 ret = phy_ethtool_get_eee(phydev, edata);
1439 if (ret < 0)
1440 goto exit;
1441
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001442 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1443 if (buf & MAC_CR_EEE_EN_) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001444 edata->eee_enabled = true;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001445 edata->eee_active = !!(edata->advertised &
1446 edata->lp_advertised);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001447 edata->tx_lpi_enabled = true;
1448 /* EEE_TX_LPI_REQ_DLY & tx_lpi_timer are same uSec unit */
1449 ret = lan78xx_read_reg(dev, EEE_TX_LPI_REQ_DLY, &buf);
1450 edata->tx_lpi_timer = buf;
1451 } else {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001452 edata->eee_enabled = false;
1453 edata->eee_active = false;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001454 edata->tx_lpi_enabled = false;
1455 edata->tx_lpi_timer = 0;
1456 }
1457
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001458 ret = 0;
1459exit:
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001460 usb_autopm_put_interface(dev->intf);
1461
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001462 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001463}
1464
1465static int lan78xx_set_eee(struct net_device *net, struct ethtool_eee *edata)
1466{
1467 struct lan78xx_net *dev = netdev_priv(net);
1468 int ret;
1469 u32 buf;
1470
1471 ret = usb_autopm_get_interface(dev->intf);
1472 if (ret < 0)
1473 return ret;
1474
1475 if (edata->eee_enabled) {
1476 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1477 buf |= MAC_CR_EEE_EN_;
1478 ret = lan78xx_write_reg(dev, MAC_CR, buf);
1479
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001480 phy_ethtool_set_eee(net->phydev, edata);
1481
1482 buf = (u32)edata->tx_lpi_timer;
1483 ret = lan78xx_write_reg(dev, EEE_TX_LPI_REQ_DLY, buf);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001484 } else {
1485 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1486 buf &= ~MAC_CR_EEE_EN_;
1487 ret = lan78xx_write_reg(dev, MAC_CR, buf);
1488 }
1489
1490 usb_autopm_put_interface(dev->intf);
1491
1492 return 0;
1493}
1494
1495static u32 lan78xx_get_link(struct net_device *net)
1496{
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001497 phy_read_status(net->phydev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001498
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001499 return net->phydev->link;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001500}
1501
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001502static void lan78xx_get_drvinfo(struct net_device *net,
1503 struct ethtool_drvinfo *info)
1504{
1505 struct lan78xx_net *dev = netdev_priv(net);
1506
1507 strncpy(info->driver, DRIVER_NAME, sizeof(info->driver));
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001508 usb_make_path(dev->udev, info->bus_info, sizeof(info->bus_info));
1509}
1510
1511static u32 lan78xx_get_msglevel(struct net_device *net)
1512{
1513 struct lan78xx_net *dev = netdev_priv(net);
1514
1515 return dev->msg_enable;
1516}
1517
1518static void lan78xx_set_msglevel(struct net_device *net, u32 level)
1519{
1520 struct lan78xx_net *dev = netdev_priv(net);
1521
1522 dev->msg_enable = level;
1523}
1524
Philippe Reynes6e765102016-10-09 12:07:04 +02001525static int lan78xx_get_link_ksettings(struct net_device *net,
1526 struct ethtool_link_ksettings *cmd)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001527{
1528 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001529 struct phy_device *phydev = net->phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001530 int ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001531
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001532 ret = usb_autopm_get_interface(dev->intf);
1533 if (ret < 0)
1534 return ret;
1535
yuval.shaia@oracle.com55141742017-06-13 10:09:46 +03001536 phy_ethtool_ksettings_get(phydev, cmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001537
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001538 usb_autopm_put_interface(dev->intf);
1539
1540 return ret;
1541}
1542
Philippe Reynes6e765102016-10-09 12:07:04 +02001543static int lan78xx_set_link_ksettings(struct net_device *net,
1544 const struct ethtool_link_ksettings *cmd)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001545{
1546 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001547 struct phy_device *phydev = net->phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001548 int ret = 0;
1549 int temp;
1550
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001551 ret = usb_autopm_get_interface(dev->intf);
1552 if (ret < 0)
1553 return ret;
1554
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001555 /* change speed & duplex */
Philippe Reynes6e765102016-10-09 12:07:04 +02001556 ret = phy_ethtool_ksettings_set(phydev, cmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001557
Philippe Reynes6e765102016-10-09 12:07:04 +02001558 if (!cmd->base.autoneg) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001559 /* force link down */
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001560 temp = phy_read(phydev, MII_BMCR);
1561 phy_write(phydev, MII_BMCR, temp | BMCR_LOOPBACK);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001562 mdelay(1);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001563 phy_write(phydev, MII_BMCR, temp);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001564 }
1565
1566 usb_autopm_put_interface(dev->intf);
1567
1568 return ret;
1569}
1570
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001571static void lan78xx_get_pause(struct net_device *net,
1572 struct ethtool_pauseparam *pause)
1573{
1574 struct lan78xx_net *dev = netdev_priv(net);
1575 struct phy_device *phydev = net->phydev;
Philippe Reynes6e765102016-10-09 12:07:04 +02001576 struct ethtool_link_ksettings ecmd;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001577
Philippe Reynes6e765102016-10-09 12:07:04 +02001578 phy_ethtool_ksettings_get(phydev, &ecmd);
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001579
1580 pause->autoneg = dev->fc_autoneg;
1581
1582 if (dev->fc_request_control & FLOW_CTRL_TX)
1583 pause->tx_pause = 1;
1584
1585 if (dev->fc_request_control & FLOW_CTRL_RX)
1586 pause->rx_pause = 1;
1587}
1588
1589static int lan78xx_set_pause(struct net_device *net,
1590 struct ethtool_pauseparam *pause)
1591{
1592 struct lan78xx_net *dev = netdev_priv(net);
1593 struct phy_device *phydev = net->phydev;
Philippe Reynes6e765102016-10-09 12:07:04 +02001594 struct ethtool_link_ksettings ecmd;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001595 int ret;
1596
Philippe Reynes6e765102016-10-09 12:07:04 +02001597 phy_ethtool_ksettings_get(phydev, &ecmd);
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001598
Philippe Reynes6e765102016-10-09 12:07:04 +02001599 if (pause->autoneg && !ecmd.base.autoneg) {
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001600 ret = -EINVAL;
1601 goto exit;
1602 }
1603
1604 dev->fc_request_control = 0;
1605 if (pause->rx_pause)
1606 dev->fc_request_control |= FLOW_CTRL_RX;
1607
1608 if (pause->tx_pause)
1609 dev->fc_request_control |= FLOW_CTRL_TX;
1610
Philippe Reynes6e765102016-10-09 12:07:04 +02001611 if (ecmd.base.autoneg) {
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001612 u32 mii_adv;
Philippe Reynes6e765102016-10-09 12:07:04 +02001613 u32 advertising;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001614
Philippe Reynes6e765102016-10-09 12:07:04 +02001615 ethtool_convert_link_mode_to_legacy_u32(
1616 &advertising, ecmd.link_modes.advertising);
1617
1618 advertising &= ~(ADVERTISED_Pause | ADVERTISED_Asym_Pause);
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001619 mii_adv = (u32)mii_advertise_flowctrl(dev->fc_request_control);
Philippe Reynes6e765102016-10-09 12:07:04 +02001620 advertising |= mii_adv_to_ethtool_adv_t(mii_adv);
1621
1622 ethtool_convert_legacy_u32_to_link_mode(
1623 ecmd.link_modes.advertising, advertising);
1624
1625 phy_ethtool_ksettings_set(phydev, &ecmd);
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001626 }
1627
1628 dev->fc_autoneg = pause->autoneg;
1629
1630 ret = 0;
1631exit:
1632 return ret;
1633}
1634
Raghuram Chary J49621862018-04-20 11:43:50 +05301635static int lan78xx_get_regs_len(struct net_device *netdev)
1636{
1637 if (!netdev->phydev)
1638 return (sizeof(lan78xx_regs));
1639 else
1640 return (sizeof(lan78xx_regs) + PHY_REG_SIZE);
1641}
1642
1643static void
1644lan78xx_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
1645 void *buf)
1646{
1647 u32 *data = buf;
1648 int i, j;
1649 struct lan78xx_net *dev = netdev_priv(netdev);
1650
1651 /* Read Device/MAC registers */
1652 for (i = 0; i < (sizeof(lan78xx_regs) / sizeof(u32)); i++)
1653 lan78xx_read_reg(dev, lan78xx_regs[i], &data[i]);
1654
1655 if (!netdev->phydev)
1656 return;
1657
1658 /* Read PHY registers */
1659 for (j = 0; j < 32; i++, j++)
1660 data[i] = phy_read(netdev->phydev, j);
1661}
1662
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001663static const struct ethtool_ops lan78xx_ethtool_ops = {
1664 .get_link = lan78xx_get_link,
Florian Fainelli860ce4b2016-11-15 10:06:44 -08001665 .nway_reset = phy_ethtool_nway_reset,
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001666 .get_drvinfo = lan78xx_get_drvinfo,
1667 .get_msglevel = lan78xx_get_msglevel,
1668 .set_msglevel = lan78xx_set_msglevel,
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001669 .get_eeprom_len = lan78xx_ethtool_get_eeprom_len,
1670 .get_eeprom = lan78xx_ethtool_get_eeprom,
1671 .set_eeprom = lan78xx_ethtool_set_eeprom,
1672 .get_ethtool_stats = lan78xx_get_stats,
1673 .get_sset_count = lan78xx_get_sset_count,
1674 .get_strings = lan78xx_get_strings,
1675 .get_wol = lan78xx_get_wol,
1676 .set_wol = lan78xx_set_wol,
1677 .get_eee = lan78xx_get_eee,
1678 .set_eee = lan78xx_set_eee,
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001679 .get_pauseparam = lan78xx_get_pause,
1680 .set_pauseparam = lan78xx_set_pause,
Philippe Reynes6e765102016-10-09 12:07:04 +02001681 .get_link_ksettings = lan78xx_get_link_ksettings,
1682 .set_link_ksettings = lan78xx_set_link_ksettings,
Raghuram Chary J49621862018-04-20 11:43:50 +05301683 .get_regs_len = lan78xx_get_regs_len,
1684 .get_regs = lan78xx_get_regs,
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001685};
1686
1687static int lan78xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
1688{
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001689 if (!netif_running(netdev))
1690 return -EINVAL;
1691
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001692 return phy_mii_ioctl(netdev->phydev, rq, cmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001693}
1694
1695static void lan78xx_init_mac_address(struct lan78xx_net *dev)
1696{
1697 u32 addr_lo, addr_hi;
1698 int ret;
1699 u8 addr[6];
1700
1701 ret = lan78xx_read_reg(dev, RX_ADDRL, &addr_lo);
1702 ret = lan78xx_read_reg(dev, RX_ADDRH, &addr_hi);
1703
1704 addr[0] = addr_lo & 0xFF;
1705 addr[1] = (addr_lo >> 8) & 0xFF;
1706 addr[2] = (addr_lo >> 16) & 0xFF;
1707 addr[3] = (addr_lo >> 24) & 0xFF;
1708 addr[4] = addr_hi & 0xFF;
1709 addr[5] = (addr_hi >> 8) & 0xFF;
1710
1711 if (!is_valid_ether_addr(addr)) {
Phil Elwell760db292018-04-19 17:59:38 +01001712 if (!eth_platform_get_mac_address(&dev->udev->dev, addr)) {
1713 /* valid address present in Device Tree */
1714 netif_dbg(dev, ifup, dev->net,
1715 "MAC address read from Device Tree");
1716 } else if (((lan78xx_read_eeprom(dev, EEPROM_MAC_OFFSET,
1717 ETH_ALEN, addr) == 0) ||
1718 (lan78xx_read_otp(dev, EEPROM_MAC_OFFSET,
1719 ETH_ALEN, addr) == 0)) &&
1720 is_valid_ether_addr(addr)) {
1721 /* eeprom values are valid so use them */
1722 netif_dbg(dev, ifup, dev->net,
1723 "MAC address read from EEPROM");
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001724 } else {
1725 /* generate random MAC */
1726 random_ether_addr(addr);
1727 netif_dbg(dev, ifup, dev->net,
1728 "MAC address set to random addr");
1729 }
Phil Elwell760db292018-04-19 17:59:38 +01001730
1731 addr_lo = addr[0] | (addr[1] << 8) |
1732 (addr[2] << 16) | (addr[3] << 24);
1733 addr_hi = addr[4] | (addr[5] << 8);
1734
1735 ret = lan78xx_write_reg(dev, RX_ADDRL, addr_lo);
1736 ret = lan78xx_write_reg(dev, RX_ADDRH, addr_hi);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001737 }
1738
1739 ret = lan78xx_write_reg(dev, MAF_LO(0), addr_lo);
1740 ret = lan78xx_write_reg(dev, MAF_HI(0), addr_hi | MAF_HI_VALID_);
1741
1742 ether_addr_copy(dev->net->dev_addr, addr);
1743}
1744
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001745/* MDIO read and write wrappers for phylib */
1746static int lan78xx_mdiobus_read(struct mii_bus *bus, int phy_id, int idx)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001747{
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001748 struct lan78xx_net *dev = bus->priv;
1749 u32 val, addr;
1750 int ret;
1751
1752 ret = usb_autopm_get_interface(dev->intf);
1753 if (ret < 0)
1754 return ret;
1755
1756 mutex_lock(&dev->phy_mutex);
1757
1758 /* confirm MII not busy */
1759 ret = lan78xx_phy_wait_not_busy(dev);
1760 if (ret < 0)
1761 goto done;
1762
1763 /* set the address, index & direction (read from PHY) */
1764 addr = mii_access(phy_id, idx, MII_READ);
1765 ret = lan78xx_write_reg(dev, MII_ACC, addr);
1766
1767 ret = lan78xx_phy_wait_not_busy(dev);
1768 if (ret < 0)
1769 goto done;
1770
1771 ret = lan78xx_read_reg(dev, MII_DATA, &val);
1772
1773 ret = (int)(val & 0xFFFF);
1774
1775done:
1776 mutex_unlock(&dev->phy_mutex);
1777 usb_autopm_put_interface(dev->intf);
Woojung Huh02dc1f32016-12-07 20:26:25 +00001778
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001779 return ret;
1780}
1781
1782static int lan78xx_mdiobus_write(struct mii_bus *bus, int phy_id, int idx,
1783 u16 regval)
1784{
1785 struct lan78xx_net *dev = bus->priv;
1786 u32 val, addr;
1787 int ret;
1788
1789 ret = usb_autopm_get_interface(dev->intf);
1790 if (ret < 0)
1791 return ret;
1792
1793 mutex_lock(&dev->phy_mutex);
1794
1795 /* confirm MII not busy */
1796 ret = lan78xx_phy_wait_not_busy(dev);
1797 if (ret < 0)
1798 goto done;
1799
1800 val = (u32)regval;
1801 ret = lan78xx_write_reg(dev, MII_DATA, val);
1802
1803 /* set the address, index & direction (write to PHY) */
1804 addr = mii_access(phy_id, idx, MII_WRITE);
1805 ret = lan78xx_write_reg(dev, MII_ACC, addr);
1806
1807 ret = lan78xx_phy_wait_not_busy(dev);
1808 if (ret < 0)
1809 goto done;
1810
1811done:
1812 mutex_unlock(&dev->phy_mutex);
1813 usb_autopm_put_interface(dev->intf);
1814 return 0;
1815}
1816
1817static int lan78xx_mdio_init(struct lan78xx_net *dev)
1818{
Phil Elwell1827b062018-04-19 17:59:39 +01001819 struct device_node *node;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001820 int ret;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001821
1822 dev->mdiobus = mdiobus_alloc();
1823 if (!dev->mdiobus) {
1824 netdev_err(dev->net, "can't allocate MDIO bus\n");
1825 return -ENOMEM;
1826 }
1827
1828 dev->mdiobus->priv = (void *)dev;
1829 dev->mdiobus->read = lan78xx_mdiobus_read;
1830 dev->mdiobus->write = lan78xx_mdiobus_write;
1831 dev->mdiobus->name = "lan78xx-mdiobus";
1832
1833 snprintf(dev->mdiobus->id, MII_BUS_ID_SIZE, "usb-%03d:%03d",
1834 dev->udev->bus->busnum, dev->udev->devnum);
1835
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +00001836 switch (dev->chipid) {
1837 case ID_REV_CHIP_ID_7800_:
1838 case ID_REV_CHIP_ID_7850_:
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001839 /* set to internal PHY id */
1840 dev->mdiobus->phy_mask = ~(1 << 1);
1841 break;
Woojung Huh02dc1f32016-12-07 20:26:25 +00001842 case ID_REV_CHIP_ID_7801_:
1843 /* scan thru PHYAD[2..0] */
1844 dev->mdiobus->phy_mask = ~(0xFF);
1845 break;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001846 }
1847
Phil Elwell1827b062018-04-19 17:59:39 +01001848 node = of_get_child_by_name(dev->udev->dev.of_node, "mdio");
Florian Fainelli00e798c2018-05-15 16:56:19 -07001849 ret = of_mdiobus_register(dev->mdiobus, node);
1850 if (node)
Phil Elwell1827b062018-04-19 17:59:39 +01001851 of_node_put(node);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001852 if (ret) {
1853 netdev_err(dev->net, "can't register MDIO bus\n");
Andrew Lunne7f4dc32016-01-06 20:11:15 +01001854 goto exit1;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001855 }
1856
1857 netdev_dbg(dev->net, "registered mdiobus bus %s\n", dev->mdiobus->id);
1858 return 0;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001859exit1:
1860 mdiobus_free(dev->mdiobus);
1861 return ret;
1862}
1863
1864static void lan78xx_remove_mdio(struct lan78xx_net *dev)
1865{
1866 mdiobus_unregister(dev->mdiobus);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001867 mdiobus_free(dev->mdiobus);
1868}
1869
1870static void lan78xx_link_status_change(struct net_device *net)
1871{
Woojung Huh14437e32016-04-25 22:22:36 +00001872 struct phy_device *phydev = net->phydev;
1873 int ret, temp;
1874
1875 /* At forced 100 F/H mode, chip may fail to set mode correctly
1876 * when cable is switched between long(~50+m) and short one.
1877 * As workaround, set to 10 before setting to 100
1878 * at forced 100 F/H mode.
1879 */
1880 if (!phydev->autoneg && (phydev->speed == 100)) {
1881 /* disable phy interrupt */
1882 temp = phy_read(phydev, LAN88XX_INT_MASK);
1883 temp &= ~LAN88XX_INT_MASK_MDINTPIN_EN_;
1884 ret = phy_write(phydev, LAN88XX_INT_MASK, temp);
1885
1886 temp = phy_read(phydev, MII_BMCR);
1887 temp &= ~(BMCR_SPEED100 | BMCR_SPEED1000);
1888 phy_write(phydev, MII_BMCR, temp); /* set to 10 first */
1889 temp |= BMCR_SPEED100;
1890 phy_write(phydev, MII_BMCR, temp); /* set to 100 later */
1891
1892 /* clear pending interrupt generated while workaround */
1893 temp = phy_read(phydev, LAN88XX_INT_STS);
1894
1895 /* enable phy interrupt back */
1896 temp = phy_read(phydev, LAN88XX_INT_MASK);
1897 temp |= LAN88XX_INT_MASK_MDINTPIN_EN_;
1898 ret = phy_write(phydev, LAN88XX_INT_MASK, temp);
1899 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001900}
1901
Woojung Huhcc89c322016-11-01 20:02:00 +00001902static int irq_map(struct irq_domain *d, unsigned int irq,
1903 irq_hw_number_t hwirq)
1904{
1905 struct irq_domain_data *data = d->host_data;
1906
1907 irq_set_chip_data(irq, data);
1908 irq_set_chip_and_handler(irq, data->irqchip, data->irq_handler);
1909 irq_set_noprobe(irq);
1910
1911 return 0;
1912}
1913
1914static void irq_unmap(struct irq_domain *d, unsigned int irq)
1915{
1916 irq_set_chip_and_handler(irq, NULL, NULL);
1917 irq_set_chip_data(irq, NULL);
1918}
1919
1920static const struct irq_domain_ops chip_domain_ops = {
1921 .map = irq_map,
1922 .unmap = irq_unmap,
1923};
1924
1925static void lan78xx_irq_mask(struct irq_data *irqd)
1926{
1927 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1928
1929 data->irqenable &= ~BIT(irqd_to_hwirq(irqd));
1930}
1931
1932static void lan78xx_irq_unmask(struct irq_data *irqd)
1933{
1934 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1935
1936 data->irqenable |= BIT(irqd_to_hwirq(irqd));
1937}
1938
1939static void lan78xx_irq_bus_lock(struct irq_data *irqd)
1940{
1941 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1942
1943 mutex_lock(&data->irq_lock);
1944}
1945
1946static void lan78xx_irq_bus_sync_unlock(struct irq_data *irqd)
1947{
1948 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1949 struct lan78xx_net *dev =
1950 container_of(data, struct lan78xx_net, domain_data);
1951 u32 buf;
1952 int ret;
1953
1954 /* call register access here because irq_bus_lock & irq_bus_sync_unlock
1955 * are only two callbacks executed in non-atomic contex.
1956 */
1957 ret = lan78xx_read_reg(dev, INT_EP_CTL, &buf);
1958 if (buf != data->irqenable)
1959 ret = lan78xx_write_reg(dev, INT_EP_CTL, data->irqenable);
1960
1961 mutex_unlock(&data->irq_lock);
1962}
1963
1964static struct irq_chip lan78xx_irqchip = {
1965 .name = "lan78xx-irqs",
1966 .irq_mask = lan78xx_irq_mask,
1967 .irq_unmask = lan78xx_irq_unmask,
1968 .irq_bus_lock = lan78xx_irq_bus_lock,
1969 .irq_bus_sync_unlock = lan78xx_irq_bus_sync_unlock,
1970};
1971
1972static int lan78xx_setup_irq_domain(struct lan78xx_net *dev)
1973{
1974 struct device_node *of_node;
1975 struct irq_domain *irqdomain;
1976 unsigned int irqmap = 0;
1977 u32 buf;
1978 int ret = 0;
1979
1980 of_node = dev->udev->dev.parent->of_node;
1981
1982 mutex_init(&dev->domain_data.irq_lock);
1983
1984 lan78xx_read_reg(dev, INT_EP_CTL, &buf);
1985 dev->domain_data.irqenable = buf;
1986
1987 dev->domain_data.irqchip = &lan78xx_irqchip;
1988 dev->domain_data.irq_handler = handle_simple_irq;
1989
1990 irqdomain = irq_domain_add_simple(of_node, MAX_INT_EP, 0,
1991 &chip_domain_ops, &dev->domain_data);
1992 if (irqdomain) {
1993 /* create mapping for PHY interrupt */
1994 irqmap = irq_create_mapping(irqdomain, INT_EP_PHY);
1995 if (!irqmap) {
1996 irq_domain_remove(irqdomain);
1997
1998 irqdomain = NULL;
1999 ret = -EINVAL;
2000 }
2001 } else {
2002 ret = -EINVAL;
2003 }
2004
2005 dev->domain_data.irqdomain = irqdomain;
2006 dev->domain_data.phyirq = irqmap;
2007
2008 return ret;
2009}
2010
2011static void lan78xx_remove_irq_domain(struct lan78xx_net *dev)
2012{
2013 if (dev->domain_data.phyirq > 0) {
2014 irq_dispose_mapping(dev->domain_data.phyirq);
2015
2016 if (dev->domain_data.irqdomain)
2017 irq_domain_remove(dev->domain_data.irqdomain);
2018 }
2019 dev->domain_data.phyirq = 0;
2020 dev->domain_data.irqdomain = NULL;
2021}
2022
Woojung Huh02dc1f32016-12-07 20:26:25 +00002023static int lan8835_fixup(struct phy_device *phydev)
2024{
2025 int buf;
2026 int ret;
2027 struct lan78xx_net *dev = netdev_priv(phydev->attached_dev);
2028
2029 /* LED2/PME_N/IRQ_N/RGMII_ID pin to IRQ_N mode */
Russell King5f613672017-03-21 16:36:48 +00002030 buf = phy_read_mmd(phydev, MDIO_MMD_PCS, 0x8010);
Woojung Huh02dc1f32016-12-07 20:26:25 +00002031 buf &= ~0x1800;
2032 buf |= 0x0800;
Russell King5f613672017-03-21 16:36:48 +00002033 phy_write_mmd(phydev, MDIO_MMD_PCS, 0x8010, buf);
Woojung Huh02dc1f32016-12-07 20:26:25 +00002034
2035 /* RGMII MAC TXC Delay Enable */
2036 ret = lan78xx_write_reg(dev, MAC_RGMII_ID,
2037 MAC_RGMII_ID_TXC_DELAY_EN_);
2038
2039 /* RGMII TX DLL Tune Adjust */
2040 ret = lan78xx_write_reg(dev, RGMII_TX_BYP_DLL, 0x3D00);
2041
2042 dev->interface = PHY_INTERFACE_MODE_RGMII_TXID;
2043
2044 return 1;
2045}
2046
2047static int ksz9031rnx_fixup(struct phy_device *phydev)
2048{
2049 struct lan78xx_net *dev = netdev_priv(phydev->attached_dev);
2050
2051 /* Micrel9301RNX PHY configuration */
2052 /* RGMII Control Signal Pad Skew */
Russell King5f613672017-03-21 16:36:48 +00002053 phy_write_mmd(phydev, MDIO_MMD_WIS, 4, 0x0077);
Woojung Huh02dc1f32016-12-07 20:26:25 +00002054 /* RGMII RX Data Pad Skew */
Russell King5f613672017-03-21 16:36:48 +00002055 phy_write_mmd(phydev, MDIO_MMD_WIS, 5, 0x7777);
Woojung Huh02dc1f32016-12-07 20:26:25 +00002056 /* RGMII RX Clock Pad Skew */
Russell King5f613672017-03-21 16:36:48 +00002057 phy_write_mmd(phydev, MDIO_MMD_WIS, 8, 0x1FF);
Woojung Huh02dc1f32016-12-07 20:26:25 +00002058
2059 dev->interface = PHY_INTERFACE_MODE_RGMII_RXID;
2060
2061 return 1;
2062}
2063
Raghuram Chary J89b36fb2018-04-28 11:33:14 +05302064static struct phy_device *lan7801_phy_init(struct lan78xx_net *dev)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002065{
Raghuram Chary J89b36fb2018-04-28 11:33:14 +05302066 u32 buf;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002067 int ret;
Raghuram Chary J89b36fb2018-04-28 11:33:14 +05302068 struct fixed_phy_status fphy_status = {
2069 .link = 1,
2070 .speed = SPEED_1000,
2071 .duplex = DUPLEX_FULL,
2072 };
Colin Ian King3b51cc72018-02-01 17:10:18 +00002073 struct phy_device *phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002074
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002075 phydev = phy_find_first(dev->mdiobus);
2076 if (!phydev) {
Raghuram Chary J89b36fb2018-04-28 11:33:14 +05302077 netdev_dbg(dev->net, "PHY Not Found!! Registering Fixed PHY\n");
2078 phydev = fixed_phy_register(PHY_POLL, &fphy_status, -1,
2079 NULL);
2080 if (IS_ERR(phydev)) {
2081 netdev_err(dev->net, "No PHY/fixed_PHY found\n");
2082 return NULL;
2083 }
2084 netdev_dbg(dev->net, "Registered FIXED PHY\n");
2085 dev->interface = PHY_INTERFACE_MODE_RGMII;
2086 ret = lan78xx_write_reg(dev, MAC_RGMII_ID,
2087 MAC_RGMII_ID_TXC_DELAY_EN_);
2088 ret = lan78xx_write_reg(dev, RGMII_TX_BYP_DLL, 0x3D00);
2089 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2090 buf |= HW_CFG_CLK125_EN_;
2091 buf |= HW_CFG_REFCLK25_EN_;
2092 ret = lan78xx_write_reg(dev, HW_CFG, buf);
2093 } else {
Woojung Huh02dc1f32016-12-07 20:26:25 +00002094 if (!phydev->drv) {
2095 netdev_err(dev->net, "no PHY driver found\n");
Raghuram Chary J89b36fb2018-04-28 11:33:14 +05302096 return NULL;
Woojung Huh02dc1f32016-12-07 20:26:25 +00002097 }
Woojung Huh02dc1f32016-12-07 20:26:25 +00002098 dev->interface = PHY_INTERFACE_MODE_RGMII;
Woojung Huh02dc1f32016-12-07 20:26:25 +00002099 /* external PHY fixup for KSZ9031RNX */
2100 ret = phy_register_fixup_for_uid(PHY_KSZ9031RNX, 0xfffffff0,
2101 ksz9031rnx_fixup);
2102 if (ret < 0) {
Raghuram Chary J7670ed72018-04-28 11:33:16 +05302103 netdev_err(dev->net, "Failed to register fixup for PHY_KSZ9031RNX\n");
Raghuram Chary J89b36fb2018-04-28 11:33:14 +05302104 return NULL;
Woojung Huh02dc1f32016-12-07 20:26:25 +00002105 }
2106 /* external PHY fixup for LAN8835 */
2107 ret = phy_register_fixup_for_uid(PHY_LAN8835, 0xfffffff0,
2108 lan8835_fixup);
2109 if (ret < 0) {
Raghuram Chary J7670ed72018-04-28 11:33:16 +05302110 netdev_err(dev->net, "Failed to register fixup for PHY_LAN8835\n");
Raghuram Chary J89b36fb2018-04-28 11:33:14 +05302111 return NULL;
Woojung Huh02dc1f32016-12-07 20:26:25 +00002112 }
2113 /* add more external PHY fixup here if needed */
2114
2115 phydev->is_internal = false;
Raghuram Chary J89b36fb2018-04-28 11:33:14 +05302116 }
2117 return phydev;
2118}
2119
2120static int lan78xx_phy_init(struct lan78xx_net *dev)
2121{
2122 int ret;
2123 u32 mii_adv;
2124 struct phy_device *phydev;
2125
2126 switch (dev->chipid) {
2127 case ID_REV_CHIP_ID_7801_:
2128 phydev = lan7801_phy_init(dev);
2129 if (!phydev) {
2130 netdev_err(dev->net, "lan7801: PHY Init Failed");
2131 return -EIO;
2132 }
2133 break;
2134
2135 case ID_REV_CHIP_ID_7800_:
2136 case ID_REV_CHIP_ID_7850_:
2137 phydev = phy_find_first(dev->mdiobus);
2138 if (!phydev) {
2139 netdev_err(dev->net, "no PHY found\n");
2140 return -EIO;
2141 }
2142 phydev->is_internal = true;
2143 dev->interface = PHY_INTERFACE_MODE_GMII;
2144 break;
2145
2146 default:
2147 netdev_err(dev->net, "Unknown CHIP ID found\n");
2148 return -EIO;
Woojung Huh02dc1f32016-12-07 20:26:25 +00002149 }
2150
Woojung Huhcc89c322016-11-01 20:02:00 +00002151 /* if phyirq is not set, use polling mode in phylib */
2152 if (dev->domain_data.phyirq > 0)
2153 phydev->irq = dev->domain_data.phyirq;
2154 else
2155 phydev->irq = 0;
2156 netdev_dbg(dev->net, "phydev->irq = %d\n", phydev->irq);
Woojung.Huh@microchip.come4953912016-01-27 22:57:52 +00002157
Woojung Huhf6e3ef32016-11-17 22:10:02 +00002158 /* set to AUTOMDIX */
2159 phydev->mdix = ETH_TP_MDI_AUTO;
2160
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002161 ret = phy_connect_direct(dev->net, phydev,
2162 lan78xx_link_status_change,
Woojung Huh02dc1f32016-12-07 20:26:25 +00002163 dev->interface);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002164 if (ret) {
2165 netdev_err(dev->net, "can't attach PHY to %s\n",
2166 dev->mdiobus->id);
Raghuram Chary J89b36fb2018-04-28 11:33:14 +05302167 if (dev->chipid == ID_REV_CHIP_ID_7801_) {
2168 if (phy_is_pseudo_fixed_link(phydev)) {
2169 fixed_phy_unregister(phydev);
2170 } else {
2171 phy_unregister_fixup_for_uid(PHY_KSZ9031RNX,
2172 0xfffffff0);
2173 phy_unregister_fixup_for_uid(PHY_LAN8835,
2174 0xfffffff0);
2175 }
2176 }
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002177 return -EIO;
2178 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002179
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002180 /* MAC doesn't support 1000T Half */
2181 phydev->supported &= ~SUPPORTED_1000baseT_Half;
Woojung.Huh@microchip.come270b2d2016-02-25 23:33:09 +00002182
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00002183 /* support both flow controls */
2184 dev->fc_request_control = (FLOW_CTRL_RX | FLOW_CTRL_TX);
2185 phydev->advertising &= ~(ADVERTISED_Pause | ADVERTISED_Asym_Pause);
2186 mii_adv = (u32)mii_advertise_flowctrl(dev->fc_request_control);
2187 phydev->advertising |= mii_adv_to_ethtool_adv_t(mii_adv);
2188
Phil Elwell1827b062018-04-19 17:59:39 +01002189 if (phydev->mdio.dev.of_node) {
2190 u32 reg;
2191 int len;
2192
2193 len = of_property_count_elems_of_size(phydev->mdio.dev.of_node,
2194 "microchip,led-modes",
2195 sizeof(u32));
2196 if (len >= 0) {
2197 /* Ensure the appropriate LEDs are enabled */
2198 lan78xx_read_reg(dev, HW_CFG, &reg);
2199 reg &= ~(HW_CFG_LED0_EN_ |
2200 HW_CFG_LED1_EN_ |
2201 HW_CFG_LED2_EN_ |
2202 HW_CFG_LED3_EN_);
2203 reg |= (len > 0) * HW_CFG_LED0_EN_ |
2204 (len > 1) * HW_CFG_LED1_EN_ |
2205 (len > 2) * HW_CFG_LED2_EN_ |
2206 (len > 3) * HW_CFG_LED3_EN_;
2207 lan78xx_write_reg(dev, HW_CFG, reg);
2208 }
2209 }
2210
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002211 genphy_config_aneg(phydev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002212
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00002213 dev->fc_autoneg = phydev->autoneg;
2214
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002215 return 0;
2216}
2217
2218static int lan78xx_set_rx_max_frame_length(struct lan78xx_net *dev, int size)
2219{
2220 int ret = 0;
2221 u32 buf;
2222 bool rxenabled;
2223
2224 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
2225
2226 rxenabled = ((buf & MAC_RX_RXEN_) != 0);
2227
2228 if (rxenabled) {
2229 buf &= ~MAC_RX_RXEN_;
2230 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2231 }
2232
2233 /* add 4 to size for FCS */
2234 buf &= ~MAC_RX_MAX_SIZE_MASK_;
2235 buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT_) & MAC_RX_MAX_SIZE_MASK_);
2236
2237 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2238
2239 if (rxenabled) {
2240 buf |= MAC_RX_RXEN_;
2241 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2242 }
2243
2244 return 0;
2245}
2246
2247static int unlink_urbs(struct lan78xx_net *dev, struct sk_buff_head *q)
2248{
2249 struct sk_buff *skb;
2250 unsigned long flags;
2251 int count = 0;
2252
2253 spin_lock_irqsave(&q->lock, flags);
2254 while (!skb_queue_empty(q)) {
2255 struct skb_data *entry;
2256 struct urb *urb;
2257 int ret;
2258
2259 skb_queue_walk(q, skb) {
2260 entry = (struct skb_data *)skb->cb;
2261 if (entry->state != unlink_start)
2262 goto found;
2263 }
2264 break;
2265found:
2266 entry->state = unlink_start;
2267 urb = entry->urb;
2268
2269 /* Get reference count of the URB to avoid it to be
2270 * freed during usb_unlink_urb, which may trigger
2271 * use-after-free problem inside usb_unlink_urb since
2272 * usb_unlink_urb is always racing with .complete
2273 * handler(include defer_bh).
2274 */
2275 usb_get_urb(urb);
2276 spin_unlock_irqrestore(&q->lock, flags);
2277 /* during some PM-driven resume scenarios,
2278 * these (async) unlinks complete immediately
2279 */
2280 ret = usb_unlink_urb(urb);
2281 if (ret != -EINPROGRESS && ret != 0)
2282 netdev_dbg(dev->net, "unlink urb err, %d\n", ret);
2283 else
2284 count++;
2285 usb_put_urb(urb);
2286 spin_lock_irqsave(&q->lock, flags);
2287 }
2288 spin_unlock_irqrestore(&q->lock, flags);
2289 return count;
2290}
2291
2292static int lan78xx_change_mtu(struct net_device *netdev, int new_mtu)
2293{
2294 struct lan78xx_net *dev = netdev_priv(netdev);
2295 int ll_mtu = new_mtu + netdev->hard_header_len;
2296 int old_hard_mtu = dev->hard_mtu;
2297 int old_rx_urb_size = dev->rx_urb_size;
2298 int ret;
2299
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002300 /* no second zero-length packet read wanted after mtu-sized packets */
2301 if ((ll_mtu % dev->maxpacket) == 0)
2302 return -EDOM;
2303
Dave Stevenson2259b7a2018-06-25 15:07:12 +01002304 ret = lan78xx_set_rx_max_frame_length(dev, new_mtu + VLAN_ETH_HLEN);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002305
2306 netdev->mtu = new_mtu;
2307
2308 dev->hard_mtu = netdev->mtu + netdev->hard_header_len;
2309 if (dev->rx_urb_size == old_hard_mtu) {
2310 dev->rx_urb_size = dev->hard_mtu;
2311 if (dev->rx_urb_size > old_rx_urb_size) {
2312 if (netif_running(dev->net)) {
2313 unlink_urbs(dev, &dev->rxq);
2314 tasklet_schedule(&dev->bh);
2315 }
2316 }
2317 }
2318
2319 return 0;
2320}
2321
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002322static int lan78xx_set_mac_addr(struct net_device *netdev, void *p)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002323{
2324 struct lan78xx_net *dev = netdev_priv(netdev);
2325 struct sockaddr *addr = p;
2326 u32 addr_lo, addr_hi;
2327 int ret;
2328
2329 if (netif_running(netdev))
2330 return -EBUSY;
2331
2332 if (!is_valid_ether_addr(addr->sa_data))
2333 return -EADDRNOTAVAIL;
2334
2335 ether_addr_copy(netdev->dev_addr, addr->sa_data);
2336
2337 addr_lo = netdev->dev_addr[0] |
2338 netdev->dev_addr[1] << 8 |
2339 netdev->dev_addr[2] << 16 |
2340 netdev->dev_addr[3] << 24;
2341 addr_hi = netdev->dev_addr[4] |
2342 netdev->dev_addr[5] << 8;
2343
2344 ret = lan78xx_write_reg(dev, RX_ADDRL, addr_lo);
2345 ret = lan78xx_write_reg(dev, RX_ADDRH, addr_hi);
2346
2347 return 0;
2348}
2349
2350/* Enable or disable Rx checksum offload engine */
2351static int lan78xx_set_features(struct net_device *netdev,
2352 netdev_features_t features)
2353{
2354 struct lan78xx_net *dev = netdev_priv(netdev);
2355 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2356 unsigned long flags;
2357 int ret;
2358
2359 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
2360
2361 if (features & NETIF_F_RXCSUM) {
2362 pdata->rfe_ctl |= RFE_CTL_TCPUDP_COE_ | RFE_CTL_IP_COE_;
2363 pdata->rfe_ctl |= RFE_CTL_ICMP_COE_ | RFE_CTL_IGMP_COE_;
2364 } else {
2365 pdata->rfe_ctl &= ~(RFE_CTL_TCPUDP_COE_ | RFE_CTL_IP_COE_);
2366 pdata->rfe_ctl &= ~(RFE_CTL_ICMP_COE_ | RFE_CTL_IGMP_COE_);
2367 }
2368
Dave Stevensonec21ecf2018-06-25 15:07:14 +01002369 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2370 pdata->rfe_ctl |= RFE_CTL_VLAN_STRIP_;
2371 else
2372 pdata->rfe_ctl &= ~RFE_CTL_VLAN_STRIP_;
2373
Dave Stevenson4a273272018-06-25 15:07:13 +01002374 if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002375 pdata->rfe_ctl |= RFE_CTL_VLAN_FILTER_;
2376 else
2377 pdata->rfe_ctl &= ~RFE_CTL_VLAN_FILTER_;
2378
2379 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
2380
2381 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
2382
2383 return 0;
2384}
2385
2386static void lan78xx_deferred_vlan_write(struct work_struct *param)
2387{
2388 struct lan78xx_priv *pdata =
2389 container_of(param, struct lan78xx_priv, set_vlan);
2390 struct lan78xx_net *dev = pdata->dev;
2391
2392 lan78xx_dataport_write(dev, DP_SEL_RSEL_VLAN_DA_, 0,
2393 DP_SEL_VHF_VLAN_LEN, pdata->vlan_table);
2394}
2395
2396static int lan78xx_vlan_rx_add_vid(struct net_device *netdev,
2397 __be16 proto, u16 vid)
2398{
2399 struct lan78xx_net *dev = netdev_priv(netdev);
2400 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2401 u16 vid_bit_index;
2402 u16 vid_dword_index;
2403
2404 vid_dword_index = (vid >> 5) & 0x7F;
2405 vid_bit_index = vid & 0x1F;
2406
2407 pdata->vlan_table[vid_dword_index] |= (1 << vid_bit_index);
2408
2409 /* defer register writes to a sleepable context */
2410 schedule_work(&pdata->set_vlan);
2411
2412 return 0;
2413}
2414
2415static int lan78xx_vlan_rx_kill_vid(struct net_device *netdev,
2416 __be16 proto, u16 vid)
2417{
2418 struct lan78xx_net *dev = netdev_priv(netdev);
2419 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2420 u16 vid_bit_index;
2421 u16 vid_dword_index;
2422
2423 vid_dword_index = (vid >> 5) & 0x7F;
2424 vid_bit_index = vid & 0x1F;
2425
2426 pdata->vlan_table[vid_dword_index] &= ~(1 << vid_bit_index);
2427
2428 /* defer register writes to a sleepable context */
2429 schedule_work(&pdata->set_vlan);
2430
2431 return 0;
2432}
2433
2434static void lan78xx_init_ltm(struct lan78xx_net *dev)
2435{
2436 int ret;
2437 u32 buf;
2438 u32 regs[6] = { 0 };
2439
2440 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
2441 if (buf & USB_CFG1_LTM_ENABLE_) {
2442 u8 temp[2];
2443 /* Get values from EEPROM first */
2444 if (lan78xx_read_eeprom(dev, 0x3F, 2, temp) == 0) {
2445 if (temp[0] == 24) {
2446 ret = lan78xx_read_raw_eeprom(dev,
2447 temp[1] * 2,
2448 24,
2449 (u8 *)regs);
2450 if (ret < 0)
2451 return;
2452 }
2453 } else if (lan78xx_read_otp(dev, 0x3F, 2, temp) == 0) {
2454 if (temp[0] == 24) {
2455 ret = lan78xx_read_raw_otp(dev,
2456 temp[1] * 2,
2457 24,
2458 (u8 *)regs);
2459 if (ret < 0)
2460 return;
2461 }
2462 }
2463 }
2464
2465 lan78xx_write_reg(dev, LTM_BELT_IDLE0, regs[0]);
2466 lan78xx_write_reg(dev, LTM_BELT_IDLE1, regs[1]);
2467 lan78xx_write_reg(dev, LTM_BELT_ACT0, regs[2]);
2468 lan78xx_write_reg(dev, LTM_BELT_ACT1, regs[3]);
2469 lan78xx_write_reg(dev, LTM_INACTIVE0, regs[4]);
2470 lan78xx_write_reg(dev, LTM_INACTIVE1, regs[5]);
2471}
2472
2473static int lan78xx_reset(struct lan78xx_net *dev)
2474{
2475 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2476 u32 buf;
2477 int ret = 0;
2478 unsigned long timeout;
Raghuram Chary Je69647a2018-03-23 15:48:08 +05302479 u8 sig;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002480
2481 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2482 buf |= HW_CFG_LRST_;
2483 ret = lan78xx_write_reg(dev, HW_CFG, buf);
2484
2485 timeout = jiffies + HZ;
2486 do {
2487 mdelay(1);
2488 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2489 if (time_after(jiffies, timeout)) {
2490 netdev_warn(dev->net,
2491 "timeout on completion of LiteReset");
2492 return -EIO;
2493 }
2494 } while (buf & HW_CFG_LRST_);
2495
2496 lan78xx_init_mac_address(dev);
2497
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002498 /* save DEVID for later usage */
2499 ret = lan78xx_read_reg(dev, ID_REV, &buf);
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +00002500 dev->chipid = (buf & ID_REV_CHIP_ID_MASK_) >> 16;
2501 dev->chiprev = buf & ID_REV_CHIP_REV_MASK_;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002502
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002503 /* Respond to the IN token with a NAK */
2504 ret = lan78xx_read_reg(dev, USB_CFG0, &buf);
2505 buf |= USB_CFG_BIR_;
2506 ret = lan78xx_write_reg(dev, USB_CFG0, buf);
2507
2508 /* Init LTM */
2509 lan78xx_init_ltm(dev);
2510
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002511 if (dev->udev->speed == USB_SPEED_SUPER) {
2512 buf = DEFAULT_BURST_CAP_SIZE / SS_USB_PKT_SIZE;
2513 dev->rx_urb_size = DEFAULT_BURST_CAP_SIZE;
2514 dev->rx_qlen = 4;
2515 dev->tx_qlen = 4;
2516 } else if (dev->udev->speed == USB_SPEED_HIGH) {
2517 buf = DEFAULT_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
2518 dev->rx_urb_size = DEFAULT_BURST_CAP_SIZE;
2519 dev->rx_qlen = RX_MAX_QUEUE_MEMORY / dev->rx_urb_size;
2520 dev->tx_qlen = RX_MAX_QUEUE_MEMORY / dev->hard_mtu;
2521 } else {
2522 buf = DEFAULT_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
2523 dev->rx_urb_size = DEFAULT_BURST_CAP_SIZE;
2524 dev->rx_qlen = 4;
Yuiko Oshinoa5b13792018-01-15 13:24:28 -05002525 dev->tx_qlen = 4;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002526 }
2527
2528 ret = lan78xx_write_reg(dev, BURST_CAP, buf);
2529 ret = lan78xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
2530
2531 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2532 buf |= HW_CFG_MEF_;
2533 ret = lan78xx_write_reg(dev, HW_CFG, buf);
2534
2535 ret = lan78xx_read_reg(dev, USB_CFG0, &buf);
2536 buf |= USB_CFG_BCE_;
2537 ret = lan78xx_write_reg(dev, USB_CFG0, buf);
2538
2539 /* set FIFO sizes */
2540 buf = (MAX_RX_FIFO_SIZE - 512) / 512;
2541 ret = lan78xx_write_reg(dev, FCT_RX_FIFO_END, buf);
2542
2543 buf = (MAX_TX_FIFO_SIZE - 512) / 512;
2544 ret = lan78xx_write_reg(dev, FCT_TX_FIFO_END, buf);
2545
2546 ret = lan78xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
2547 ret = lan78xx_write_reg(dev, FLOW, 0);
2548 ret = lan78xx_write_reg(dev, FCT_FLOW, 0);
2549
2550 /* Don't need rfe_ctl_lock during initialisation */
2551 ret = lan78xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
2552 pdata->rfe_ctl |= RFE_CTL_BCAST_EN_ | RFE_CTL_DA_PERFECT_;
2553 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
2554
2555 /* Enable or disable checksum offload engines */
2556 lan78xx_set_features(dev->net, dev->net->features);
2557
2558 lan78xx_set_multicast(dev->net);
2559
2560 /* reset PHY */
2561 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
2562 buf |= PMT_CTL_PHY_RST_;
2563 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
2564
2565 timeout = jiffies + HZ;
2566 do {
2567 mdelay(1);
2568 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
2569 if (time_after(jiffies, timeout)) {
2570 netdev_warn(dev->net, "timeout waiting for PHY Reset");
2571 return -EIO;
2572 }
Woojung.Huh@microchip.com6c595b02015-09-16 23:40:39 +00002573 } while ((buf & PMT_CTL_PHY_RST_) || !(buf & PMT_CTL_READY_));
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002574
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002575 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
Woojung Huh02dc1f32016-12-07 20:26:25 +00002576 /* LAN7801 only has RGMII mode */
2577 if (dev->chipid == ID_REV_CHIP_ID_7801_)
2578 buf &= ~MAC_CR_GMII_EN_;
Raghuram Chary Je69647a2018-03-23 15:48:08 +05302579
2580 if (dev->chipid == ID_REV_CHIP_ID_7800_) {
2581 ret = lan78xx_read_raw_eeprom(dev, 0, 1, &sig);
2582 if (!ret && sig != EEPROM_INDICATOR) {
2583 /* Implies there is no external eeprom. Set mac speed */
2584 netdev_info(dev->net, "No External EEPROM. Setting MAC Speed\n");
2585 buf |= MAC_CR_AUTO_DUPLEX_ | MAC_CR_AUTO_SPEED_;
2586 }
2587 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002588 ret = lan78xx_write_reg(dev, MAC_CR, buf);
2589
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002590 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
2591 buf |= MAC_TX_TXEN_;
2592 ret = lan78xx_write_reg(dev, MAC_TX, buf);
2593
2594 ret = lan78xx_read_reg(dev, FCT_TX_CTL, &buf);
2595 buf |= FCT_TX_CTL_EN_;
2596 ret = lan78xx_write_reg(dev, FCT_TX_CTL, buf);
2597
Dave Stevenson2259b7a2018-06-25 15:07:12 +01002598 ret = lan78xx_set_rx_max_frame_length(dev,
2599 dev->net->mtu + VLAN_ETH_HLEN);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002600
2601 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
2602 buf |= MAC_RX_RXEN_;
2603 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2604
2605 ret = lan78xx_read_reg(dev, FCT_RX_CTL, &buf);
2606 buf |= FCT_RX_CTL_EN_;
2607 ret = lan78xx_write_reg(dev, FCT_RX_CTL, buf);
2608
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002609 return 0;
2610}
2611
Woojung Huh20ff5562016-03-16 22:10:40 +00002612static void lan78xx_init_stats(struct lan78xx_net *dev)
2613{
2614 u32 *p;
2615 int i;
2616
2617 /* initialize for stats update
2618 * some counters are 20bits and some are 32bits
2619 */
2620 p = (u32 *)&dev->stats.rollover_max;
2621 for (i = 0; i < (sizeof(dev->stats.rollover_max) / (sizeof(u32))); i++)
2622 p[i] = 0xFFFFF;
2623
2624 dev->stats.rollover_max.rx_unicast_byte_count = 0xFFFFFFFF;
2625 dev->stats.rollover_max.rx_broadcast_byte_count = 0xFFFFFFFF;
2626 dev->stats.rollover_max.rx_multicast_byte_count = 0xFFFFFFFF;
2627 dev->stats.rollover_max.eee_rx_lpi_transitions = 0xFFFFFFFF;
2628 dev->stats.rollover_max.eee_rx_lpi_time = 0xFFFFFFFF;
2629 dev->stats.rollover_max.tx_unicast_byte_count = 0xFFFFFFFF;
2630 dev->stats.rollover_max.tx_broadcast_byte_count = 0xFFFFFFFF;
2631 dev->stats.rollover_max.tx_multicast_byte_count = 0xFFFFFFFF;
2632 dev->stats.rollover_max.eee_tx_lpi_transitions = 0xFFFFFFFF;
2633 dev->stats.rollover_max.eee_tx_lpi_time = 0xFFFFFFFF;
2634
Phil Elwellfed56072018-04-11 12:02:47 +01002635 set_bit(EVENT_STAT_UPDATE, &dev->flags);
Woojung Huh20ff5562016-03-16 22:10:40 +00002636}
2637
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002638static int lan78xx_open(struct net_device *net)
2639{
2640 struct lan78xx_net *dev = netdev_priv(net);
2641 int ret;
2642
2643 ret = usb_autopm_get_interface(dev->intf);
2644 if (ret < 0)
2645 goto out;
2646
Alexander Graf92571a12018-04-04 00:19:35 +02002647 phy_start(net->phydev);
2648
2649 netif_dbg(dev, ifup, dev->net, "phy initialised successfully");
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002650
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002651 /* for Link Check */
2652 if (dev->urb_intr) {
2653 ret = usb_submit_urb(dev->urb_intr, GFP_KERNEL);
2654 if (ret < 0) {
2655 netif_err(dev, ifup, dev->net,
2656 "intr submit %d\n", ret);
2657 goto done;
2658 }
2659 }
2660
Woojung Huh20ff5562016-03-16 22:10:40 +00002661 lan78xx_init_stats(dev);
2662
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002663 set_bit(EVENT_DEV_OPEN, &dev->flags);
2664
2665 netif_start_queue(net);
2666
2667 dev->link_on = false;
2668
2669 lan78xx_defer_kevent(dev, EVENT_LINK_RESET);
2670done:
2671 usb_autopm_put_interface(dev->intf);
2672
2673out:
2674 return ret;
2675}
2676
2677static void lan78xx_terminate_urbs(struct lan78xx_net *dev)
2678{
2679 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(unlink_wakeup);
2680 DECLARE_WAITQUEUE(wait, current);
2681 int temp;
2682
2683 /* ensure there are no more active urbs */
2684 add_wait_queue(&unlink_wakeup, &wait);
2685 set_current_state(TASK_UNINTERRUPTIBLE);
2686 dev->wait = &unlink_wakeup;
2687 temp = unlink_urbs(dev, &dev->txq) + unlink_urbs(dev, &dev->rxq);
2688
2689 /* maybe wait for deletions to finish. */
2690 while (!skb_queue_empty(&dev->rxq) &&
2691 !skb_queue_empty(&dev->txq) &&
2692 !skb_queue_empty(&dev->done)) {
2693 schedule_timeout(msecs_to_jiffies(UNLINK_TIMEOUT_MS));
2694 set_current_state(TASK_UNINTERRUPTIBLE);
2695 netif_dbg(dev, ifdown, dev->net,
2696 "waited for %d urb completions\n", temp);
2697 }
2698 set_current_state(TASK_RUNNING);
2699 dev->wait = NULL;
2700 remove_wait_queue(&unlink_wakeup, &wait);
2701}
2702
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002703static int lan78xx_stop(struct net_device *net)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002704{
2705 struct lan78xx_net *dev = netdev_priv(net);
2706
Woojung Huh20ff5562016-03-16 22:10:40 +00002707 if (timer_pending(&dev->stat_monitor))
2708 del_timer_sync(&dev->stat_monitor);
2709
Alexander Graf92571a12018-04-04 00:19:35 +02002710 if (net->phydev)
2711 phy_stop(net->phydev);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002712
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002713 clear_bit(EVENT_DEV_OPEN, &dev->flags);
2714 netif_stop_queue(net);
2715
2716 netif_info(dev, ifdown, dev->net,
2717 "stop stats: rx/tx %lu/%lu, errs %lu/%lu\n",
2718 net->stats.rx_packets, net->stats.tx_packets,
2719 net->stats.rx_errors, net->stats.tx_errors);
2720
2721 lan78xx_terminate_urbs(dev);
2722
2723 usb_kill_urb(dev->urb_intr);
2724
2725 skb_queue_purge(&dev->rxq_pause);
2726
2727 /* deferred work (task, timer, softirq) must also stop.
2728 * can't flush_scheduled_work() until we drop rtnl (later),
2729 * else workers could deadlock; so make workers a NOP.
2730 */
2731 dev->flags = 0;
2732 cancel_delayed_work_sync(&dev->wq);
2733 tasklet_kill(&dev->bh);
2734
2735 usb_autopm_put_interface(dev->intf);
2736
2737 return 0;
2738}
2739
2740static int lan78xx_linearize(struct sk_buff *skb)
2741{
2742 return skb_linearize(skb);
2743}
2744
2745static struct sk_buff *lan78xx_tx_prep(struct lan78xx_net *dev,
2746 struct sk_buff *skb, gfp_t flags)
2747{
2748 u32 tx_cmd_a, tx_cmd_b;
2749
Eric Dumazetd4ca7352017-04-19 09:59:24 -07002750 if (skb_cow_head(skb, TX_OVERHEAD)) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002751 dev_kfree_skb_any(skb);
Eric Dumazetd4ca7352017-04-19 09:59:24 -07002752 return NULL;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002753 }
2754
2755 if (lan78xx_linearize(skb) < 0)
2756 return NULL;
2757
2758 tx_cmd_a = (u32)(skb->len & TX_CMD_A_LEN_MASK_) | TX_CMD_A_FCS_;
2759
2760 if (skb->ip_summed == CHECKSUM_PARTIAL)
2761 tx_cmd_a |= TX_CMD_A_IPE_ | TX_CMD_A_TPE_;
2762
2763 tx_cmd_b = 0;
2764 if (skb_is_gso(skb)) {
2765 u16 mss = max(skb_shinfo(skb)->gso_size, TX_CMD_B_MSS_MIN_);
2766
2767 tx_cmd_b = (mss << TX_CMD_B_MSS_SHIFT_) & TX_CMD_B_MSS_MASK_;
2768
2769 tx_cmd_a |= TX_CMD_A_LSO_;
2770 }
2771
2772 if (skb_vlan_tag_present(skb)) {
2773 tx_cmd_a |= TX_CMD_A_IVTG_;
2774 tx_cmd_b |= skb_vlan_tag_get(skb) & TX_CMD_B_VTAG_MASK_;
2775 }
2776
2777 skb_push(skb, 4);
2778 cpu_to_le32s(&tx_cmd_b);
2779 memcpy(skb->data, &tx_cmd_b, 4);
2780
2781 skb_push(skb, 4);
2782 cpu_to_le32s(&tx_cmd_a);
2783 memcpy(skb->data, &tx_cmd_a, 4);
2784
2785 return skb;
2786}
2787
2788static enum skb_state defer_bh(struct lan78xx_net *dev, struct sk_buff *skb,
2789 struct sk_buff_head *list, enum skb_state state)
2790{
2791 unsigned long flags;
2792 enum skb_state old_state;
2793 struct skb_data *entry = (struct skb_data *)skb->cb;
2794
2795 spin_lock_irqsave(&list->lock, flags);
2796 old_state = entry->state;
2797 entry->state = state;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002798
2799 __skb_unlink(skb, list);
2800 spin_unlock(&list->lock);
2801 spin_lock(&dev->done.lock);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002802
2803 __skb_queue_tail(&dev->done, skb);
2804 if (skb_queue_len(&dev->done) == 1)
2805 tasklet_schedule(&dev->bh);
2806 spin_unlock_irqrestore(&dev->done.lock, flags);
2807
2808 return old_state;
2809}
2810
2811static void tx_complete(struct urb *urb)
2812{
2813 struct sk_buff *skb = (struct sk_buff *)urb->context;
2814 struct skb_data *entry = (struct skb_data *)skb->cb;
2815 struct lan78xx_net *dev = entry->dev;
2816
2817 if (urb->status == 0) {
Woojung Huh74d79a22016-04-25 22:22:32 +00002818 dev->net->stats.tx_packets += entry->num_of_packet;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002819 dev->net->stats.tx_bytes += entry->length;
2820 } else {
2821 dev->net->stats.tx_errors++;
2822
2823 switch (urb->status) {
2824 case -EPIPE:
2825 lan78xx_defer_kevent(dev, EVENT_TX_HALT);
2826 break;
2827
2828 /* software-driven interface shutdown */
2829 case -ECONNRESET:
2830 case -ESHUTDOWN:
2831 break;
2832
2833 case -EPROTO:
2834 case -ETIME:
2835 case -EILSEQ:
2836 netif_stop_queue(dev->net);
2837 break;
2838 default:
2839 netif_dbg(dev, tx_err, dev->net,
2840 "tx err %d\n", entry->urb->status);
2841 break;
2842 }
2843 }
2844
2845 usb_autopm_put_interface_async(dev->intf);
2846
Woojung.Huh@microchip.com81c38e82015-08-11 15:21:41 +00002847 defer_bh(dev, skb, &dev->txq, tx_done);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002848}
2849
2850static void lan78xx_queue_skb(struct sk_buff_head *list,
2851 struct sk_buff *newsk, enum skb_state state)
2852{
2853 struct skb_data *entry = (struct skb_data *)newsk->cb;
2854
2855 __skb_queue_tail(list, newsk);
2856 entry->state = state;
2857}
2858
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002859static netdev_tx_t
2860lan78xx_start_xmit(struct sk_buff *skb, struct net_device *net)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002861{
2862 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.com81c38e82015-08-11 15:21:41 +00002863 struct sk_buff *skb2 = NULL;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002864
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002865 if (skb) {
Woojung.Huh@microchip.com81c38e82015-08-11 15:21:41 +00002866 skb_tx_timestamp(skb);
2867 skb2 = lan78xx_tx_prep(dev, skb, GFP_ATOMIC);
2868 }
2869
2870 if (skb2) {
2871 skb_queue_tail(&dev->txq_pend, skb2);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002872
Woojung.Huh@microchip.com4b2a4a92016-01-27 22:57:54 +00002873 /* throttle TX patch at slower than SUPER SPEED USB */
2874 if ((dev->udev->speed < USB_SPEED_SUPER) &&
2875 (skb_queue_len(&dev->txq_pend) > 10))
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002876 netif_stop_queue(net);
2877 } else {
2878 netif_dbg(dev, tx_err, dev->net,
2879 "lan78xx_tx_prep return NULL\n");
2880 dev->net->stats.tx_errors++;
2881 dev->net->stats.tx_dropped++;
2882 }
2883
2884 tasklet_schedule(&dev->bh);
2885
2886 return NETDEV_TX_OK;
2887}
2888
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002889static int
2890lan78xx_get_endpoints(struct lan78xx_net *dev, struct usb_interface *intf)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002891{
2892 int tmp;
2893 struct usb_host_interface *alt = NULL;
2894 struct usb_host_endpoint *in = NULL, *out = NULL;
2895 struct usb_host_endpoint *status = NULL;
2896
2897 for (tmp = 0; tmp < intf->num_altsetting; tmp++) {
2898 unsigned ep;
2899
2900 in = NULL;
2901 out = NULL;
2902 status = NULL;
2903 alt = intf->altsetting + tmp;
2904
2905 for (ep = 0; ep < alt->desc.bNumEndpoints; ep++) {
2906 struct usb_host_endpoint *e;
2907 int intr = 0;
2908
2909 e = alt->endpoint + ep;
2910 switch (e->desc.bmAttributes) {
2911 case USB_ENDPOINT_XFER_INT:
2912 if (!usb_endpoint_dir_in(&e->desc))
2913 continue;
2914 intr = 1;
2915 /* FALLTHROUGH */
2916 case USB_ENDPOINT_XFER_BULK:
2917 break;
2918 default:
2919 continue;
2920 }
2921 if (usb_endpoint_dir_in(&e->desc)) {
2922 if (!intr && !in)
2923 in = e;
2924 else if (intr && !status)
2925 status = e;
2926 } else {
2927 if (!out)
2928 out = e;
2929 }
2930 }
2931 if (in && out)
2932 break;
2933 }
2934 if (!alt || !in || !out)
2935 return -EINVAL;
2936
2937 dev->pipe_in = usb_rcvbulkpipe(dev->udev,
2938 in->desc.bEndpointAddress &
2939 USB_ENDPOINT_NUMBER_MASK);
2940 dev->pipe_out = usb_sndbulkpipe(dev->udev,
2941 out->desc.bEndpointAddress &
2942 USB_ENDPOINT_NUMBER_MASK);
2943 dev->ep_intr = status;
2944
2945 return 0;
2946}
2947
2948static int lan78xx_bind(struct lan78xx_net *dev, struct usb_interface *intf)
2949{
2950 struct lan78xx_priv *pdata = NULL;
2951 int ret;
2952 int i;
2953
2954 ret = lan78xx_get_endpoints(dev, intf);
2955
2956 dev->data[0] = (unsigned long)kzalloc(sizeof(*pdata), GFP_KERNEL);
2957
2958 pdata = (struct lan78xx_priv *)(dev->data[0]);
2959 if (!pdata) {
2960 netdev_warn(dev->net, "Unable to allocate lan78xx_priv");
2961 return -ENOMEM;
2962 }
2963
2964 pdata->dev = dev;
2965
2966 spin_lock_init(&pdata->rfe_ctl_lock);
2967 mutex_init(&pdata->dataport_mutex);
2968
2969 INIT_WORK(&pdata->set_multicast, lan78xx_deferred_multicast_write);
2970
2971 for (i = 0; i < DP_SEL_VHF_VLAN_LEN; i++)
2972 pdata->vlan_table[i] = 0;
2973
2974 INIT_WORK(&pdata->set_vlan, lan78xx_deferred_vlan_write);
2975
2976 dev->net->features = 0;
2977
2978 if (DEFAULT_TX_CSUM_ENABLE)
2979 dev->net->features |= NETIF_F_HW_CSUM;
2980
2981 if (DEFAULT_RX_CSUM_ENABLE)
2982 dev->net->features |= NETIF_F_RXCSUM;
2983
2984 if (DEFAULT_TSO_CSUM_ENABLE)
2985 dev->net->features |= NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_SG;
2986
Dave Stevensonec21ecf2018-06-25 15:07:14 +01002987 if (DEFAULT_VLAN_RX_OFFLOAD)
2988 dev->net->features |= NETIF_F_HW_VLAN_CTAG_RX;
2989
Dave Stevenson4a273272018-06-25 15:07:13 +01002990 if (DEFAULT_VLAN_FILTER_ENABLE)
2991 dev->net->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
2992
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002993 dev->net->hw_features = dev->net->features;
2994
Woojung Huhcc89c322016-11-01 20:02:00 +00002995 ret = lan78xx_setup_irq_domain(dev);
2996 if (ret < 0) {
2997 netdev_warn(dev->net,
2998 "lan78xx_setup_irq_domain() failed : %d", ret);
Raghuram Chary J2d2d99e2018-03-27 14:51:16 +05302999 goto out1;
Woojung Huhcc89c322016-11-01 20:02:00 +00003000 }
3001
Nisar Sayed0573f942017-08-01 10:24:33 +00003002 dev->net->hard_header_len += TX_OVERHEAD;
3003 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
3004
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003005 /* Init all registers */
3006 ret = lan78xx_reset(dev);
Raghuram Chary J2d2d99e2018-03-27 14:51:16 +05303007 if (ret) {
3008 netdev_warn(dev->net, "Registers INIT FAILED....");
3009 goto out2;
3010 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003011
Nisar Sayedfb52c3b2017-08-01 10:24:17 +00003012 ret = lan78xx_mdio_init(dev);
Raghuram Chary J2d2d99e2018-03-27 14:51:16 +05303013 if (ret) {
3014 netdev_warn(dev->net, "MDIO INIT FAILED.....");
3015 goto out2;
3016 }
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00003017
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003018 dev->net->flags |= IFF_MULTICAST;
3019
3020 pdata->wol = WAKE_MAGIC;
3021
Nisar Sayedfb52c3b2017-08-01 10:24:17 +00003022 return ret;
Raghuram Chary J2d2d99e2018-03-27 14:51:16 +05303023
3024out2:
3025 lan78xx_remove_irq_domain(dev);
3026
3027out1:
3028 netdev_warn(dev->net, "Bind routine FAILED");
3029 cancel_work_sync(&pdata->set_multicast);
3030 cancel_work_sync(&pdata->set_vlan);
3031 kfree(pdata);
3032 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003033}
3034
3035static void lan78xx_unbind(struct lan78xx_net *dev, struct usb_interface *intf)
3036{
3037 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
3038
Woojung Huhcc89c322016-11-01 20:02:00 +00003039 lan78xx_remove_irq_domain(dev);
3040
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00003041 lan78xx_remove_mdio(dev);
3042
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003043 if (pdata) {
Raghuram Chary J2d2d99e2018-03-27 14:51:16 +05303044 cancel_work_sync(&pdata->set_multicast);
3045 cancel_work_sync(&pdata->set_vlan);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003046 netif_dbg(dev, ifdown, dev->net, "free pdata");
3047 kfree(pdata);
3048 pdata = NULL;
3049 dev->data[0] = 0;
3050 }
3051}
3052
3053static void lan78xx_rx_csum_offload(struct lan78xx_net *dev,
3054 struct sk_buff *skb,
3055 u32 rx_cmd_a, u32 rx_cmd_b)
3056{
Dave Stevenson9343ac82018-06-25 15:07:15 +01003057 /* HW Checksum offload appears to be flawed if used when not stripping
3058 * VLAN headers. Drop back to S/W checksums under these conditions.
3059 */
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003060 if (!(dev->net->features & NETIF_F_RXCSUM) ||
Dave Stevenson9343ac82018-06-25 15:07:15 +01003061 unlikely(rx_cmd_a & RX_CMD_A_ICSM_) ||
3062 ((rx_cmd_a & RX_CMD_A_FVTG_) &&
3063 !(dev->net->features & NETIF_F_HW_VLAN_CTAG_RX))) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003064 skb->ip_summed = CHECKSUM_NONE;
3065 } else {
3066 skb->csum = ntohs((u16)(rx_cmd_b >> RX_CMD_B_CSUM_SHIFT_));
3067 skb->ip_summed = CHECKSUM_COMPLETE;
3068 }
3069}
3070
Dave Stevensonec21ecf2018-06-25 15:07:14 +01003071static void lan78xx_rx_vlan_offload(struct lan78xx_net *dev,
3072 struct sk_buff *skb,
3073 u32 rx_cmd_a, u32 rx_cmd_b)
3074{
3075 if ((dev->net->features & NETIF_F_HW_VLAN_CTAG_RX) &&
3076 (rx_cmd_a & RX_CMD_A_FVTG_))
3077 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
3078 (rx_cmd_b & 0xffff));
3079}
3080
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08003081static void lan78xx_skb_return(struct lan78xx_net *dev, struct sk_buff *skb)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003082{
3083 int status;
3084
3085 if (test_bit(EVENT_RX_PAUSED, &dev->flags)) {
3086 skb_queue_tail(&dev->rxq_pause, skb);
3087 return;
3088 }
3089
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003090 dev->net->stats.rx_packets++;
3091 dev->net->stats.rx_bytes += skb->len;
3092
Woojung Huh74d79a22016-04-25 22:22:32 +00003093 skb->protocol = eth_type_trans(skb, dev->net);
3094
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003095 netif_dbg(dev, rx_status, dev->net, "< rx, len %zu, type 0x%x\n",
3096 skb->len + sizeof(struct ethhdr), skb->protocol);
3097 memset(skb->cb, 0, sizeof(struct skb_data));
3098
3099 if (skb_defer_rx_timestamp(skb))
3100 return;
3101
3102 status = netif_rx(skb);
3103 if (status != NET_RX_SUCCESS)
3104 netif_dbg(dev, rx_err, dev->net,
3105 "netif_rx status %d\n", status);
3106}
3107
3108static int lan78xx_rx(struct lan78xx_net *dev, struct sk_buff *skb)
3109{
3110 if (skb->len < dev->net->hard_header_len)
3111 return 0;
3112
3113 while (skb->len > 0) {
3114 u32 rx_cmd_a, rx_cmd_b, align_count, size;
3115 u16 rx_cmd_c;
3116 struct sk_buff *skb2;
3117 unsigned char *packet;
3118
3119 memcpy(&rx_cmd_a, skb->data, sizeof(rx_cmd_a));
3120 le32_to_cpus(&rx_cmd_a);
3121 skb_pull(skb, sizeof(rx_cmd_a));
3122
3123 memcpy(&rx_cmd_b, skb->data, sizeof(rx_cmd_b));
3124 le32_to_cpus(&rx_cmd_b);
3125 skb_pull(skb, sizeof(rx_cmd_b));
3126
3127 memcpy(&rx_cmd_c, skb->data, sizeof(rx_cmd_c));
3128 le16_to_cpus(&rx_cmd_c);
3129 skb_pull(skb, sizeof(rx_cmd_c));
3130
3131 packet = skb->data;
3132
3133 /* get the packet length */
3134 size = (rx_cmd_a & RX_CMD_A_LEN_MASK_);
3135 align_count = (4 - ((size + RXW_PADDING) % 4)) % 4;
3136
3137 if (unlikely(rx_cmd_a & RX_CMD_A_RED_)) {
3138 netif_dbg(dev, rx_err, dev->net,
3139 "Error rx_cmd_a=0x%08x", rx_cmd_a);
3140 } else {
3141 /* last frame in this batch */
3142 if (skb->len == size) {
3143 lan78xx_rx_csum_offload(dev, skb,
3144 rx_cmd_a, rx_cmd_b);
Dave Stevensonec21ecf2018-06-25 15:07:14 +01003145 lan78xx_rx_vlan_offload(dev, skb,
3146 rx_cmd_a, rx_cmd_b);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003147
3148 skb_trim(skb, skb->len - 4); /* remove fcs */
3149 skb->truesize = size + sizeof(struct sk_buff);
3150
3151 return 1;
3152 }
3153
3154 skb2 = skb_clone(skb, GFP_ATOMIC);
3155 if (unlikely(!skb2)) {
3156 netdev_warn(dev->net, "Error allocating skb");
3157 return 0;
3158 }
3159
3160 skb2->len = size;
3161 skb2->data = packet;
3162 skb_set_tail_pointer(skb2, size);
3163
3164 lan78xx_rx_csum_offload(dev, skb2, rx_cmd_a, rx_cmd_b);
Dave Stevensonec21ecf2018-06-25 15:07:14 +01003165 lan78xx_rx_vlan_offload(dev, skb2, rx_cmd_a, rx_cmd_b);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003166
3167 skb_trim(skb2, skb2->len - 4); /* remove fcs */
3168 skb2->truesize = size + sizeof(struct sk_buff);
3169
3170 lan78xx_skb_return(dev, skb2);
3171 }
3172
3173 skb_pull(skb, size);
3174
3175 /* padding bytes before the next frame starts */
3176 if (skb->len)
3177 skb_pull(skb, align_count);
3178 }
3179
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003180 return 1;
3181}
3182
3183static inline void rx_process(struct lan78xx_net *dev, struct sk_buff *skb)
3184{
3185 if (!lan78xx_rx(dev, skb)) {
3186 dev->net->stats.rx_errors++;
3187 goto done;
3188 }
3189
3190 if (skb->len) {
3191 lan78xx_skb_return(dev, skb);
3192 return;
3193 }
3194
3195 netif_dbg(dev, rx_err, dev->net, "drop\n");
3196 dev->net->stats.rx_errors++;
3197done:
3198 skb_queue_tail(&dev->done, skb);
3199}
3200
3201static void rx_complete(struct urb *urb);
3202
3203static int rx_submit(struct lan78xx_net *dev, struct urb *urb, gfp_t flags)
3204{
3205 struct sk_buff *skb;
3206 struct skb_data *entry;
3207 unsigned long lockflags;
3208 size_t size = dev->rx_urb_size;
3209 int ret = 0;
3210
3211 skb = netdev_alloc_skb_ip_align(dev->net, size);
3212 if (!skb) {
3213 usb_free_urb(urb);
3214 return -ENOMEM;
3215 }
3216
3217 entry = (struct skb_data *)skb->cb;
3218 entry->urb = urb;
3219 entry->dev = dev;
3220 entry->length = 0;
3221
3222 usb_fill_bulk_urb(urb, dev->udev, dev->pipe_in,
3223 skb->data, size, rx_complete, skb);
3224
3225 spin_lock_irqsave(&dev->rxq.lock, lockflags);
3226
3227 if (netif_device_present(dev->net) &&
3228 netif_running(dev->net) &&
3229 !test_bit(EVENT_RX_HALT, &dev->flags) &&
3230 !test_bit(EVENT_DEV_ASLEEP, &dev->flags)) {
3231 ret = usb_submit_urb(urb, GFP_ATOMIC);
3232 switch (ret) {
3233 case 0:
3234 lan78xx_queue_skb(&dev->rxq, skb, rx_start);
3235 break;
3236 case -EPIPE:
3237 lan78xx_defer_kevent(dev, EVENT_RX_HALT);
3238 break;
3239 case -ENODEV:
3240 netif_dbg(dev, ifdown, dev->net, "device gone\n");
3241 netif_device_detach(dev->net);
3242 break;
3243 case -EHOSTUNREACH:
3244 ret = -ENOLINK;
3245 break;
3246 default:
3247 netif_dbg(dev, rx_err, dev->net,
3248 "rx submit, %d\n", ret);
3249 tasklet_schedule(&dev->bh);
3250 }
3251 } else {
3252 netif_dbg(dev, ifdown, dev->net, "rx: stopped\n");
3253 ret = -ENOLINK;
3254 }
3255 spin_unlock_irqrestore(&dev->rxq.lock, lockflags);
3256 if (ret) {
3257 dev_kfree_skb_any(skb);
3258 usb_free_urb(urb);
3259 }
3260 return ret;
3261}
3262
3263static void rx_complete(struct urb *urb)
3264{
3265 struct sk_buff *skb = (struct sk_buff *)urb->context;
3266 struct skb_data *entry = (struct skb_data *)skb->cb;
3267 struct lan78xx_net *dev = entry->dev;
3268 int urb_status = urb->status;
3269 enum skb_state state;
3270
3271 skb_put(skb, urb->actual_length);
3272 state = rx_done;
3273 entry->urb = NULL;
3274
3275 switch (urb_status) {
3276 case 0:
3277 if (skb->len < dev->net->hard_header_len) {
3278 state = rx_cleanup;
3279 dev->net->stats.rx_errors++;
3280 dev->net->stats.rx_length_errors++;
3281 netif_dbg(dev, rx_err, dev->net,
3282 "rx length %d\n", skb->len);
3283 }
3284 usb_mark_last_busy(dev->udev);
3285 break;
3286 case -EPIPE:
3287 dev->net->stats.rx_errors++;
3288 lan78xx_defer_kevent(dev, EVENT_RX_HALT);
3289 /* FALLTHROUGH */
3290 case -ECONNRESET: /* async unlink */
3291 case -ESHUTDOWN: /* hardware gone */
3292 netif_dbg(dev, ifdown, dev->net,
3293 "rx shutdown, code %d\n", urb_status);
3294 state = rx_cleanup;
3295 entry->urb = urb;
3296 urb = NULL;
3297 break;
3298 case -EPROTO:
3299 case -ETIME:
3300 case -EILSEQ:
3301 dev->net->stats.rx_errors++;
3302 state = rx_cleanup;
3303 entry->urb = urb;
3304 urb = NULL;
3305 break;
3306
3307 /* data overrun ... flush fifo? */
3308 case -EOVERFLOW:
3309 dev->net->stats.rx_over_errors++;
3310 /* FALLTHROUGH */
3311
3312 default:
3313 state = rx_cleanup;
3314 dev->net->stats.rx_errors++;
3315 netif_dbg(dev, rx_err, dev->net, "rx status %d\n", urb_status);
3316 break;
3317 }
3318
3319 state = defer_bh(dev, skb, &dev->rxq, state);
3320
3321 if (urb) {
3322 if (netif_running(dev->net) &&
3323 !test_bit(EVENT_RX_HALT, &dev->flags) &&
3324 state != unlink_start) {
3325 rx_submit(dev, urb, GFP_ATOMIC);
3326 return;
3327 }
3328 usb_free_urb(urb);
3329 }
3330 netif_dbg(dev, rx_err, dev->net, "no read resubmitted\n");
3331}
3332
3333static void lan78xx_tx_bh(struct lan78xx_net *dev)
3334{
3335 int length;
3336 struct urb *urb = NULL;
3337 struct skb_data *entry;
3338 unsigned long flags;
3339 struct sk_buff_head *tqp = &dev->txq_pend;
3340 struct sk_buff *skb, *skb2;
3341 int ret;
3342 int count, pos;
3343 int skb_totallen, pkt_cnt;
3344
3345 skb_totallen = 0;
3346 pkt_cnt = 0;
Woojung Huh74d79a22016-04-25 22:22:32 +00003347 count = 0;
3348 length = 0;
Stefan Wahrendea39ac2018-07-15 21:53:20 +02003349 spin_lock_irqsave(&tqp->lock, flags);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003350 for (skb = tqp->next; pkt_cnt < tqp->qlen; skb = skb->next) {
3351 if (skb_is_gso(skb)) {
3352 if (pkt_cnt) {
3353 /* handle previous packets first */
3354 break;
3355 }
Woojung Huh74d79a22016-04-25 22:22:32 +00003356 count = 1;
3357 length = skb->len - TX_OVERHEAD;
Stefan Wahrendea39ac2018-07-15 21:53:20 +02003358 __skb_unlink(skb, tqp);
3359 spin_unlock_irqrestore(&tqp->lock, flags);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003360 goto gso_skb;
3361 }
3362
3363 if ((skb_totallen + skb->len) > MAX_SINGLE_PACKET_SIZE)
3364 break;
3365 skb_totallen = skb->len + roundup(skb_totallen, sizeof(u32));
3366 pkt_cnt++;
3367 }
Stefan Wahrendea39ac2018-07-15 21:53:20 +02003368 spin_unlock_irqrestore(&tqp->lock, flags);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003369
3370 /* copy to a single skb */
3371 skb = alloc_skb(skb_totallen, GFP_ATOMIC);
3372 if (!skb)
3373 goto drop;
3374
3375 skb_put(skb, skb_totallen);
3376
3377 for (count = pos = 0; count < pkt_cnt; count++) {
3378 skb2 = skb_dequeue(tqp);
3379 if (skb2) {
Woojung Huh74d79a22016-04-25 22:22:32 +00003380 length += (skb2->len - TX_OVERHEAD);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003381 memcpy(skb->data + pos, skb2->data, skb2->len);
3382 pos += roundup(skb2->len, sizeof(u32));
3383 dev_kfree_skb(skb2);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003384 }
3385 }
3386
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003387gso_skb:
3388 urb = usb_alloc_urb(0, GFP_ATOMIC);
Wolfram Sangd7c4e842016-08-11 23:05:27 +02003389 if (!urb)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003390 goto drop;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003391
3392 entry = (struct skb_data *)skb->cb;
3393 entry->urb = urb;
3394 entry->dev = dev;
3395 entry->length = length;
Woojung Huh74d79a22016-04-25 22:22:32 +00003396 entry->num_of_packet = count;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003397
3398 spin_lock_irqsave(&dev->txq.lock, flags);
3399 ret = usb_autopm_get_interface_async(dev->intf);
3400 if (ret < 0) {
3401 spin_unlock_irqrestore(&dev->txq.lock, flags);
3402 goto drop;
3403 }
3404
3405 usb_fill_bulk_urb(urb, dev->udev, dev->pipe_out,
3406 skb->data, skb->len, tx_complete, skb);
3407
3408 if (length % dev->maxpacket == 0) {
3409 /* send USB_ZERO_PACKET */
3410 urb->transfer_flags |= URB_ZERO_PACKET;
3411 }
3412
3413#ifdef CONFIG_PM
3414 /* if this triggers the device is still a sleep */
3415 if (test_bit(EVENT_DEV_ASLEEP, &dev->flags)) {
3416 /* transmission will be done in resume */
3417 usb_anchor_urb(urb, &dev->deferred);
3418 /* no use to process more packets */
3419 netif_stop_queue(dev->net);
3420 usb_put_urb(urb);
3421 spin_unlock_irqrestore(&dev->txq.lock, flags);
3422 netdev_dbg(dev->net, "Delaying transmission for resumption\n");
3423 return;
3424 }
3425#endif
3426
3427 ret = usb_submit_urb(urb, GFP_ATOMIC);
3428 switch (ret) {
3429 case 0:
Florian Westphal860e9532016-05-03 16:33:13 +02003430 netif_trans_update(dev->net);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003431 lan78xx_queue_skb(&dev->txq, skb, tx_start);
3432 if (skb_queue_len(&dev->txq) >= dev->tx_qlen)
3433 netif_stop_queue(dev->net);
3434 break;
3435 case -EPIPE:
3436 netif_stop_queue(dev->net);
3437 lan78xx_defer_kevent(dev, EVENT_TX_HALT);
3438 usb_autopm_put_interface_async(dev->intf);
3439 break;
3440 default:
3441 usb_autopm_put_interface_async(dev->intf);
3442 netif_dbg(dev, tx_err, dev->net,
3443 "tx: submit urb err %d\n", ret);
3444 break;
3445 }
3446
3447 spin_unlock_irqrestore(&dev->txq.lock, flags);
3448
3449 if (ret) {
3450 netif_dbg(dev, tx_err, dev->net, "drop, code %d\n", ret);
3451drop:
3452 dev->net->stats.tx_dropped++;
3453 if (skb)
3454 dev_kfree_skb_any(skb);
3455 usb_free_urb(urb);
3456 } else
3457 netif_dbg(dev, tx_queued, dev->net,
3458 "> tx, len %d, type 0x%x\n", length, skb->protocol);
3459}
3460
3461static void lan78xx_rx_bh(struct lan78xx_net *dev)
3462{
3463 struct urb *urb;
3464 int i;
3465
3466 if (skb_queue_len(&dev->rxq) < dev->rx_qlen) {
3467 for (i = 0; i < 10; i++) {
3468 if (skb_queue_len(&dev->rxq) >= dev->rx_qlen)
3469 break;
3470 urb = usb_alloc_urb(0, GFP_ATOMIC);
3471 if (urb)
3472 if (rx_submit(dev, urb, GFP_ATOMIC) == -ENOLINK)
3473 return;
3474 }
3475
3476 if (skb_queue_len(&dev->rxq) < dev->rx_qlen)
3477 tasklet_schedule(&dev->bh);
3478 }
3479 if (skb_queue_len(&dev->txq) < dev->tx_qlen)
3480 netif_wake_queue(dev->net);
3481}
3482
3483static void lan78xx_bh(unsigned long param)
3484{
3485 struct lan78xx_net *dev = (struct lan78xx_net *)param;
3486 struct sk_buff *skb;
3487 struct skb_data *entry;
3488
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003489 while ((skb = skb_dequeue(&dev->done))) {
3490 entry = (struct skb_data *)(skb->cb);
3491 switch (entry->state) {
3492 case rx_done:
3493 entry->state = rx_cleanup;
3494 rx_process(dev, skb);
3495 continue;
3496 case tx_done:
3497 usb_free_urb(entry->urb);
3498 dev_kfree_skb(skb);
3499 continue;
3500 case rx_cleanup:
3501 usb_free_urb(entry->urb);
3502 dev_kfree_skb(skb);
3503 continue;
3504 default:
3505 netdev_dbg(dev->net, "skb state %d\n", entry->state);
3506 return;
3507 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003508 }
3509
3510 if (netif_device_present(dev->net) && netif_running(dev->net)) {
Woojung Huh20ff5562016-03-16 22:10:40 +00003511 /* reset update timer delta */
3512 if (timer_pending(&dev->stat_monitor) && (dev->delta != 1)) {
3513 dev->delta = 1;
3514 mod_timer(&dev->stat_monitor,
3515 jiffies + STAT_UPDATE_TIMER);
3516 }
3517
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003518 if (!skb_queue_empty(&dev->txq_pend))
3519 lan78xx_tx_bh(dev);
3520
3521 if (!timer_pending(&dev->delay) &&
3522 !test_bit(EVENT_RX_HALT, &dev->flags))
3523 lan78xx_rx_bh(dev);
3524 }
3525}
3526
3527static void lan78xx_delayedwork(struct work_struct *work)
3528{
3529 int status;
3530 struct lan78xx_net *dev;
3531
3532 dev = container_of(work, struct lan78xx_net, wq.work);
3533
3534 if (test_bit(EVENT_TX_HALT, &dev->flags)) {
3535 unlink_urbs(dev, &dev->txq);
3536 status = usb_autopm_get_interface(dev->intf);
3537 if (status < 0)
3538 goto fail_pipe;
3539 status = usb_clear_halt(dev->udev, dev->pipe_out);
3540 usb_autopm_put_interface(dev->intf);
3541 if (status < 0 &&
3542 status != -EPIPE &&
3543 status != -ESHUTDOWN) {
3544 if (netif_msg_tx_err(dev))
3545fail_pipe:
3546 netdev_err(dev->net,
3547 "can't clear tx halt, status %d\n",
3548 status);
3549 } else {
3550 clear_bit(EVENT_TX_HALT, &dev->flags);
3551 if (status != -ESHUTDOWN)
3552 netif_wake_queue(dev->net);
3553 }
3554 }
3555 if (test_bit(EVENT_RX_HALT, &dev->flags)) {
3556 unlink_urbs(dev, &dev->rxq);
3557 status = usb_autopm_get_interface(dev->intf);
3558 if (status < 0)
3559 goto fail_halt;
3560 status = usb_clear_halt(dev->udev, dev->pipe_in);
3561 usb_autopm_put_interface(dev->intf);
3562 if (status < 0 &&
3563 status != -EPIPE &&
3564 status != -ESHUTDOWN) {
3565 if (netif_msg_rx_err(dev))
3566fail_halt:
3567 netdev_err(dev->net,
3568 "can't clear rx halt, status %d\n",
3569 status);
3570 } else {
3571 clear_bit(EVENT_RX_HALT, &dev->flags);
3572 tasklet_schedule(&dev->bh);
3573 }
3574 }
3575
3576 if (test_bit(EVENT_LINK_RESET, &dev->flags)) {
3577 int ret = 0;
3578
3579 clear_bit(EVENT_LINK_RESET, &dev->flags);
3580 status = usb_autopm_get_interface(dev->intf);
3581 if (status < 0)
3582 goto skip_reset;
3583 if (lan78xx_link_reset(dev) < 0) {
3584 usb_autopm_put_interface(dev->intf);
3585skip_reset:
3586 netdev_info(dev->net, "link reset failed (%d)\n",
3587 ret);
3588 } else {
3589 usb_autopm_put_interface(dev->intf);
3590 }
3591 }
Woojung Huh20ff5562016-03-16 22:10:40 +00003592
3593 if (test_bit(EVENT_STAT_UPDATE, &dev->flags)) {
3594 lan78xx_update_stats(dev);
3595
3596 clear_bit(EVENT_STAT_UPDATE, &dev->flags);
3597
3598 mod_timer(&dev->stat_monitor,
3599 jiffies + (STAT_UPDATE_TIMER * dev->delta));
3600
3601 dev->delta = min((dev->delta * 2), 50);
3602 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003603}
3604
3605static void intr_complete(struct urb *urb)
3606{
3607 struct lan78xx_net *dev = urb->context;
3608 int status = urb->status;
3609
3610 switch (status) {
3611 /* success */
3612 case 0:
3613 lan78xx_status(dev, urb);
3614 break;
3615
3616 /* software-driven interface shutdown */
3617 case -ENOENT: /* urb killed */
3618 case -ESHUTDOWN: /* hardware gone */
3619 netif_dbg(dev, ifdown, dev->net,
3620 "intr shutdown, code %d\n", status);
3621 return;
3622
3623 /* NOTE: not throttling like RX/TX, since this endpoint
3624 * already polls infrequently
3625 */
3626 default:
3627 netdev_dbg(dev->net, "intr status %d\n", status);
3628 break;
3629 }
3630
3631 if (!netif_running(dev->net))
3632 return;
3633
3634 memset(urb->transfer_buffer, 0, urb->transfer_buffer_length);
3635 status = usb_submit_urb(urb, GFP_ATOMIC);
3636 if (status != 0)
3637 netif_err(dev, timer, dev->net,
3638 "intr resubmit --> %d\n", status);
3639}
3640
3641static void lan78xx_disconnect(struct usb_interface *intf)
3642{
3643 struct lan78xx_net *dev;
3644 struct usb_device *udev;
3645 struct net_device *net;
Raghuram Chary J89b36fb2018-04-28 11:33:14 +05303646 struct phy_device *phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003647
3648 dev = usb_get_intfdata(intf);
3649 usb_set_intfdata(intf, NULL);
3650 if (!dev)
3651 return;
3652
3653 udev = interface_to_usbdev(intf);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003654 net = dev->net;
Raghuram Chary J89b36fb2018-04-28 11:33:14 +05303655 phydev = net->phydev;
Alexander Graf92571a12018-04-04 00:19:35 +02003656
3657 phy_unregister_fixup_for_uid(PHY_KSZ9031RNX, 0xfffffff0);
3658 phy_unregister_fixup_for_uid(PHY_LAN8835, 0xfffffff0);
3659
3660 phy_disconnect(net->phydev);
3661
Raghuram Chary J89b36fb2018-04-28 11:33:14 +05303662 if (phy_is_pseudo_fixed_link(phydev))
3663 fixed_phy_unregister(phydev);
3664
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003665 unregister_netdev(net);
3666
3667 cancel_delayed_work_sync(&dev->wq);
3668
3669 usb_scuttle_anchored_urbs(&dev->deferred);
3670
3671 lan78xx_unbind(dev, intf);
3672
3673 usb_kill_urb(dev->urb_intr);
3674 usb_free_urb(dev->urb_intr);
3675
3676 free_netdev(net);
3677 usb_put_dev(udev);
3678}
3679
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08003680static void lan78xx_tx_timeout(struct net_device *net)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003681{
3682 struct lan78xx_net *dev = netdev_priv(net);
3683
3684 unlink_urbs(dev, &dev->txq);
3685 tasklet_schedule(&dev->bh);
3686}
3687
3688static const struct net_device_ops lan78xx_netdev_ops = {
3689 .ndo_open = lan78xx_open,
3690 .ndo_stop = lan78xx_stop,
3691 .ndo_start_xmit = lan78xx_start_xmit,
3692 .ndo_tx_timeout = lan78xx_tx_timeout,
3693 .ndo_change_mtu = lan78xx_change_mtu,
3694 .ndo_set_mac_address = lan78xx_set_mac_addr,
3695 .ndo_validate_addr = eth_validate_addr,
3696 .ndo_do_ioctl = lan78xx_ioctl,
3697 .ndo_set_rx_mode = lan78xx_set_multicast,
3698 .ndo_set_features = lan78xx_set_features,
3699 .ndo_vlan_rx_add_vid = lan78xx_vlan_rx_add_vid,
3700 .ndo_vlan_rx_kill_vid = lan78xx_vlan_rx_kill_vid,
3701};
3702
Kees Cookd28bb962017-10-16 17:29:32 -07003703static void lan78xx_stat_monitor(struct timer_list *t)
Woojung Huh20ff5562016-03-16 22:10:40 +00003704{
Kees Cookd28bb962017-10-16 17:29:32 -07003705 struct lan78xx_net *dev = from_timer(dev, t, stat_monitor);
Woojung Huh20ff5562016-03-16 22:10:40 +00003706
3707 lan78xx_defer_kevent(dev, EVENT_STAT_UPDATE);
3708}
3709
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003710static int lan78xx_probe(struct usb_interface *intf,
3711 const struct usb_device_id *id)
3712{
3713 struct lan78xx_net *dev;
3714 struct net_device *netdev;
3715 struct usb_device *udev;
3716 int ret;
3717 unsigned maxp;
3718 unsigned period;
3719 u8 *buf = NULL;
3720
3721 udev = interface_to_usbdev(intf);
3722 udev = usb_get_dev(udev);
3723
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003724 netdev = alloc_etherdev(sizeof(struct lan78xx_net));
3725 if (!netdev) {
Nisar Sayedfb52c3b2017-08-01 10:24:17 +00003726 dev_err(&intf->dev, "Error: OOM\n");
3727 ret = -ENOMEM;
3728 goto out1;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003729 }
3730
3731 /* netdev_printk() needs this */
3732 SET_NETDEV_DEV(netdev, &intf->dev);
3733
3734 dev = netdev_priv(netdev);
3735 dev->udev = udev;
3736 dev->intf = intf;
3737 dev->net = netdev;
3738 dev->msg_enable = netif_msg_init(msg_level, NETIF_MSG_DRV
3739 | NETIF_MSG_PROBE | NETIF_MSG_LINK);
3740
3741 skb_queue_head_init(&dev->rxq);
3742 skb_queue_head_init(&dev->txq);
3743 skb_queue_head_init(&dev->done);
3744 skb_queue_head_init(&dev->rxq_pause);
3745 skb_queue_head_init(&dev->txq_pend);
3746 mutex_init(&dev->phy_mutex);
3747
3748 tasklet_init(&dev->bh, lan78xx_bh, (unsigned long)dev);
3749 INIT_DELAYED_WORK(&dev->wq, lan78xx_delayedwork);
3750 init_usb_anchor(&dev->deferred);
3751
3752 netdev->netdev_ops = &lan78xx_netdev_ops;
3753 netdev->watchdog_timeo = TX_TIMEOUT_JIFFIES;
3754 netdev->ethtool_ops = &lan78xx_ethtool_ops;
3755
Woojung Huh20ff5562016-03-16 22:10:40 +00003756 dev->delta = 1;
Kees Cookd28bb962017-10-16 17:29:32 -07003757 timer_setup(&dev->stat_monitor, lan78xx_stat_monitor, 0);
Woojung Huh20ff5562016-03-16 22:10:40 +00003758
3759 mutex_init(&dev->stats.access_lock);
3760
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003761 ret = lan78xx_bind(dev, intf);
3762 if (ret < 0)
3763 goto out2;
3764 strcpy(netdev->name, "eth%d");
3765
3766 if (netdev->mtu > (dev->hard_mtu - netdev->hard_header_len))
3767 netdev->mtu = dev->hard_mtu - netdev->hard_header_len;
3768
Jarod Wilsonf77f0ae2016-10-20 13:55:17 -04003769 /* MTU range: 68 - 9000 */
3770 netdev->max_mtu = MAX_SINGLE_PACKET_SIZE;
3771
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003772 dev->ep_blkin = (intf->cur_altsetting)->endpoint + 0;
3773 dev->ep_blkout = (intf->cur_altsetting)->endpoint + 1;
3774 dev->ep_intr = (intf->cur_altsetting)->endpoint + 2;
3775
3776 dev->pipe_in = usb_rcvbulkpipe(udev, BULK_IN_PIPE);
3777 dev->pipe_out = usb_sndbulkpipe(udev, BULK_OUT_PIPE);
3778
3779 dev->pipe_intr = usb_rcvintpipe(dev->udev,
3780 dev->ep_intr->desc.bEndpointAddress &
3781 USB_ENDPOINT_NUMBER_MASK);
3782 period = dev->ep_intr->desc.bInterval;
3783
3784 maxp = usb_maxpacket(dev->udev, dev->pipe_intr, 0);
3785 buf = kmalloc(maxp, GFP_KERNEL);
3786 if (buf) {
3787 dev->urb_intr = usb_alloc_urb(0, GFP_KERNEL);
3788 if (!dev->urb_intr) {
Pan Bian51920832016-12-03 19:24:48 +08003789 ret = -ENOMEM;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003790 kfree(buf);
3791 goto out3;
3792 } else {
3793 usb_fill_int_urb(dev->urb_intr, dev->udev,
3794 dev->pipe_intr, buf, maxp,
3795 intr_complete, dev, period);
3796 }
3797 }
3798
3799 dev->maxpacket = usb_maxpacket(dev->udev, dev->pipe_out, 1);
3800
3801 /* driver requires remote-wakeup capability during autosuspend. */
3802 intf->needs_remote_wakeup = 1;
3803
3804 ret = register_netdev(netdev);
3805 if (ret != 0) {
3806 netif_err(dev, probe, netdev, "couldn't register the device\n");
Nisar Sayedfb52c3b2017-08-01 10:24:17 +00003807 goto out3;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003808 }
3809
3810 usb_set_intfdata(intf, dev);
3811
3812 ret = device_set_wakeup_enable(&udev->dev, true);
3813
3814 /* Default delay of 2sec has more overhead than advantage.
3815 * Set to 10sec as default.
3816 */
3817 pm_runtime_set_autosuspend_delay(&udev->dev,
3818 DEFAULT_AUTOSUSPEND_DELAY);
3819
Alexander Graf92571a12018-04-04 00:19:35 +02003820 ret = lan78xx_phy_init(dev);
3821 if (ret < 0)
3822 goto out4;
3823
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003824 return 0;
3825
Alexander Graf92571a12018-04-04 00:19:35 +02003826out4:
3827 unregister_netdev(netdev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003828out3:
3829 lan78xx_unbind(dev, intf);
3830out2:
3831 free_netdev(netdev);
3832out1:
3833 usb_put_dev(udev);
3834
3835 return ret;
3836}
3837
3838static u16 lan78xx_wakeframe_crc16(const u8 *buf, int len)
3839{
3840 const u16 crc16poly = 0x8005;
3841 int i;
3842 u16 bit, crc, msb;
3843 u8 data;
3844
3845 crc = 0xFFFF;
3846 for (i = 0; i < len; i++) {
3847 data = *buf++;
3848 for (bit = 0; bit < 8; bit++) {
3849 msb = crc >> 15;
3850 crc <<= 1;
3851
3852 if (msb ^ (u16)(data & 1)) {
3853 crc ^= crc16poly;
3854 crc |= (u16)0x0001U;
3855 }
3856 data >>= 1;
3857 }
3858 }
3859
3860 return crc;
3861}
3862
3863static int lan78xx_set_suspend(struct lan78xx_net *dev, u32 wol)
3864{
3865 u32 buf;
3866 int ret;
3867 int mask_index;
3868 u16 crc;
3869 u32 temp_wucsr;
3870 u32 temp_pmt_ctl;
3871 const u8 ipv4_multicast[3] = { 0x01, 0x00, 0x5E };
3872 const u8 ipv6_multicast[3] = { 0x33, 0x33 };
3873 const u8 arp_type[2] = { 0x08, 0x06 };
3874
3875 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
3876 buf &= ~MAC_TX_TXEN_;
3877 ret = lan78xx_write_reg(dev, MAC_TX, buf);
3878 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3879 buf &= ~MAC_RX_RXEN_;
3880 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3881
3882 ret = lan78xx_write_reg(dev, WUCSR, 0);
3883 ret = lan78xx_write_reg(dev, WUCSR2, 0);
3884 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL);
3885
3886 temp_wucsr = 0;
3887
3888 temp_pmt_ctl = 0;
3889 ret = lan78xx_read_reg(dev, PMT_CTL, &temp_pmt_ctl);
3890 temp_pmt_ctl &= ~PMT_CTL_RES_CLR_WKP_EN_;
3891 temp_pmt_ctl |= PMT_CTL_RES_CLR_WKP_STS_;
3892
3893 for (mask_index = 0; mask_index < NUM_OF_WUF_CFG; mask_index++)
3894 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index), 0);
3895
3896 mask_index = 0;
3897 if (wol & WAKE_PHY) {
3898 temp_pmt_ctl |= PMT_CTL_PHY_WAKE_EN_;
3899
3900 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3901 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3902 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3903 }
3904 if (wol & WAKE_MAGIC) {
3905 temp_wucsr |= WUCSR_MPEN_;
3906
3907 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3908 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3909 temp_pmt_ctl |= PMT_CTL_SUS_MODE_3_;
3910 }
3911 if (wol & WAKE_BCAST) {
3912 temp_wucsr |= WUCSR_BCST_EN_;
3913
3914 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3915 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3916 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3917 }
3918 if (wol & WAKE_MCAST) {
3919 temp_wucsr |= WUCSR_WAKE_EN_;
3920
3921 /* set WUF_CFG & WUF_MASK for IPv4 Multicast */
3922 crc = lan78xx_wakeframe_crc16(ipv4_multicast, 3);
3923 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index),
3924 WUF_CFGX_EN_ |
3925 WUF_CFGX_TYPE_MCAST_ |
3926 (0 << WUF_CFGX_OFFSET_SHIFT_) |
3927 (crc & WUF_CFGX_CRC16_MASK_));
3928
3929 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 7);
3930 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0);
3931 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0);
3932 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0);
3933 mask_index++;
3934
3935 /* for IPv6 Multicast */
3936 crc = lan78xx_wakeframe_crc16(ipv6_multicast, 2);
3937 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index),
3938 WUF_CFGX_EN_ |
3939 WUF_CFGX_TYPE_MCAST_ |
3940 (0 << WUF_CFGX_OFFSET_SHIFT_) |
3941 (crc & WUF_CFGX_CRC16_MASK_));
3942
3943 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 3);
3944 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0);
3945 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0);
3946 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0);
3947 mask_index++;
3948
3949 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3950 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3951 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3952 }
3953 if (wol & WAKE_UCAST) {
3954 temp_wucsr |= WUCSR_PFDA_EN_;
3955
3956 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3957 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3958 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3959 }
3960 if (wol & WAKE_ARP) {
3961 temp_wucsr |= WUCSR_WAKE_EN_;
3962
3963 /* set WUF_CFG & WUF_MASK
3964 * for packettype (offset 12,13) = ARP (0x0806)
3965 */
3966 crc = lan78xx_wakeframe_crc16(arp_type, 2);
3967 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index),
3968 WUF_CFGX_EN_ |
3969 WUF_CFGX_TYPE_ALL_ |
3970 (0 << WUF_CFGX_OFFSET_SHIFT_) |
3971 (crc & WUF_CFGX_CRC16_MASK_));
3972
3973 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 0x3000);
3974 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0);
3975 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0);
3976 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0);
3977 mask_index++;
3978
3979 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3980 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3981 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3982 }
3983
3984 ret = lan78xx_write_reg(dev, WUCSR, temp_wucsr);
3985
3986 /* when multiple WOL bits are set */
3987 if (hweight_long((unsigned long)wol) > 1) {
3988 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3989 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3990 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3991 }
3992 ret = lan78xx_write_reg(dev, PMT_CTL, temp_pmt_ctl);
3993
3994 /* clear WUPS */
3995 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
3996 buf |= PMT_CTL_WUPS_MASK_;
3997 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
3998
3999 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
4000 buf |= MAC_RX_RXEN_;
4001 ret = lan78xx_write_reg(dev, MAC_RX, buf);
4002
4003 return 0;
4004}
4005
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08004006static int lan78xx_suspend(struct usb_interface *intf, pm_message_t message)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004007{
4008 struct lan78xx_net *dev = usb_get_intfdata(intf);
4009 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
4010 u32 buf;
4011 int ret;
4012 int event;
4013
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004014 event = message.event;
4015
4016 if (!dev->suspend_count++) {
4017 spin_lock_irq(&dev->txq.lock);
4018 /* don't autosuspend while transmitting */
4019 if ((skb_queue_len(&dev->txq) ||
4020 skb_queue_len(&dev->txq_pend)) &&
4021 PMSG_IS_AUTO(message)) {
4022 spin_unlock_irq(&dev->txq.lock);
4023 ret = -EBUSY;
4024 goto out;
4025 } else {
4026 set_bit(EVENT_DEV_ASLEEP, &dev->flags);
4027 spin_unlock_irq(&dev->txq.lock);
4028 }
4029
4030 /* stop TX & RX */
4031 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
4032 buf &= ~MAC_TX_TXEN_;
4033 ret = lan78xx_write_reg(dev, MAC_TX, buf);
4034 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
4035 buf &= ~MAC_RX_RXEN_;
4036 ret = lan78xx_write_reg(dev, MAC_RX, buf);
4037
4038 /* empty out the rx and queues */
4039 netif_device_detach(dev->net);
4040 lan78xx_terminate_urbs(dev);
4041 usb_kill_urb(dev->urb_intr);
4042
4043 /* reattach */
4044 netif_device_attach(dev->net);
4045 }
4046
4047 if (test_bit(EVENT_DEV_ASLEEP, &dev->flags)) {
Woojung Huh20ff5562016-03-16 22:10:40 +00004048 del_timer(&dev->stat_monitor);
4049
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004050 if (PMSG_IS_AUTO(message)) {
4051 /* auto suspend (selective suspend) */
4052 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
4053 buf &= ~MAC_TX_TXEN_;
4054 ret = lan78xx_write_reg(dev, MAC_TX, buf);
4055 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
4056 buf &= ~MAC_RX_RXEN_;
4057 ret = lan78xx_write_reg(dev, MAC_RX, buf);
4058
4059 ret = lan78xx_write_reg(dev, WUCSR, 0);
4060 ret = lan78xx_write_reg(dev, WUCSR2, 0);
4061 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL);
4062
4063 /* set goodframe wakeup */
4064 ret = lan78xx_read_reg(dev, WUCSR, &buf);
4065
4066 buf |= WUCSR_RFE_WAKE_EN_;
4067 buf |= WUCSR_STORE_WAKE_;
4068
4069 ret = lan78xx_write_reg(dev, WUCSR, buf);
4070
4071 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
4072
4073 buf &= ~PMT_CTL_RES_CLR_WKP_EN_;
4074 buf |= PMT_CTL_RES_CLR_WKP_STS_;
4075
4076 buf |= PMT_CTL_PHY_WAKE_EN_;
4077 buf |= PMT_CTL_WOL_EN_;
4078 buf &= ~PMT_CTL_SUS_MODE_MASK_;
4079 buf |= PMT_CTL_SUS_MODE_3_;
4080
4081 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
4082
4083 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
4084
4085 buf |= PMT_CTL_WUPS_MASK_;
4086
4087 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
4088
4089 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
4090 buf |= MAC_RX_RXEN_;
4091 ret = lan78xx_write_reg(dev, MAC_RX, buf);
4092 } else {
4093 lan78xx_set_suspend(dev, pdata->wol);
4094 }
4095 }
4096
Woojung.Huh@microchip.com49d28b562015-09-25 21:13:48 +00004097 ret = 0;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004098out:
4099 return ret;
4100}
4101
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08004102static int lan78xx_resume(struct usb_interface *intf)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004103{
4104 struct lan78xx_net *dev = usb_get_intfdata(intf);
4105 struct sk_buff *skb;
4106 struct urb *res;
4107 int ret;
4108 u32 buf;
4109
Woojung Huh20ff5562016-03-16 22:10:40 +00004110 if (!timer_pending(&dev->stat_monitor)) {
4111 dev->delta = 1;
4112 mod_timer(&dev->stat_monitor,
4113 jiffies + STAT_UPDATE_TIMER);
4114 }
4115
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004116 if (!--dev->suspend_count) {
4117 /* resume interrupt URBs */
4118 if (dev->urb_intr && test_bit(EVENT_DEV_OPEN, &dev->flags))
4119 usb_submit_urb(dev->urb_intr, GFP_NOIO);
4120
4121 spin_lock_irq(&dev->txq.lock);
4122 while ((res = usb_get_from_anchor(&dev->deferred))) {
4123 skb = (struct sk_buff *)res->context;
4124 ret = usb_submit_urb(res, GFP_ATOMIC);
4125 if (ret < 0) {
4126 dev_kfree_skb_any(skb);
4127 usb_free_urb(res);
4128 usb_autopm_put_interface_async(dev->intf);
4129 } else {
Florian Westphal860e9532016-05-03 16:33:13 +02004130 netif_trans_update(dev->net);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004131 lan78xx_queue_skb(&dev->txq, skb, tx_start);
4132 }
4133 }
4134
4135 clear_bit(EVENT_DEV_ASLEEP, &dev->flags);
4136 spin_unlock_irq(&dev->txq.lock);
4137
4138 if (test_bit(EVENT_DEV_OPEN, &dev->flags)) {
4139 if (!(skb_queue_len(&dev->txq) >= dev->tx_qlen))
4140 netif_start_queue(dev->net);
4141 tasklet_schedule(&dev->bh);
4142 }
4143 }
4144
4145 ret = lan78xx_write_reg(dev, WUCSR2, 0);
4146 ret = lan78xx_write_reg(dev, WUCSR, 0);
4147 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL);
4148
4149 ret = lan78xx_write_reg(dev, WUCSR2, WUCSR2_NS_RCD_ |
4150 WUCSR2_ARP_RCD_ |
4151 WUCSR2_IPV6_TCPSYN_RCD_ |
4152 WUCSR2_IPV4_TCPSYN_RCD_);
4153
4154 ret = lan78xx_write_reg(dev, WUCSR, WUCSR_EEE_TX_WAKE_ |
4155 WUCSR_EEE_RX_WAKE_ |
4156 WUCSR_PFDA_FR_ |
4157 WUCSR_RFE_WAKE_FR_ |
4158 WUCSR_WUFR_ |
4159 WUCSR_MPR_ |
4160 WUCSR_BCST_FR_);
4161
4162 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
4163 buf |= MAC_TX_TXEN_;
4164 ret = lan78xx_write_reg(dev, MAC_TX, buf);
4165
4166 return 0;
4167}
4168
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08004169static int lan78xx_reset_resume(struct usb_interface *intf)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004170{
4171 struct lan78xx_net *dev = usb_get_intfdata(intf);
4172
4173 lan78xx_reset(dev);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00004174
Alexander Graf92571a12018-04-04 00:19:35 +02004175 phy_start(dev->net->phydev);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00004176
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004177 return lan78xx_resume(intf);
4178}
4179
4180static const struct usb_device_id products[] = {
4181 {
4182 /* LAN7800 USB Gigabit Ethernet Device */
4183 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7800_USB_PRODUCT_ID),
4184 },
4185 {
4186 /* LAN7850 USB Gigabit Ethernet Device */
4187 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7850_USB_PRODUCT_ID),
4188 },
Woojung Huh02dc1f32016-12-07 20:26:25 +00004189 {
4190 /* LAN7801 USB Gigabit Ethernet Device */
4191 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7801_USB_PRODUCT_ID),
4192 },
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004193 {},
4194};
4195MODULE_DEVICE_TABLE(usb, products);
4196
4197static struct usb_driver lan78xx_driver = {
4198 .name = DRIVER_NAME,
4199 .id_table = products,
4200 .probe = lan78xx_probe,
4201 .disconnect = lan78xx_disconnect,
4202 .suspend = lan78xx_suspend,
4203 .resume = lan78xx_resume,
4204 .reset_resume = lan78xx_reset_resume,
4205 .supports_autosuspend = 1,
4206 .disable_hub_initiated_lpm = 1,
4207};
4208
4209module_usb_driver(lan78xx_driver);
4210
4211MODULE_AUTHOR(DRIVER_AUTHOR);
4212MODULE_DESCRIPTION(DRIVER_DESC);
4213MODULE_LICENSE("GPL");