Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 1 | /* |
| 2 | * pata_sil680.c - SIL680 PATA for new ATA layer |
| 3 | * (C) 2005 Red Hat Inc |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 4 | * |
| 5 | * based upon |
| 6 | * |
| 7 | * linux/drivers/ide/pci/siimage.c Version 1.07 Nov 30, 2003 |
| 8 | * |
| 9 | * Copyright (C) 2001-2002 Andre Hedrick <andre@linux-ide.org> |
| 10 | * Copyright (C) 2003 Red Hat <alan@redhat.com> |
| 11 | * |
| 12 | * May be copied or modified under the terms of the GNU General Public License |
| 13 | * |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 14 | * Documentation publicly available. |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 15 | * |
| 16 | * If you have strange problems with nVidia chipset systems please |
| 17 | * see the SI support documentation and update your system BIOS |
Robert P. J. Day | 3a4fa0a | 2007-10-19 23:10:43 +0200 | [diff] [blame] | 18 | * if necessary |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 19 | * |
| 20 | * TODO |
| 21 | * If we know all our devices are LBA28 (or LBA28 sized) we could use |
| 22 | * the command fifo mode. |
| 23 | */ |
| 24 | |
| 25 | #include <linux/kernel.h> |
| 26 | #include <linux/module.h> |
| 27 | #include <linux/pci.h> |
| 28 | #include <linux/init.h> |
| 29 | #include <linux/blkdev.h> |
| 30 | #include <linux/delay.h> |
| 31 | #include <scsi/scsi_host.h> |
| 32 | #include <linux/libata.h> |
| 33 | |
| 34 | #define DRV_NAME "pata_sil680" |
Alan Cox | 871af12 | 2009-01-05 14:16:39 +0000 | [diff] [blame] | 35 | #define DRV_VERSION "0.4.9" |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 36 | |
Jeff Garzik | 79b0bde1 | 2007-05-28 07:22:30 -0400 | [diff] [blame] | 37 | #define SIL680_MMIO_BAR 5 |
| 38 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 39 | /** |
| 40 | * sil680_selreg - return register base |
Bartlomiej Zolnierkiewicz | 6352187 | 2011-10-11 20:17:05 +0200 | [diff] [blame] | 41 | * @ap: ATA interface |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 42 | * @r: config offset |
| 43 | * |
Bartlomiej Zolnierkiewicz | 6352187 | 2011-10-11 20:17:05 +0200 | [diff] [blame] | 44 | * Turn a config register offset into the right address in PCI space |
| 45 | * to access the control register in question. |
| 46 | * |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 47 | * Thankfully this is a configuration operation so isn't performance |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 48 | * criticial. |
| 49 | */ |
| 50 | |
| 51 | static unsigned long sil680_selreg(struct ata_port *ap, int r) |
| 52 | { |
| 53 | unsigned long base = 0xA0 + r; |
| 54 | base += (ap->port_no << 4); |
| 55 | return base; |
| 56 | } |
| 57 | |
| 58 | /** |
| 59 | * sil680_seldev - return register base |
Bartlomiej Zolnierkiewicz | 6352187 | 2011-10-11 20:17:05 +0200 | [diff] [blame] | 60 | * @ap: ATA interface |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 61 | * @r: config offset |
| 62 | * |
Bartlomiej Zolnierkiewicz | 6352187 | 2011-10-11 20:17:05 +0200 | [diff] [blame] | 63 | * Turn a config register offset into the right address in PCI space |
| 64 | * to access the control register in question including accounting for |
| 65 | * the unit shift. |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 66 | */ |
| 67 | |
| 68 | static unsigned long sil680_seldev(struct ata_port *ap, struct ata_device *adev, int r) |
| 69 | { |
| 70 | unsigned long base = 0xA0 + r; |
| 71 | base += (ap->port_no << 4); |
| 72 | base |= adev->devno ? 2 : 0; |
| 73 | return base; |
| 74 | } |
| 75 | |
| 76 | |
| 77 | /** |
| 78 | * sil680_cable_detect - cable detection |
| 79 | * @ap: ATA port |
| 80 | * |
| 81 | * Perform cable detection. The SIL680 stores this in PCI config |
| 82 | * space for us. |
| 83 | */ |
| 84 | |
Bartlomiej Zolnierkiewicz | 7a113d3 | 2011-10-11 20:21:50 +0200 | [diff] [blame] | 85 | static int sil680_cable_detect(struct ata_port *ap) |
| 86 | { |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 87 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 88 | unsigned long addr = sil680_selreg(ap, 0); |
| 89 | u8 ata66; |
| 90 | pci_read_config_byte(pdev, addr, &ata66); |
| 91 | if (ata66 & 1) |
| 92 | return ATA_CBL_PATA80; |
| 93 | else |
| 94 | return ATA_CBL_PATA40; |
| 95 | } |
| 96 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 97 | /** |
Bartlomiej Zolnierkiewicz | 6352187 | 2011-10-11 20:17:05 +0200 | [diff] [blame] | 98 | * sil680_set_piomode - set PIO mode data |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 99 | * @ap: ATA interface |
| 100 | * @adev: ATA device |
| 101 | * |
| 102 | * Program the SIL680 registers for PIO mode. Note that the task speed |
| 103 | * registers are shared between the devices so we must pick the lowest |
| 104 | * mode for command work. |
| 105 | */ |
| 106 | |
| 107 | static void sil680_set_piomode(struct ata_port *ap, struct ata_device *adev) |
| 108 | { |
Bartlomiej Zolnierkiewicz | 9b8ad4a | 2011-10-11 20:20:28 +0200 | [diff] [blame] | 109 | static const u16 speed_p[5] = { |
| 110 | 0x328A, 0x2283, 0x1104, 0x10C3, 0x10C1 |
| 111 | }; |
| 112 | static const u16 speed_t[5] = { |
| 113 | 0x328A, 0x2283, 0x1281, 0x10C3, 0x10C1 |
| 114 | }; |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 115 | |
| 116 | unsigned long tfaddr = sil680_selreg(ap, 0x02); |
| 117 | unsigned long addr = sil680_seldev(ap, adev, 0x04); |
Alan | cb0e34b | 2007-02-20 17:49:25 +0000 | [diff] [blame] | 118 | unsigned long addr_mask = 0x80 + 4 * ap->port_no; |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 119 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 120 | int pio = adev->pio_mode - XFER_PIO_0; |
| 121 | int lowest_pio = pio; |
Alan | cb0e34b | 2007-02-20 17:49:25 +0000 | [diff] [blame] | 122 | int port_shift = 4 * adev->devno; |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 123 | u16 reg; |
Alan | cb0e34b | 2007-02-20 17:49:25 +0000 | [diff] [blame] | 124 | u8 mode; |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 125 | |
| 126 | struct ata_device *pair = ata_dev_pair(adev); |
| 127 | |
| 128 | if (pair != NULL && adev->pio_mode > pair->pio_mode) |
| 129 | lowest_pio = pair->pio_mode - XFER_PIO_0; |
| 130 | |
| 131 | pci_write_config_word(pdev, addr, speed_p[pio]); |
| 132 | pci_write_config_word(pdev, tfaddr, speed_t[lowest_pio]); |
| 133 | |
| 134 | pci_read_config_word(pdev, tfaddr-2, ®); |
Alan | cb0e34b | 2007-02-20 17:49:25 +0000 | [diff] [blame] | 135 | pci_read_config_byte(pdev, addr_mask, &mode); |
Jeff Garzik | a84471f | 2007-02-26 05:51:33 -0500 | [diff] [blame] | 136 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 137 | reg &= ~0x0200; /* Clear IORDY */ |
Alan | cb0e34b | 2007-02-20 17:49:25 +0000 | [diff] [blame] | 138 | mode &= ~(3 << port_shift); /* Clear IORDY and DMA bits */ |
Jeff Garzik | a84471f | 2007-02-26 05:51:33 -0500 | [diff] [blame] | 139 | |
Alan | cb0e34b | 2007-02-20 17:49:25 +0000 | [diff] [blame] | 140 | if (ata_pio_need_iordy(adev)) { |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 141 | reg |= 0x0200; /* Enable IORDY */ |
Alan | cb0e34b | 2007-02-20 17:49:25 +0000 | [diff] [blame] | 142 | mode |= 1 << port_shift; |
| 143 | } |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 144 | pci_write_config_word(pdev, tfaddr-2, reg); |
Alan | cb0e34b | 2007-02-20 17:49:25 +0000 | [diff] [blame] | 145 | pci_write_config_byte(pdev, addr_mask, mode); |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 146 | } |
| 147 | |
| 148 | /** |
Bartlomiej Zolnierkiewicz | 6352187 | 2011-10-11 20:17:05 +0200 | [diff] [blame] | 149 | * sil680_set_dmamode - set DMA mode data |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 150 | * @ap: ATA interface |
| 151 | * @adev: ATA device |
| 152 | * |
Bartlomiej Zolnierkiewicz | 6352187 | 2011-10-11 20:17:05 +0200 | [diff] [blame] | 153 | * Program the MWDMA/UDMA modes for the sil680 chipset. |
| 154 | * |
| 155 | * The MWDMA mode values are pulled from a lookup table |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 156 | * while the chipset uses mode number for UDMA. |
| 157 | */ |
| 158 | |
| 159 | static void sil680_set_dmamode(struct ata_port *ap, struct ata_device *adev) |
| 160 | { |
Bartlomiej Zolnierkiewicz | 9b8ad4a | 2011-10-11 20:20:28 +0200 | [diff] [blame] | 161 | static const u8 ultra_table[2][7] = { |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 162 | { 0x0C, 0x07, 0x05, 0x04, 0x02, 0x01, 0xFF }, /* 100MHz */ |
| 163 | { 0x0F, 0x0B, 0x07, 0x05, 0x03, 0x02, 0x01 }, /* 133Mhz */ |
| 164 | }; |
Bartlomiej Zolnierkiewicz | 9b8ad4a | 2011-10-11 20:20:28 +0200 | [diff] [blame] | 165 | static const u16 dma_table[3] = { 0x2208, 0x10C2, 0x10C1 }; |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 166 | |
| 167 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 168 | unsigned long ma = sil680_seldev(ap, adev, 0x08); |
| 169 | unsigned long ua = sil680_seldev(ap, adev, 0x0C); |
| 170 | unsigned long addr_mask = 0x80 + 4 * ap->port_no; |
| 171 | int port_shift = adev->devno * 4; |
| 172 | u8 scsc, mode; |
| 173 | u16 multi, ultra; |
| 174 | |
| 175 | pci_read_config_byte(pdev, 0x8A, &scsc); |
| 176 | pci_read_config_byte(pdev, addr_mask, &mode); |
| 177 | pci_read_config_word(pdev, ma, &multi); |
| 178 | pci_read_config_word(pdev, ua, &ultra); |
| 179 | |
| 180 | /* Mask timing bits */ |
| 181 | ultra &= ~0x3F; |
| 182 | mode &= ~(0x03 << port_shift); |
| 183 | |
| 184 | /* Extract scsc */ |
Bartlomiej Zolnierkiewicz | 7a113d3 | 2011-10-11 20:21:50 +0200 | [diff] [blame] | 185 | scsc = (scsc & 0x30) ? 1 : 0; |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 186 | |
| 187 | if (adev->dma_mode >= XFER_UDMA_0) { |
| 188 | multi = 0x10C1; |
| 189 | ultra |= ultra_table[scsc][adev->dma_mode - XFER_UDMA_0]; |
| 190 | mode |= (0x03 << port_shift); |
| 191 | } else { |
| 192 | multi = dma_table[adev->dma_mode - XFER_MW_DMA_0]; |
| 193 | mode |= (0x02 << port_shift); |
| 194 | } |
| 195 | pci_write_config_byte(pdev, addr_mask, mode); |
| 196 | pci_write_config_word(pdev, ma, multi); |
| 197 | pci_write_config_word(pdev, ua, ultra); |
| 198 | } |
| 199 | |
Alan Cox | c4acf99 | 2010-05-05 10:25:58 +0100 | [diff] [blame] | 200 | /** |
| 201 | * sil680_sff_exec_command - issue ATA command to host controller |
| 202 | * @ap: port to which command is being issued |
| 203 | * @tf: ATA taskfile register set |
| 204 | * |
| 205 | * Issues ATA command, with proper synchronization with interrupt |
| 206 | * handler / other threads. Use our MMIO space for PCI posting to avoid |
| 207 | * a hideously slow cycle all the way to the device. |
| 208 | * |
| 209 | * LOCKING: |
| 210 | * spin_lock_irqsave(host lock) |
| 211 | */ |
Sergei Shtylyov | ada5b12 | 2010-10-05 20:31:47 +0400 | [diff] [blame] | 212 | static void sil680_sff_exec_command(struct ata_port *ap, |
| 213 | const struct ata_taskfile *tf) |
Alan Cox | c4acf99 | 2010-05-05 10:25:58 +0100 | [diff] [blame] | 214 | { |
| 215 | DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command); |
| 216 | iowrite8(tf->command, ap->ioaddr.command_addr); |
| 217 | ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD); |
| 218 | } |
| 219 | |
Sergei Shtylyov | 9b980e1 | 2010-10-08 19:01:08 +0400 | [diff] [blame] | 220 | static bool sil680_sff_irq_check(struct ata_port *ap) |
| 221 | { |
| 222 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 223 | unsigned long addr = sil680_selreg(ap, 1); |
| 224 | u8 val; |
| 225 | |
| 226 | pci_read_config_byte(pdev, addr, &val); |
| 227 | |
| 228 | return val & 0x08; |
| 229 | } |
| 230 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 231 | static struct scsi_host_template sil680_sht = { |
Tejun Heo | 68d1d07 | 2008-03-25 12:22:49 +0900 | [diff] [blame] | 232 | ATA_BMDMA_SHT(DRV_NAME), |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 233 | }; |
| 234 | |
Alan Cox | c4acf99 | 2010-05-05 10:25:58 +0100 | [diff] [blame] | 235 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 236 | static struct ata_port_operations sil680_port_ops = { |
Alan Cox | c4acf99 | 2010-05-05 10:25:58 +0100 | [diff] [blame] | 237 | .inherits = &ata_bmdma32_port_ops, |
| 238 | .sff_exec_command = sil680_sff_exec_command, |
Sergei Shtylyov | 9b980e1 | 2010-10-08 19:01:08 +0400 | [diff] [blame] | 239 | .sff_irq_check = sil680_sff_irq_check, |
Alan Cox | c4acf99 | 2010-05-05 10:25:58 +0100 | [diff] [blame] | 240 | .cable_detect = sil680_cable_detect, |
| 241 | .set_piomode = sil680_set_piomode, |
| 242 | .set_dmamode = sil680_set_dmamode, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 243 | }; |
| 244 | |
Alan | 8550c16 | 2006-11-22 17:28:41 +0000 | [diff] [blame] | 245 | /** |
| 246 | * sil680_init_chip - chip setup |
| 247 | * @pdev: PCI device |
| 248 | * |
| 249 | * Perform all the chip setup which must be done both when the device |
| 250 | * is powered up on boot and when we resume in case we resumed from RAM. |
| 251 | * Returns the final clock settings. |
| 252 | */ |
Jeff Garzik | f20b16f | 2006-12-11 11:14:06 -0500 | [diff] [blame] | 253 | |
Benjamin Herrenschmidt | 2b9e68f | 2007-07-06 19:21:22 -0400 | [diff] [blame] | 254 | static u8 sil680_init_chip(struct pci_dev *pdev, int *try_mmio) |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 255 | { |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 256 | u8 tmpbyte = 0; |
| 257 | |
Bartlomiej Zolnierkiewicz | 7a113d3 | 2011-10-11 20:21:50 +0200 | [diff] [blame] | 258 | /* FIXME: double check */ |
Sergei Shtylyov | 89d3b36 | 2009-11-24 22:54:49 +0400 | [diff] [blame] | 259 | pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, |
| 260 | pdev->revision ? 1 : 255); |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 261 | |
| 262 | pci_write_config_byte(pdev, 0x80, 0x00); |
| 263 | pci_write_config_byte(pdev, 0x84, 0x00); |
| 264 | |
| 265 | pci_read_config_byte(pdev, 0x8A, &tmpbyte); |
| 266 | |
Jeff Garzik | 79b0bde1 | 2007-05-28 07:22:30 -0400 | [diff] [blame] | 267 | dev_dbg(&pdev->dev, "sil680: BA5_EN = %d clock = %02X\n", |
| 268 | tmpbyte & 1, tmpbyte & 0x30); |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 269 | |
Benjamin Herrenschmidt | 0f436ef | 2008-03-28 14:52:29 -0700 | [diff] [blame] | 270 | *try_mmio = 0; |
Kumar Gala | 47d692a | 2008-09-22 14:47:33 -0700 | [diff] [blame] | 271 | #ifdef CONFIG_PPC |
Benjamin Herrenschmidt | 0f436ef | 2008-03-28 14:52:29 -0700 | [diff] [blame] | 272 | if (machine_is(cell)) |
| 273 | *try_mmio = (tmpbyte & 1) || pci_resource_start(pdev, 5); |
| 274 | #endif |
Benjamin Herrenschmidt | 2b9e68f | 2007-07-06 19:21:22 -0400 | [diff] [blame] | 275 | |
Bartlomiej Zolnierkiewicz | 7a113d3 | 2011-10-11 20:21:50 +0200 | [diff] [blame] | 276 | switch (tmpbyte & 0x30) { |
| 277 | case 0x00: |
| 278 | /* 133 clock attempt to force it on */ |
| 279 | pci_write_config_byte(pdev, 0x8A, tmpbyte|0x10); |
| 280 | break; |
| 281 | case 0x30: |
| 282 | /* if clocking is disabled */ |
| 283 | /* 133 clock attempt to force it on */ |
| 284 | pci_write_config_byte(pdev, 0x8A, tmpbyte & ~0x20); |
| 285 | break; |
| 286 | case 0x10: |
| 287 | /* 133 already */ |
| 288 | break; |
| 289 | case 0x20: |
| 290 | /* BIOS set PCI x2 clocking */ |
| 291 | break; |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 292 | } |
| 293 | |
| 294 | pci_read_config_byte(pdev, 0x8A, &tmpbyte); |
Jeff Garzik | 79b0bde1 | 2007-05-28 07:22:30 -0400 | [diff] [blame] | 295 | dev_dbg(&pdev->dev, "sil680: BA5_EN = %d clock = %02X\n", |
| 296 | tmpbyte & 1, tmpbyte & 0x30); |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 297 | |
| 298 | pci_write_config_byte(pdev, 0xA1, 0x72); |
| 299 | pci_write_config_word(pdev, 0xA2, 0x328A); |
| 300 | pci_write_config_dword(pdev, 0xA4, 0x62DD62DD); |
| 301 | pci_write_config_dword(pdev, 0xA8, 0x43924392); |
| 302 | pci_write_config_dword(pdev, 0xAC, 0x40094009); |
| 303 | pci_write_config_byte(pdev, 0xB1, 0x72); |
| 304 | pci_write_config_word(pdev, 0xB2, 0x328A); |
| 305 | pci_write_config_dword(pdev, 0xB4, 0x62DD62DD); |
| 306 | pci_write_config_dword(pdev, 0xB8, 0x43924392); |
| 307 | pci_write_config_dword(pdev, 0xBC, 0x40094009); |
| 308 | |
Bartlomiej Zolnierkiewicz | 7a113d3 | 2011-10-11 20:21:50 +0200 | [diff] [blame] | 309 | switch (tmpbyte & 0x30) { |
| 310 | case 0x00: |
| 311 | printk(KERN_INFO "sil680: 100MHz clock.\n"); |
| 312 | break; |
| 313 | case 0x10: |
| 314 | printk(KERN_INFO "sil680: 133MHz clock.\n"); |
| 315 | break; |
| 316 | case 0x20: |
| 317 | printk(KERN_INFO "sil680: Using PCI clock.\n"); |
| 318 | break; |
| 319 | /* This last case is _NOT_ ok */ |
| 320 | case 0x30: |
| 321 | printk(KERN_ERR "sil680: Clock disabled ?\n"); |
Alan | 8550c16 | 2006-11-22 17:28:41 +0000 | [diff] [blame] | 322 | } |
| 323 | return tmpbyte & 0x30; |
| 324 | } |
| 325 | |
Greg Kroah-Hartman | 0ec2491 | 2012-12-21 13:19:58 -0800 | [diff] [blame] | 326 | static int sil680_init_one(struct pci_dev *pdev, const struct pci_device_id *id) |
Alan | 8550c16 | 2006-11-22 17:28:41 +0000 | [diff] [blame] | 327 | { |
Tejun Heo | 1626aeb | 2007-05-04 12:43:58 +0200 | [diff] [blame] | 328 | static const struct ata_port_info info = { |
Jeff Garzik | 1d2808f | 2007-05-28 06:59:48 -0400 | [diff] [blame] | 329 | .flags = ATA_FLAG_SLAVE_POSS, |
Erik Inge Bolsø | 14bdef9 | 2009-03-14 21:38:24 +0100 | [diff] [blame] | 330 | .pio_mask = ATA_PIO4, |
| 331 | .mwdma_mask = ATA_MWDMA2, |
Jeff Garzik | bf6263a | 2007-07-09 12:16:50 -0400 | [diff] [blame] | 332 | .udma_mask = ATA_UDMA6, |
Alan | 8550c16 | 2006-11-22 17:28:41 +0000 | [diff] [blame] | 333 | .port_ops = &sil680_port_ops |
| 334 | }; |
Tejun Heo | 1626aeb | 2007-05-04 12:43:58 +0200 | [diff] [blame] | 335 | static const struct ata_port_info info_slow = { |
Jeff Garzik | 1d2808f | 2007-05-28 06:59:48 -0400 | [diff] [blame] | 336 | .flags = ATA_FLAG_SLAVE_POSS, |
Erik Inge Bolsø | 14bdef9 | 2009-03-14 21:38:24 +0100 | [diff] [blame] | 337 | .pio_mask = ATA_PIO4, |
| 338 | .mwdma_mask = ATA_MWDMA2, |
Jeff Garzik | bf6263a | 2007-07-09 12:16:50 -0400 | [diff] [blame] | 339 | .udma_mask = ATA_UDMA5, |
Alan | 8550c16 | 2006-11-22 17:28:41 +0000 | [diff] [blame] | 340 | .port_ops = &sil680_port_ops |
| 341 | }; |
Tejun Heo | 1626aeb | 2007-05-04 12:43:58 +0200 | [diff] [blame] | 342 | const struct ata_port_info *ppi[] = { &info, NULL }; |
Benjamin Herrenschmidt | 2b9e68f | 2007-07-06 19:21:22 -0400 | [diff] [blame] | 343 | struct ata_host *host; |
| 344 | void __iomem *mmio_base; |
| 345 | int rc, try_mmio; |
Alan | 8550c16 | 2006-11-22 17:28:41 +0000 | [diff] [blame] | 346 | |
Joe Perches | 06296a1 | 2011-04-15 15:52:00 -0700 | [diff] [blame] | 347 | ata_print_version_once(&pdev->dev, DRV_VERSION); |
Alan | 8550c16 | 2006-11-22 17:28:41 +0000 | [diff] [blame] | 348 | |
Tejun Heo | f08048e | 2008-03-25 12:22:47 +0900 | [diff] [blame] | 349 | rc = pcim_enable_device(pdev); |
| 350 | if (rc) |
| 351 | return rc; |
| 352 | |
Benjamin Herrenschmidt | 2b9e68f | 2007-07-06 19:21:22 -0400 | [diff] [blame] | 353 | switch (sil680_init_chip(pdev, &try_mmio)) { |
Alan | 8550c16 | 2006-11-22 17:28:41 +0000 | [diff] [blame] | 354 | case 0: |
Tejun Heo | 1626aeb | 2007-05-04 12:43:58 +0200 | [diff] [blame] | 355 | ppi[0] = &info_slow; |
Alan | 8550c16 | 2006-11-22 17:28:41 +0000 | [diff] [blame] | 356 | break; |
| 357 | case 0x30: |
| 358 | return -ENODEV; |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 359 | } |
Benjamin Herrenschmidt | 2b9e68f | 2007-07-06 19:21:22 -0400 | [diff] [blame] | 360 | |
| 361 | if (!try_mmio) |
| 362 | goto use_ioports; |
| 363 | |
| 364 | /* Try to acquire MMIO resources and fallback to PIO if |
| 365 | * that fails |
| 366 | */ |
Benjamin Herrenschmidt | 2b9e68f | 2007-07-06 19:21:22 -0400 | [diff] [blame] | 367 | rc = pcim_iomap_regions(pdev, 1 << SIL680_MMIO_BAR, DRV_NAME); |
| 368 | if (rc) |
| 369 | goto use_ioports; |
| 370 | |
| 371 | /* Allocate host and set it up */ |
| 372 | host = ata_host_alloc_pinfo(&pdev->dev, ppi, 2); |
| 373 | if (!host) |
| 374 | return -ENOMEM; |
| 375 | host->iomap = pcim_iomap_table(pdev); |
| 376 | |
| 377 | /* Setup DMA masks */ |
| 378 | rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); |
| 379 | if (rc) |
| 380 | return rc; |
| 381 | rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK); |
| 382 | if (rc) |
| 383 | return rc; |
| 384 | pci_set_master(pdev); |
| 385 | |
| 386 | /* Get MMIO base and initialize port addresses */ |
| 387 | mmio_base = host->iomap[SIL680_MMIO_BAR]; |
| 388 | host->ports[0]->ioaddr.bmdma_addr = mmio_base + 0x00; |
| 389 | host->ports[0]->ioaddr.cmd_addr = mmio_base + 0x80; |
| 390 | host->ports[0]->ioaddr.ctl_addr = mmio_base + 0x8a; |
| 391 | host->ports[0]->ioaddr.altstatus_addr = mmio_base + 0x8a; |
Tejun Heo | 9363c38 | 2008-04-07 22:47:16 +0900 | [diff] [blame] | 392 | ata_sff_std_ports(&host->ports[0]->ioaddr); |
Benjamin Herrenschmidt | 2b9e68f | 2007-07-06 19:21:22 -0400 | [diff] [blame] | 393 | host->ports[1]->ioaddr.bmdma_addr = mmio_base + 0x08; |
| 394 | host->ports[1]->ioaddr.cmd_addr = mmio_base + 0xc0; |
| 395 | host->ports[1]->ioaddr.ctl_addr = mmio_base + 0xca; |
| 396 | host->ports[1]->ioaddr.altstatus_addr = mmio_base + 0xca; |
Tejun Heo | 9363c38 | 2008-04-07 22:47:16 +0900 | [diff] [blame] | 397 | ata_sff_std_ports(&host->ports[1]->ioaddr); |
Benjamin Herrenschmidt | 2b9e68f | 2007-07-06 19:21:22 -0400 | [diff] [blame] | 398 | |
| 399 | /* Register & activate */ |
Tejun Heo | c3b2889 | 2010-05-19 22:10:21 +0200 | [diff] [blame] | 400 | return ata_host_activate(host, pdev->irq, ata_bmdma_interrupt, |
Tejun Heo | 9363c38 | 2008-04-07 22:47:16 +0900 | [diff] [blame] | 401 | IRQF_SHARED, &sil680_sht); |
Benjamin Herrenschmidt | 2b9e68f | 2007-07-06 19:21:22 -0400 | [diff] [blame] | 402 | |
| 403 | use_ioports: |
Tejun Heo | 1c5afdf | 2010-05-19 22:10:22 +0200 | [diff] [blame] | 404 | return ata_pci_bmdma_init_one(pdev, ppi, &sil680_sht, NULL, 0); |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 405 | } |
| 406 | |
Tejun Heo | 438ac6d | 2007-03-02 17:31:26 +0900 | [diff] [blame] | 407 | #ifdef CONFIG_PM |
Alan | 8550c16 | 2006-11-22 17:28:41 +0000 | [diff] [blame] | 408 | static int sil680_reinit_one(struct pci_dev *pdev) |
| 409 | { |
Jingoo Han | 0a86e1c | 2013-06-03 14:05:36 +0900 | [diff] [blame] | 410 | struct ata_host *host = pci_get_drvdata(pdev); |
Tejun Heo | f08048e | 2008-03-25 12:22:47 +0900 | [diff] [blame] | 411 | int try_mmio, rc; |
Benjamin Herrenschmidt | 2b9e68f | 2007-07-06 19:21:22 -0400 | [diff] [blame] | 412 | |
Tejun Heo | f08048e | 2008-03-25 12:22:47 +0900 | [diff] [blame] | 413 | rc = ata_pci_device_do_resume(pdev); |
| 414 | if (rc) |
| 415 | return rc; |
Benjamin Herrenschmidt | 2b9e68f | 2007-07-06 19:21:22 -0400 | [diff] [blame] | 416 | sil680_init_chip(pdev, &try_mmio); |
Tejun Heo | f08048e | 2008-03-25 12:22:47 +0900 | [diff] [blame] | 417 | ata_host_resume(host); |
| 418 | return 0; |
Alan | 8550c16 | 2006-11-22 17:28:41 +0000 | [diff] [blame] | 419 | } |
Tejun Heo | 438ac6d | 2007-03-02 17:31:26 +0900 | [diff] [blame] | 420 | #endif |
Alan | 8550c16 | 2006-11-22 17:28:41 +0000 | [diff] [blame] | 421 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 422 | static const struct pci_device_id sil680[] = { |
Jeff Garzik | 2d2744f | 2006-09-28 20:21:59 -0400 | [diff] [blame] | 423 | { PCI_VDEVICE(CMD, PCI_DEVICE_ID_SII_680), }, |
| 424 | |
| 425 | { }, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 426 | }; |
| 427 | |
| 428 | static struct pci_driver sil680_pci_driver = { |
Jeff Garzik | 2d2744f | 2006-09-28 20:21:59 -0400 | [diff] [blame] | 429 | .name = DRV_NAME, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 430 | .id_table = sil680, |
| 431 | .probe = sil680_init_one, |
Alan | 8550c16 | 2006-11-22 17:28:41 +0000 | [diff] [blame] | 432 | .remove = ata_pci_remove_one, |
Tejun Heo | 438ac6d | 2007-03-02 17:31:26 +0900 | [diff] [blame] | 433 | #ifdef CONFIG_PM |
Alan | 8550c16 | 2006-11-22 17:28:41 +0000 | [diff] [blame] | 434 | .suspend = ata_pci_device_suspend, |
| 435 | .resume = sil680_reinit_one, |
Tejun Heo | 438ac6d | 2007-03-02 17:31:26 +0900 | [diff] [blame] | 436 | #endif |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 437 | }; |
| 438 | |
Axel Lin | 2fc75da | 2012-04-19 13:43:05 +0800 | [diff] [blame] | 439 | module_pci_driver(sil680_pci_driver); |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 440 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 441 | MODULE_AUTHOR("Alan Cox"); |
| 442 | MODULE_DESCRIPTION("low-level driver for SI680 PATA"); |
| 443 | MODULE_LICENSE("GPL"); |
| 444 | MODULE_DEVICE_TABLE(pci, sil680); |
| 445 | MODULE_VERSION(DRV_VERSION); |