blob: e05ad9be43b7a5fa7e6d6a24f94e49828a73572a [file] [log] [blame]
Andrew Mortonc777ac52006-03-25 03:07:36 -08001
Christoph Hellwigd824e662006-04-10 22:54:04 -07002#include <linux/irq.h>
Andrew Mortonc777ac52006-03-25 03:07:36 -08003
Eric W. Biedermane7b946e2006-10-04 02:16:29 -07004void move_masked_irq(int irq)
Andrew Mortonc777ac52006-03-25 03:07:36 -08005{
Yinghai Lu08678b02008-08-19 20:50:05 -07006 struct irq_desc *desc = irq_to_desc(irq);
Andrew Mortonc777ac52006-03-25 03:07:36 -08007
Eric W. Biedermana24ceab2006-10-04 02:16:27 -07008 if (likely(!(desc->status & IRQ_MOVE_PENDING)))
Andrew Mortonc777ac52006-03-25 03:07:36 -08009 return;
10
Bryan Holty501f2492006-03-25 03:07:37 -080011 /*
12 * Paranoia: cpu-local interrupts shouldn't be calling in here anyway.
13 */
14 if (CHECK_IRQ_PER_CPU(desc->status)) {
15 WARN_ON(1);
16 return;
17 }
18
Eric W. Biedermana24ceab2006-10-04 02:16:27 -070019 desc->status &= ~IRQ_MOVE_PENDING;
Andrew Mortonc777ac52006-03-25 03:07:36 -080020
Mike Travis7f7ace02009-01-10 21:58:08 -080021 if (unlikely(cpumask_empty(desc->pending_mask)))
Andrew Mortonc777ac52006-03-25 03:07:36 -080022 return;
23
Ingo Molnard1bef4e2006-06-29 02:24:36 -070024 if (!desc->chip->set_affinity)
Andrew Mortonc777ac52006-03-25 03:07:36 -080025 return;
26
Bryan Holty501f2492006-03-25 03:07:37 -080027 assert_spin_locked(&desc->lock);
28
Andrew Mortonc777ac52006-03-25 03:07:36 -080029 /*
30 * If there was a valid mask to work with, please
31 * do the disable, re-program, enable sequence.
32 * This is *not* particularly important for level triggered
33 * but in a edge trigger case, we might be setting rte
34 * when an active trigger is comming in. This could
35 * cause some ioapics to mal-function.
36 * Being paranoid i guess!
Eric W. Biedermane7b946e2006-10-04 02:16:29 -070037 *
38 * For correct operation this depends on the caller
39 * masking the irqs.
Andrew Mortonc777ac52006-03-25 03:07:36 -080040 */
Mike Travis7f7ace02009-01-10 21:58:08 -080041 if (likely(cpumask_any_and(desc->pending_mask, cpu_online_mask)
Rusty Russell0de26522008-12-13 21:20:26 +103042 < nr_cpu_ids)) {
Mike Travis7f7ace02009-01-10 21:58:08 -080043 cpumask_and(desc->affinity,
44 desc->pending_mask, cpu_online_mask);
45 desc->chip->set_affinity(irq, desc->affinity);
Andrew Mortonc777ac52006-03-25 03:07:36 -080046 }
Mike Travis7f7ace02009-01-10 21:58:08 -080047 cpumask_clear(desc->pending_mask);
Andrew Mortonc777ac52006-03-25 03:07:36 -080048}
Eric W. Biedermane7b946e2006-10-04 02:16:29 -070049
50void move_native_irq(int irq)
51{
Yinghai Lu08678b02008-08-19 20:50:05 -070052 struct irq_desc *desc = irq_to_desc(irq);
Eric W. Biedermane7b946e2006-10-04 02:16:29 -070053
54 if (likely(!(desc->status & IRQ_MOVE_PENDING)))
55 return;
56
Eric W. Biederman2a786b42007-02-23 04:46:20 -070057 if (unlikely(desc->status & IRQ_DISABLED))
58 return;
Eric W. Biedermane7b946e2006-10-04 02:16:29 -070059
Eric W. Biederman2a786b42007-02-23 04:46:20 -070060 desc->chip->mask(irq);
Eric W. Biedermane7b946e2006-10-04 02:16:29 -070061 move_masked_irq(irq);
Eric W. Biederman2a786b42007-02-23 04:46:20 -070062 desc->chip->unmask(irq);
Eric W. Biedermane7b946e2006-10-04 02:16:29 -070063}
64