Chen Zhong | 3e9f0b3 | 2017-10-25 21:16:03 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2017 MediaTek, Inc. |
| 3 | * |
| 4 | * Author: Chen Zhong <chen.zhong@mediatek.com> |
| 5 | * |
| 6 | * This software is licensed under the terms of the GNU General Public |
| 7 | * License version 2, as published by the Free Software Foundation, and |
| 8 | * may be copied, distributed, and modified under those terms. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | */ |
| 16 | |
Chen Zhong | 3e9f0b3 | 2017-10-25 21:16:03 +0800 | [diff] [blame] | 17 | #include <linux/input.h> |
| 18 | #include <linux/interrupt.h> |
Chen Zhong | 3e9f0b3 | 2017-10-25 21:16:03 +0800 | [diff] [blame] | 19 | #include <linux/kernel.h> |
Chen Zhong | 3e9f0b3 | 2017-10-25 21:16:03 +0800 | [diff] [blame] | 20 | #include <linux/mfd/mt6323/registers.h> |
Chen Zhong | 3e9f0b3 | 2017-10-25 21:16:03 +0800 | [diff] [blame] | 21 | #include <linux/mfd/mt6397/core.h> |
YueHaibing | 1eb7ea2 | 2018-12-21 00:45:41 -0800 | [diff] [blame] | 22 | #include <linux/mfd/mt6397/registers.h> |
| 23 | #include <linux/module.h> |
| 24 | #include <linux/of_device.h> |
| 25 | #include <linux/of.h> |
| 26 | #include <linux/platform_device.h> |
| 27 | #include <linux/regmap.h> |
Chen Zhong | 3e9f0b3 | 2017-10-25 21:16:03 +0800 | [diff] [blame] | 28 | |
| 29 | #define MTK_PMIC_PWRKEY_RST_EN_MASK 0x1 |
| 30 | #define MTK_PMIC_PWRKEY_RST_EN_SHIFT 6 |
| 31 | #define MTK_PMIC_HOMEKEY_RST_EN_MASK 0x1 |
| 32 | #define MTK_PMIC_HOMEKEY_RST_EN_SHIFT 5 |
| 33 | #define MTK_PMIC_RST_DU_MASK 0x3 |
| 34 | #define MTK_PMIC_RST_DU_SHIFT 8 |
| 35 | |
| 36 | #define MTK_PMIC_PWRKEY_RST \ |
| 37 | (MTK_PMIC_PWRKEY_RST_EN_MASK << MTK_PMIC_PWRKEY_RST_EN_SHIFT) |
| 38 | #define MTK_PMIC_HOMEKEY_RST \ |
| 39 | (MTK_PMIC_HOMEKEY_RST_EN_MASK << MTK_PMIC_HOMEKEY_RST_EN_SHIFT) |
| 40 | |
| 41 | #define MTK_PMIC_PWRKEY_INDEX 0 |
| 42 | #define MTK_PMIC_HOMEKEY_INDEX 1 |
| 43 | #define MTK_PMIC_MAX_KEY_COUNT 2 |
| 44 | |
| 45 | struct mtk_pmic_keys_regs { |
| 46 | u32 deb_reg; |
| 47 | u32 deb_mask; |
| 48 | u32 intsel_reg; |
| 49 | u32 intsel_mask; |
| 50 | }; |
| 51 | |
| 52 | #define MTK_PMIC_KEYS_REGS(_deb_reg, _deb_mask, \ |
| 53 | _intsel_reg, _intsel_mask) \ |
| 54 | { \ |
| 55 | .deb_reg = _deb_reg, \ |
| 56 | .deb_mask = _deb_mask, \ |
| 57 | .intsel_reg = _intsel_reg, \ |
| 58 | .intsel_mask = _intsel_mask, \ |
| 59 | } |
| 60 | |
| 61 | struct mtk_pmic_regs { |
| 62 | const struct mtk_pmic_keys_regs keys_regs[MTK_PMIC_MAX_KEY_COUNT]; |
| 63 | u32 pmic_rst_reg; |
| 64 | }; |
| 65 | |
| 66 | static const struct mtk_pmic_regs mt6397_regs = { |
| 67 | .keys_regs[MTK_PMIC_PWRKEY_INDEX] = |
| 68 | MTK_PMIC_KEYS_REGS(MT6397_CHRSTATUS, |
| 69 | 0x8, MT6397_INT_RSV, 0x10), |
| 70 | .keys_regs[MTK_PMIC_HOMEKEY_INDEX] = |
| 71 | MTK_PMIC_KEYS_REGS(MT6397_OCSTATUS2, |
| 72 | 0x10, MT6397_INT_RSV, 0x8), |
| 73 | .pmic_rst_reg = MT6397_TOP_RST_MISC, |
| 74 | }; |
| 75 | |
| 76 | static const struct mtk_pmic_regs mt6323_regs = { |
| 77 | .keys_regs[MTK_PMIC_PWRKEY_INDEX] = |
| 78 | MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS, |
| 79 | 0x2, MT6323_INT_MISC_CON, 0x10), |
| 80 | .keys_regs[MTK_PMIC_HOMEKEY_INDEX] = |
| 81 | MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS, |
| 82 | 0x4, MT6323_INT_MISC_CON, 0x8), |
| 83 | .pmic_rst_reg = MT6323_TOP_RST_MISC, |
| 84 | }; |
| 85 | |
| 86 | struct mtk_pmic_keys_info { |
| 87 | struct mtk_pmic_keys *keys; |
| 88 | const struct mtk_pmic_keys_regs *regs; |
| 89 | unsigned int keycode; |
| 90 | int irq; |
| 91 | bool wakeup:1; |
| 92 | }; |
| 93 | |
| 94 | struct mtk_pmic_keys { |
| 95 | struct input_dev *input_dev; |
| 96 | struct device *dev; |
| 97 | struct regmap *regmap; |
| 98 | struct mtk_pmic_keys_info keys[MTK_PMIC_MAX_KEY_COUNT]; |
| 99 | }; |
| 100 | |
| 101 | enum mtk_pmic_keys_lp_mode { |
| 102 | LP_DISABLE, |
| 103 | LP_ONEKEY, |
| 104 | LP_TWOKEY, |
| 105 | }; |
| 106 | |
| 107 | static void mtk_pmic_keys_lp_reset_setup(struct mtk_pmic_keys *keys, |
| 108 | u32 pmic_rst_reg) |
| 109 | { |
| 110 | int ret; |
| 111 | u32 long_press_mode, long_press_debounce; |
| 112 | |
| 113 | ret = of_property_read_u32(keys->dev->of_node, |
| 114 | "power-off-time-sec", &long_press_debounce); |
| 115 | if (ret) |
| 116 | long_press_debounce = 0; |
| 117 | |
| 118 | regmap_update_bits(keys->regmap, pmic_rst_reg, |
| 119 | MTK_PMIC_RST_DU_MASK << MTK_PMIC_RST_DU_SHIFT, |
| 120 | long_press_debounce << MTK_PMIC_RST_DU_SHIFT); |
| 121 | |
| 122 | ret = of_property_read_u32(keys->dev->of_node, |
| 123 | "mediatek,long-press-mode", &long_press_mode); |
| 124 | if (ret) |
| 125 | long_press_mode = LP_DISABLE; |
| 126 | |
| 127 | switch (long_press_mode) { |
| 128 | case LP_ONEKEY: |
| 129 | regmap_update_bits(keys->regmap, pmic_rst_reg, |
| 130 | MTK_PMIC_PWRKEY_RST, |
| 131 | MTK_PMIC_PWRKEY_RST); |
| 132 | regmap_update_bits(keys->regmap, pmic_rst_reg, |
| 133 | MTK_PMIC_HOMEKEY_RST, |
| 134 | 0); |
| 135 | break; |
| 136 | case LP_TWOKEY: |
| 137 | regmap_update_bits(keys->regmap, pmic_rst_reg, |
| 138 | MTK_PMIC_PWRKEY_RST, |
| 139 | MTK_PMIC_PWRKEY_RST); |
| 140 | regmap_update_bits(keys->regmap, pmic_rst_reg, |
| 141 | MTK_PMIC_HOMEKEY_RST, |
| 142 | MTK_PMIC_HOMEKEY_RST); |
| 143 | break; |
| 144 | case LP_DISABLE: |
| 145 | regmap_update_bits(keys->regmap, pmic_rst_reg, |
| 146 | MTK_PMIC_PWRKEY_RST, |
| 147 | 0); |
| 148 | regmap_update_bits(keys->regmap, pmic_rst_reg, |
| 149 | MTK_PMIC_HOMEKEY_RST, |
| 150 | 0); |
| 151 | break; |
| 152 | default: |
| 153 | break; |
| 154 | } |
| 155 | } |
| 156 | |
| 157 | static irqreturn_t mtk_pmic_keys_irq_handler_thread(int irq, void *data) |
| 158 | { |
| 159 | struct mtk_pmic_keys_info *info = data; |
| 160 | u32 key_deb, pressed; |
| 161 | |
| 162 | regmap_read(info->keys->regmap, info->regs->deb_reg, &key_deb); |
| 163 | |
| 164 | key_deb &= info->regs->deb_mask; |
| 165 | |
| 166 | pressed = !key_deb; |
| 167 | |
| 168 | input_report_key(info->keys->input_dev, info->keycode, pressed); |
| 169 | input_sync(info->keys->input_dev); |
| 170 | |
| 171 | dev_dbg(info->keys->dev, "(%s) key =%d using PMIC\n", |
| 172 | pressed ? "pressed" : "released", info->keycode); |
| 173 | |
| 174 | return IRQ_HANDLED; |
| 175 | } |
| 176 | |
| 177 | static int mtk_pmic_key_setup(struct mtk_pmic_keys *keys, |
| 178 | struct mtk_pmic_keys_info *info) |
| 179 | { |
| 180 | int ret; |
| 181 | |
| 182 | info->keys = keys; |
| 183 | |
| 184 | ret = regmap_update_bits(keys->regmap, info->regs->intsel_reg, |
| 185 | info->regs->intsel_mask, |
| 186 | info->regs->intsel_mask); |
| 187 | if (ret < 0) |
| 188 | return ret; |
| 189 | |
| 190 | ret = devm_request_threaded_irq(keys->dev, info->irq, NULL, |
| 191 | mtk_pmic_keys_irq_handler_thread, |
| 192 | IRQF_ONESHOT | IRQF_TRIGGER_HIGH, |
| 193 | "mtk-pmic-keys", info); |
| 194 | if (ret) { |
| 195 | dev_err(keys->dev, "Failed to request IRQ: %d: %d\n", |
| 196 | info->irq, ret); |
| 197 | return ret; |
| 198 | } |
| 199 | |
| 200 | input_set_capability(keys->input_dev, EV_KEY, info->keycode); |
| 201 | |
| 202 | return 0; |
| 203 | } |
| 204 | |
| 205 | static int __maybe_unused mtk_pmic_keys_suspend(struct device *dev) |
| 206 | { |
| 207 | struct mtk_pmic_keys *keys = dev_get_drvdata(dev); |
| 208 | int index; |
| 209 | |
| 210 | for (index = 0; index < MTK_PMIC_MAX_KEY_COUNT; index++) { |
| 211 | if (keys->keys[index].wakeup) |
| 212 | enable_irq_wake(keys->keys[index].irq); |
| 213 | } |
| 214 | |
| 215 | return 0; |
| 216 | } |
| 217 | |
| 218 | static int __maybe_unused mtk_pmic_keys_resume(struct device *dev) |
| 219 | { |
| 220 | struct mtk_pmic_keys *keys = dev_get_drvdata(dev); |
| 221 | int index; |
| 222 | |
| 223 | for (index = 0; index < MTK_PMIC_MAX_KEY_COUNT; index++) { |
| 224 | if (keys->keys[index].wakeup) |
| 225 | disable_irq_wake(keys->keys[index].irq); |
| 226 | } |
| 227 | |
| 228 | return 0; |
| 229 | } |
| 230 | |
| 231 | static SIMPLE_DEV_PM_OPS(mtk_pmic_keys_pm_ops, mtk_pmic_keys_suspend, |
| 232 | mtk_pmic_keys_resume); |
| 233 | |
| 234 | static const struct of_device_id of_mtk_pmic_keys_match_tbl[] = { |
| 235 | { |
| 236 | .compatible = "mediatek,mt6397-keys", |
| 237 | .data = &mt6397_regs, |
| 238 | }, { |
| 239 | .compatible = "mediatek,mt6323-keys", |
| 240 | .data = &mt6323_regs, |
| 241 | }, { |
| 242 | /* sentinel */ |
| 243 | } |
| 244 | }; |
| 245 | MODULE_DEVICE_TABLE(of, of_mtk_pmic_keys_match_tbl); |
| 246 | |
| 247 | static int mtk_pmic_keys_probe(struct platform_device *pdev) |
| 248 | { |
| 249 | int error, index = 0; |
| 250 | unsigned int keycount; |
| 251 | struct mt6397_chip *pmic_chip = dev_get_drvdata(pdev->dev.parent); |
| 252 | struct device_node *node = pdev->dev.of_node, *child; |
| 253 | struct mtk_pmic_keys *keys; |
| 254 | const struct mtk_pmic_regs *mtk_pmic_regs; |
| 255 | struct input_dev *input_dev; |
| 256 | const struct of_device_id *of_id = |
| 257 | of_match_device(of_mtk_pmic_keys_match_tbl, &pdev->dev); |
| 258 | |
| 259 | keys = devm_kzalloc(&pdev->dev, sizeof(*keys), GFP_KERNEL); |
| 260 | if (!keys) |
| 261 | return -ENOMEM; |
| 262 | |
| 263 | keys->dev = &pdev->dev; |
| 264 | keys->regmap = pmic_chip->regmap; |
| 265 | mtk_pmic_regs = of_id->data; |
| 266 | |
| 267 | keys->input_dev = input_dev = devm_input_allocate_device(keys->dev); |
| 268 | if (!input_dev) { |
| 269 | dev_err(keys->dev, "input allocate device fail.\n"); |
| 270 | return -ENOMEM; |
| 271 | } |
| 272 | |
| 273 | input_dev->name = "mtk-pmic-keys"; |
| 274 | input_dev->id.bustype = BUS_HOST; |
| 275 | input_dev->id.vendor = 0x0001; |
| 276 | input_dev->id.product = 0x0001; |
| 277 | input_dev->id.version = 0x0001; |
| 278 | |
| 279 | keycount = of_get_available_child_count(node); |
| 280 | if (keycount > MTK_PMIC_MAX_KEY_COUNT) { |
| 281 | dev_err(keys->dev, "too many keys defined (%d)\n", keycount); |
| 282 | return -EINVAL; |
| 283 | } |
| 284 | |
| 285 | for_each_child_of_node(node, child) { |
| 286 | keys->keys[index].regs = &mtk_pmic_regs->keys_regs[index]; |
| 287 | |
| 288 | keys->keys[index].irq = platform_get_irq(pdev, index); |
| 289 | if (keys->keys[index].irq < 0) |
| 290 | return keys->keys[index].irq; |
| 291 | |
| 292 | error = of_property_read_u32(child, |
| 293 | "linux,keycodes", &keys->keys[index].keycode); |
| 294 | if (error) { |
| 295 | dev_err(keys->dev, |
| 296 | "failed to read key:%d linux,keycode property: %d\n", |
| 297 | index, error); |
| 298 | return error; |
| 299 | } |
| 300 | |
| 301 | if (of_property_read_bool(child, "wakeup-source")) |
| 302 | keys->keys[index].wakeup = true; |
| 303 | |
| 304 | error = mtk_pmic_key_setup(keys, &keys->keys[index]); |
| 305 | if (error) |
| 306 | return error; |
| 307 | |
| 308 | index++; |
| 309 | } |
| 310 | |
| 311 | error = input_register_device(input_dev); |
| 312 | if (error) { |
| 313 | dev_err(&pdev->dev, |
| 314 | "register input device failed (%d)\n", error); |
| 315 | return error; |
| 316 | } |
| 317 | |
| 318 | mtk_pmic_keys_lp_reset_setup(keys, mtk_pmic_regs->pmic_rst_reg); |
| 319 | |
| 320 | platform_set_drvdata(pdev, keys); |
| 321 | |
| 322 | return 0; |
| 323 | } |
| 324 | |
| 325 | static struct platform_driver pmic_keys_pdrv = { |
| 326 | .probe = mtk_pmic_keys_probe, |
| 327 | .driver = { |
| 328 | .name = "mtk-pmic-keys", |
| 329 | .of_match_table = of_mtk_pmic_keys_match_tbl, |
| 330 | .pm = &mtk_pmic_keys_pm_ops, |
| 331 | }, |
| 332 | }; |
| 333 | |
| 334 | module_platform_driver(pmic_keys_pdrv); |
| 335 | |
| 336 | MODULE_LICENSE("GPL v2"); |
| 337 | MODULE_AUTHOR("Chen Zhong <chen.zhong@mediatek.com>"); |
| 338 | MODULE_DESCRIPTION("MTK pmic-keys driver v0.1"); |