blob: ec079cfb7c6afc657f4b5f68dc96b0c47deecbf2 [file] [log] [blame]
James Hogan56330042012-10-09 10:54:32 +01001choice
2 prompt "SoC Type"
3 default META21_FPGA
4
5config META12_FPGA
6 bool "Meta 1.2 FPGA"
7 select METAG_META12
8 help
9 This is a Meta 1.2 FPGA bitstream, just a bare CPU.
10
11config META21_FPGA
12 bool "Meta 2.1 FPGA"
13 select METAG_META21
14 help
15 This is a Meta 2.1 FPGA bitstream, just a bare CPU.
16
17endchoice
18
19menu "SoC configuration"
20
21if METAG_META21
22
23# Meta 2.x specific options
24
25config METAG_META21_MMU
26 bool "Meta 2.x MMU mode"
27 default y
28 help
29 Use the Meta 2.x MMU in extended mode.
30
31config METAG_UNALIGNED
32 bool "Meta 2.x unaligned access checking"
33 default y
34 help
35 All memory accesses will be checked for alignment and an exception
36 raised on unaligned accesses. This feature does cost performance
37 but without it there will be no notification of this type of error.
38
39config METAG_USER_TCM
40 bool "Meta on-chip memory support for userland"
41 select GENERIC_ALLOCATOR
42 default y
43 help
44 Allow the on-chip memories of Meta SoCs to be used by user
45 applications.
46
47endif
48
49config METAG_HALT_ON_PANIC
50 bool "Halt the core on panic"
51 help
52 Halt the core when a panic occurs. This is useful when running
53 pre-production silicon or in an FPGA environment.
54
55endmenu