Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. |
| 3 | * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. |
| 4 | |
| 5 | * This program is free software; you can redistribute it and/or |
| 6 | * modify it under the terms of the GNU General Public |
| 7 | * License as published by the Free Software Foundation; |
| 8 | * either version 2, or (at your option) any later version. |
| 9 | |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even |
| 12 | * the implied warranty of MERCHANTABILITY or FITNESS FOR |
| 13 | * A PARTICULAR PURPOSE.See the GNU General Public License |
| 14 | * for more details. |
| 15 | |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., |
| 19 | * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
| 20 | */ |
Jonathan Corbet | ec66841 | 2010-05-05 14:44:55 -0600 | [diff] [blame] | 21 | #include <linux/via-core.h> |
| 22 | #include <linux/via_i2c.h> |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 23 | #include "global.h" |
| 24 | |
| 25 | static void tmds_register_write(int index, u8 data); |
| 26 | static int tmds_register_read(int index); |
| 27 | static int tmds_register_read_bytes(int index, u8 *buff, int buff_len); |
Florian Tobias Schandinat | f4ab2f7a | 2010-08-09 01:34:27 +0000 | [diff] [blame] | 28 | static void __devinit dvi_get_panel_size_from_DDCv1( |
| 29 | struct tmds_chip_information *tmds_chip, |
| 30 | struct tmds_setting_information *tmds_setting); |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 31 | static int viafb_dvi_query_EDID(void); |
| 32 | |
Florian Tobias Schandinat | cd00b11 | 2011-03-27 03:36:00 +0000 | [diff] [blame] | 33 | static inline bool check_tmds_chip(int device_id_subaddr, int device_id) |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 34 | { |
Florian Tobias Schandinat | cd00b11 | 2011-03-27 03:36:00 +0000 | [diff] [blame] | 35 | return tmds_register_read(device_id_subaddr) == device_id; |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 36 | } |
| 37 | |
Florian Tobias Schandinat | f4ab2f7a | 2010-08-09 01:34:27 +0000 | [diff] [blame] | 38 | void __devinit viafb_init_dvi_size(struct tmds_chip_information *tmds_chip, |
Florian Tobias Schandinat | c5f06f5 | 2010-03-10 15:21:30 -0800 | [diff] [blame] | 39 | struct tmds_setting_information *tmds_setting) |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 40 | { |
| 41 | DEBUG_MSG(KERN_INFO "viafb_init_dvi_size()\n"); |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 42 | |
Florian Tobias Schandinat | c5f06f5 | 2010-03-10 15:21:30 -0800 | [diff] [blame] | 43 | viafb_dvi_sense(); |
Florian Tobias Schandinat | c91faa6 | 2011-03-22 20:33:20 +0000 | [diff] [blame] | 44 | if (viafb_dvi_query_EDID() == 1) |
Florian Tobias Schandinat | c5f06f5 | 2010-03-10 15:21:30 -0800 | [diff] [blame] | 45 | dvi_get_panel_size_from_DDCv1(tmds_chip, tmds_setting); |
Florian Tobias Schandinat | c5f06f5 | 2010-03-10 15:21:30 -0800 | [diff] [blame] | 46 | |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 47 | return; |
| 48 | } |
| 49 | |
Florian Tobias Schandinat | cd00b11 | 2011-03-27 03:36:00 +0000 | [diff] [blame] | 50 | bool __devinit viafb_tmds_trasmitter_identify(void) |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 51 | { |
| 52 | unsigned char sr2a = 0, sr1e = 0, sr3e = 0; |
| 53 | |
| 54 | /* Turn on ouputting pad */ |
| 55 | switch (viaparinfo->chip_info->gfx_chip_name) { |
| 56 | case UNICHROME_K8M890: |
| 57 | /*=* DFP Low Pad on *=*/ |
| 58 | sr2a = viafb_read_reg(VIASR, SR2A); |
| 59 | viafb_write_reg_mask(SR2A, VIASR, 0x03, BIT0 + BIT1); |
| 60 | break; |
| 61 | |
| 62 | case UNICHROME_P4M900: |
| 63 | case UNICHROME_P4M890: |
| 64 | /* DFP Low Pad on */ |
| 65 | sr2a = viafb_read_reg(VIASR, SR2A); |
| 66 | viafb_write_reg_mask(SR2A, VIASR, 0x03, BIT0 + BIT1); |
| 67 | /* DVP0 Pad on */ |
| 68 | sr1e = viafb_read_reg(VIASR, SR1E); |
| 69 | viafb_write_reg_mask(SR1E, VIASR, 0xC0, BIT6 + BIT7); |
| 70 | break; |
| 71 | |
| 72 | default: |
| 73 | /* DVP0/DVP1 Pad on */ |
| 74 | sr1e = viafb_read_reg(VIASR, SR1E); |
| 75 | viafb_write_reg_mask(SR1E, VIASR, 0xF0, BIT4 + |
| 76 | BIT5 + BIT6 + BIT7); |
| 77 | /* SR3E[1]Multi-function selection: |
| 78 | 0 = Emulate I2C and DDC bus by GPIO2/3/4. */ |
| 79 | sr3e = viafb_read_reg(VIASR, SR3E); |
| 80 | viafb_write_reg_mask(SR3E, VIASR, 0x0, BIT5); |
| 81 | break; |
| 82 | } |
| 83 | |
| 84 | /* Check for VT1632: */ |
| 85 | viaparinfo->chip_info->tmds_chip_info.tmds_chip_name = VT1632_TMDS; |
| 86 | viaparinfo->chip_info-> |
| 87 | tmds_chip_info.tmds_chip_slave_addr = VT1632_TMDS_I2C_ADDR; |
Jonathan Corbet | f045f77 | 2009-12-01 20:29:39 -0700 | [diff] [blame] | 88 | viaparinfo->chip_info->tmds_chip_info.i2c_port = VIA_PORT_31; |
Florian Tobias Schandinat | cd00b11 | 2011-03-27 03:36:00 +0000 | [diff] [blame] | 89 | if (check_tmds_chip(VT1632_DEVICE_ID_REG, VT1632_DEVICE_ID)) { |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 90 | /* |
| 91 | * Currently only support 12bits,dual edge,add 24bits mode later |
| 92 | */ |
| 93 | tmds_register_write(0x08, 0x3b); |
| 94 | |
| 95 | DEBUG_MSG(KERN_INFO "\n VT1632 TMDS ! \n"); |
| 96 | DEBUG_MSG(KERN_INFO "\n %2d", |
| 97 | viaparinfo->chip_info->tmds_chip_info.tmds_chip_name); |
| 98 | DEBUG_MSG(KERN_INFO "\n %2d", |
| 99 | viaparinfo->chip_info->tmds_chip_info.i2c_port); |
Florian Tobias Schandinat | cd00b11 | 2011-03-27 03:36:00 +0000 | [diff] [blame] | 100 | return true; |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 101 | } else { |
Jonathan Corbet | f045f77 | 2009-12-01 20:29:39 -0700 | [diff] [blame] | 102 | viaparinfo->chip_info->tmds_chip_info.i2c_port = VIA_PORT_2C; |
Florian Tobias Schandinat | cd00b11 | 2011-03-27 03:36:00 +0000 | [diff] [blame] | 103 | if (check_tmds_chip(VT1632_DEVICE_ID_REG, VT1632_DEVICE_ID)) { |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 104 | tmds_register_write(0x08, 0x3b); |
| 105 | DEBUG_MSG(KERN_INFO "\n VT1632 TMDS ! \n"); |
| 106 | DEBUG_MSG(KERN_INFO "\n %2d", |
| 107 | viaparinfo->chip_info-> |
| 108 | tmds_chip_info.tmds_chip_name); |
| 109 | DEBUG_MSG(KERN_INFO "\n %2d", |
| 110 | viaparinfo->chip_info-> |
| 111 | tmds_chip_info.i2c_port); |
Florian Tobias Schandinat | cd00b11 | 2011-03-27 03:36:00 +0000 | [diff] [blame] | 112 | return true; |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 113 | } |
| 114 | } |
| 115 | |
| 116 | viaparinfo->chip_info->tmds_chip_info.tmds_chip_name = INTEGRATED_TMDS; |
| 117 | |
| 118 | if ((viaparinfo->chip_info->gfx_chip_name == UNICHROME_CX700) && |
| 119 | ((viafb_display_hardware_layout == HW_LAYOUT_DVI_ONLY) || |
| 120 | (viafb_display_hardware_layout == HW_LAYOUT_LCD_DVI))) { |
| 121 | DEBUG_MSG(KERN_INFO "\n Integrated TMDS ! \n"); |
Florian Tobias Schandinat | cd00b11 | 2011-03-27 03:36:00 +0000 | [diff] [blame] | 122 | return true; |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 123 | } |
| 124 | |
| 125 | switch (viaparinfo->chip_info->gfx_chip_name) { |
| 126 | case UNICHROME_K8M890: |
| 127 | viafb_write_reg(SR2A, VIASR, sr2a); |
| 128 | break; |
| 129 | |
| 130 | case UNICHROME_P4M900: |
| 131 | case UNICHROME_P4M890: |
| 132 | viafb_write_reg(SR2A, VIASR, sr2a); |
| 133 | viafb_write_reg(SR1E, VIASR, sr1e); |
| 134 | break; |
| 135 | |
| 136 | default: |
| 137 | viafb_write_reg(SR1E, VIASR, sr1e); |
| 138 | viafb_write_reg(SR3E, VIASR, sr3e); |
| 139 | break; |
| 140 | } |
| 141 | |
| 142 | viaparinfo->chip_info-> |
| 143 | tmds_chip_info.tmds_chip_name = NON_TMDS_TRANSMITTER; |
| 144 | viaparinfo->chip_info->tmds_chip_info. |
| 145 | tmds_chip_slave_addr = VT1632_TMDS_I2C_ADDR; |
Florian Tobias Schandinat | cd00b11 | 2011-03-27 03:36:00 +0000 | [diff] [blame] | 146 | return false; |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 147 | } |
| 148 | |
| 149 | static void tmds_register_write(int index, u8 data) |
| 150 | { |
Harald Welte | 277d32a | 2009-05-23 00:35:39 +0800 | [diff] [blame] | 151 | viafb_i2c_writebyte(viaparinfo->chip_info->tmds_chip_info.i2c_port, |
| 152 | viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr, |
| 153 | index, data); |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 154 | } |
| 155 | |
| 156 | static int tmds_register_read(int index) |
| 157 | { |
| 158 | u8 data; |
| 159 | |
Harald Welte | 277d32a | 2009-05-23 00:35:39 +0800 | [diff] [blame] | 160 | viafb_i2c_readbyte(viaparinfo->chip_info->tmds_chip_info.i2c_port, |
| 161 | (u8) viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr, |
| 162 | (u8) index, &data); |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 163 | return data; |
| 164 | } |
| 165 | |
| 166 | static int tmds_register_read_bytes(int index, u8 *buff, int buff_len) |
| 167 | { |
Harald Welte | 277d32a | 2009-05-23 00:35:39 +0800 | [diff] [blame] | 168 | viafb_i2c_readbytes(viaparinfo->chip_info->tmds_chip_info.i2c_port, |
| 169 | (u8) viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr, |
| 170 | (u8) index, buff, buff_len); |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 171 | return 0; |
| 172 | } |
| 173 | |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 174 | /* DVI Set Mode */ |
Florian Tobias Schandinat | dd73d686 | 2010-03-10 15:21:28 -0800 | [diff] [blame] | 175 | void viafb_dvi_set_mode(struct VideoModeTable *mode, int mode_bpp, |
| 176 | int set_iga) |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 177 | { |
Florian Tobias Schandinat | dd73d686 | 2010-03-10 15:21:28 -0800 | [diff] [blame] | 178 | struct VideoModeTable *rb_mode; |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 179 | struct crt_mode_table *pDviTiming; |
| 180 | unsigned long desirePixelClock, maxPixelClock; |
Florian Tobias Schandinat | dd73d686 | 2010-03-10 15:21:28 -0800 | [diff] [blame] | 181 | pDviTiming = mode->crtc; |
Florian Tobias Schandinat | fd3cc69 | 2011-03-11 00:04:01 +0000 | [diff] [blame] | 182 | desirePixelClock = pDviTiming->refresh_rate |
| 183 | * pDviTiming->crtc.hor_total * pDviTiming->crtc.ver_total |
| 184 | / 1000000; |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 185 | maxPixelClock = (unsigned long)viaparinfo-> |
| 186 | tmds_setting_info->max_pixel_clock; |
| 187 | |
| 188 | DEBUG_MSG(KERN_INFO "\nDVI_set_mode!!\n"); |
| 189 | |
| 190 | if ((maxPixelClock != 0) && (desirePixelClock > maxPixelClock)) { |
Florian Tobias Schandinat | dd73d686 | 2010-03-10 15:21:28 -0800 | [diff] [blame] | 191 | rb_mode = viafb_get_rb_mode(mode->crtc[0].crtc.hor_addr, |
| 192 | mode->crtc[0].crtc.ver_addr); |
| 193 | if (rb_mode) { |
| 194 | mode = rb_mode; |
| 195 | pDviTiming = rb_mode->crtc; |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 196 | } |
| 197 | } |
Florian Tobias Schandinat | dd73d686 | 2010-03-10 15:21:28 -0800 | [diff] [blame] | 198 | viafb_fill_crtc_timing(pDviTiming, mode, mode_bpp / 8, set_iga); |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 199 | } |
| 200 | |
| 201 | /* Sense DVI Connector */ |
| 202 | int viafb_dvi_sense(void) |
| 203 | { |
| 204 | u8 RegSR1E = 0, RegSR3E = 0, RegCR6B = 0, RegCR91 = 0, |
| 205 | RegCR93 = 0, RegCR9B = 0, data; |
| 206 | int ret = false; |
| 207 | |
| 208 | DEBUG_MSG(KERN_INFO "viafb_dvi_sense!!\n"); |
| 209 | |
| 210 | if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) { |
| 211 | /* DI1 Pad on */ |
| 212 | RegSR1E = viafb_read_reg(VIASR, SR1E); |
| 213 | viafb_write_reg(SR1E, VIASR, RegSR1E | 0x30); |
| 214 | |
| 215 | /* CR6B[0]VCK Input Selection: 1 = External clock. */ |
| 216 | RegCR6B = viafb_read_reg(VIACR, CR6B); |
| 217 | viafb_write_reg(CR6B, VIACR, RegCR6B | 0x08); |
| 218 | |
| 219 | /* CR91[4] VDD On [3] Data On [2] VEE On [1] Back Light Off |
| 220 | [0] Software Control Power Sequence */ |
| 221 | RegCR91 = viafb_read_reg(VIACR, CR91); |
| 222 | viafb_write_reg(CR91, VIACR, 0x1D); |
| 223 | |
| 224 | /* CR93[7] DI1 Data Source Selection: 1 = DSP2. |
| 225 | CR93[5] DI1 Clock Source: 1 = internal. |
| 226 | CR93[4] DI1 Clock Polarity. |
| 227 | CR93[3:1] DI1 Clock Adjust. CR93[0] DI1 enable */ |
| 228 | RegCR93 = viafb_read_reg(VIACR, CR93); |
| 229 | viafb_write_reg(CR93, VIACR, 0x01); |
| 230 | } else { |
| 231 | /* DVP0/DVP1 Pad on */ |
| 232 | RegSR1E = viafb_read_reg(VIASR, SR1E); |
| 233 | viafb_write_reg(SR1E, VIASR, RegSR1E | 0xF0); |
| 234 | |
| 235 | /* SR3E[1]Multi-function selection: |
| 236 | 0 = Emulate I2C and DDC bus by GPIO2/3/4. */ |
| 237 | RegSR3E = viafb_read_reg(VIASR, SR3E); |
| 238 | viafb_write_reg(SR3E, VIASR, RegSR3E & (~0x20)); |
| 239 | |
| 240 | /* CR91[4] VDD On [3] Data On [2] VEE On [1] Back Light Off |
| 241 | [0] Software Control Power Sequence */ |
| 242 | RegCR91 = viafb_read_reg(VIACR, CR91); |
| 243 | viafb_write_reg(CR91, VIACR, 0x1D); |
| 244 | |
| 245 | /*CR9B[4] DVP1 Data Source Selection: 1 = From secondary |
| 246 | display.CR9B[2:0] DVP1 Clock Adjust */ |
| 247 | RegCR9B = viafb_read_reg(VIACR, CR9B); |
| 248 | viafb_write_reg(CR9B, VIACR, 0x01); |
| 249 | } |
| 250 | |
| 251 | data = (u8) tmds_register_read(0x09); |
| 252 | if (data & 0x04) |
| 253 | ret = true; |
| 254 | |
| 255 | if (ret == false) { |
| 256 | if (viafb_dvi_query_EDID()) |
| 257 | ret = true; |
| 258 | } |
| 259 | |
| 260 | /* Restore status */ |
| 261 | viafb_write_reg(SR1E, VIASR, RegSR1E); |
| 262 | viafb_write_reg(CR91, VIACR, RegCR91); |
| 263 | if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) { |
| 264 | viafb_write_reg(CR6B, VIACR, RegCR6B); |
| 265 | viafb_write_reg(CR93, VIACR, RegCR93); |
| 266 | } else { |
| 267 | viafb_write_reg(SR3E, VIASR, RegSR3E); |
| 268 | viafb_write_reg(CR9B, VIACR, RegCR9B); |
| 269 | } |
| 270 | |
| 271 | return ret; |
| 272 | } |
| 273 | |
| 274 | /* Query Flat Panel's EDID Table Version Through DVI Connector */ |
| 275 | static int viafb_dvi_query_EDID(void) |
| 276 | { |
| 277 | u8 data0, data1; |
| 278 | int restore; |
| 279 | |
| 280 | DEBUG_MSG(KERN_INFO "viafb_dvi_query_EDID!!\n"); |
| 281 | |
| 282 | restore = viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr; |
| 283 | viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr = 0xA0; |
| 284 | |
| 285 | data0 = (u8) tmds_register_read(0x00); |
| 286 | data1 = (u8) tmds_register_read(0x01); |
| 287 | if ((data0 == 0) && (data1 == 0xFF)) { |
| 288 | viaparinfo->chip_info-> |
| 289 | tmds_chip_info.tmds_chip_slave_addr = restore; |
| 290 | return EDID_VERSION_1; /* Found EDID1 Table */ |
| 291 | } |
| 292 | |
Florian Tobias Schandinat | c91faa6 | 2011-03-22 20:33:20 +0000 | [diff] [blame] | 293 | return false; |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 294 | } |
| 295 | |
Florian Tobias Schandinat | c5f06f5 | 2010-03-10 15:21:30 -0800 | [diff] [blame] | 296 | /* Get Panel Size Using EDID1 Table */ |
Florian Tobias Schandinat | f4ab2f7a | 2010-08-09 01:34:27 +0000 | [diff] [blame] | 297 | static void __devinit dvi_get_panel_size_from_DDCv1( |
| 298 | struct tmds_chip_information *tmds_chip, |
| 299 | struct tmds_setting_information *tmds_setting) |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 300 | { |
Florian Tobias Schandinat | c91faa6 | 2011-03-22 20:33:20 +0000 | [diff] [blame] | 301 | int i, restore; |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 302 | unsigned char EDID_DATA[18]; |
| 303 | |
| 304 | DEBUG_MSG(KERN_INFO "\n dvi_get_panel_size_from_DDCv1 \n"); |
| 305 | |
Florian Tobias Schandinat | c5f06f5 | 2010-03-10 15:21:30 -0800 | [diff] [blame] | 306 | restore = tmds_chip->tmds_chip_slave_addr; |
| 307 | tmds_chip->tmds_chip_slave_addr = 0xA0; |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 308 | for (i = 0x25; i < 0x6D; i++) { |
| 309 | switch (i) { |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 310 | case 0x36: |
| 311 | case 0x48: |
| 312 | case 0x5A: |
| 313 | case 0x6C: |
| 314 | tmds_register_read_bytes(i, EDID_DATA, 10); |
| 315 | if (!(EDID_DATA[0] || EDID_DATA[1])) { |
| 316 | /* The first two byte must be zero. */ |
| 317 | if (EDID_DATA[3] == 0xFD) { |
| 318 | /* To get max pixel clock. */ |
Florian Tobias Schandinat | c5f06f5 | 2010-03-10 15:21:30 -0800 | [diff] [blame] | 319 | tmds_setting->max_pixel_clock = |
| 320 | EDID_DATA[9] * 10; |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 321 | } |
| 322 | } |
| 323 | break; |
| 324 | |
| 325 | default: |
| 326 | break; |
| 327 | } |
| 328 | } |
| 329 | |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 330 | DEBUG_MSG(KERN_INFO "DVI max pixelclock = %d\n", |
Florian Tobias Schandinat | c5f06f5 | 2010-03-10 15:21:30 -0800 | [diff] [blame] | 331 | tmds_setting->max_pixel_clock); |
| 332 | tmds_chip->tmds_chip_slave_addr = restore; |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 333 | } |
| 334 | |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 335 | /* If Disable DVI, turn off pad */ |
| 336 | void viafb_dvi_disable(void) |
| 337 | { |
| 338 | if (viaparinfo->chip_info-> |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 339 | tmds_chip_info.output_interface == INTERFACE_TMDS) |
| 340 | /* Turn off TMDS power. */ |
| 341 | viafb_write_reg(CRD2, VIACR, |
| 342 | viafb_read_reg(VIACR, CRD2) | 0x08); |
| 343 | } |
| 344 | |
Florian Tobias Schandinat | cd7e910 | 2010-08-11 22:22:54 +0000 | [diff] [blame] | 345 | static void dvi_patch_skew_dvp0(void) |
| 346 | { |
| 347 | /* Reset data driving first: */ |
| 348 | viafb_write_reg_mask(SR1B, VIASR, 0, BIT1); |
| 349 | viafb_write_reg_mask(SR2A, VIASR, 0, BIT4); |
| 350 | |
| 351 | switch (viaparinfo->chip_info->gfx_chip_name) { |
| 352 | case UNICHROME_P4M890: |
| 353 | { |
| 354 | if ((viaparinfo->tmds_setting_info->h_active == 1600) && |
| 355 | (viaparinfo->tmds_setting_info->v_active == |
| 356 | 1200)) |
| 357 | viafb_write_reg_mask(CR96, VIACR, 0x03, |
| 358 | BIT0 + BIT1 + BIT2); |
| 359 | else |
| 360 | viafb_write_reg_mask(CR96, VIACR, 0x07, |
| 361 | BIT0 + BIT1 + BIT2); |
| 362 | break; |
| 363 | } |
| 364 | |
| 365 | case UNICHROME_P4M900: |
| 366 | { |
| 367 | viafb_write_reg_mask(CR96, VIACR, 0x07, |
| 368 | BIT0 + BIT1 + BIT2 + BIT3); |
| 369 | viafb_write_reg_mask(SR1B, VIASR, 0x02, BIT1); |
| 370 | viafb_write_reg_mask(SR2A, VIASR, 0x10, BIT4); |
| 371 | break; |
| 372 | } |
| 373 | |
| 374 | default: |
| 375 | { |
| 376 | break; |
| 377 | } |
| 378 | } |
| 379 | } |
| 380 | |
| 381 | static void dvi_patch_skew_dvp_low(void) |
| 382 | { |
| 383 | switch (viaparinfo->chip_info->gfx_chip_name) { |
| 384 | case UNICHROME_K8M890: |
| 385 | { |
| 386 | viafb_write_reg_mask(CR99, VIACR, 0x03, BIT0 + BIT1); |
| 387 | break; |
| 388 | } |
| 389 | |
| 390 | case UNICHROME_P4M900: |
| 391 | { |
| 392 | viafb_write_reg_mask(CR99, VIACR, 0x08, |
| 393 | BIT0 + BIT1 + BIT2 + BIT3); |
| 394 | break; |
| 395 | } |
| 396 | |
| 397 | case UNICHROME_P4M890: |
| 398 | { |
| 399 | viafb_write_reg_mask(CR99, VIACR, 0x0F, |
| 400 | BIT0 + BIT1 + BIT2 + BIT3); |
| 401 | break; |
| 402 | } |
| 403 | |
| 404 | default: |
| 405 | { |
| 406 | break; |
| 407 | } |
| 408 | } |
| 409 | } |
| 410 | |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 411 | /* If Enable DVI, turn off pad */ |
| 412 | void viafb_dvi_enable(void) |
| 413 | { |
| 414 | u8 data; |
| 415 | |
Florian Tobias Schandinat | cd7e910 | 2010-08-11 22:22:54 +0000 | [diff] [blame] | 416 | switch (viaparinfo->chip_info->tmds_chip_info.output_interface) { |
| 417 | case INTERFACE_DVP0: |
| 418 | viafb_write_reg_mask(CR6B, VIACR, 0x01, BIT0); |
| 419 | viafb_write_reg_mask(CR6C, VIACR, 0x21, BIT0 + BIT5); |
Florian Tobias Schandinat | cd7e910 | 2010-08-11 22:22:54 +0000 | [diff] [blame] | 420 | dvi_patch_skew_dvp0(); |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 421 | if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) |
| 422 | tmds_register_write(0x88, 0x3b); |
| 423 | else |
| 424 | /*clear CR91[5] to direct on display period |
| 425 | in the secondary diplay path */ |
Florian Tobias Schandinat | cd7e910 | 2010-08-11 22:22:54 +0000 | [diff] [blame] | 426 | via_write_reg_mask(VIACR, 0x91, 0x00, 0x20); |
| 427 | break; |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 428 | |
Florian Tobias Schandinat | cd7e910 | 2010-08-11 22:22:54 +0000 | [diff] [blame] | 429 | case INTERFACE_DVP1: |
| 430 | if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) |
| 431 | viafb_write_reg_mask(CR93, VIACR, 0x21, BIT0 + BIT5); |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 432 | |
| 433 | /*fix dvi cann't be enabled with MB VT5718C4 - Al Zhang */ |
Florian Tobias Schandinat | cd7e910 | 2010-08-11 22:22:54 +0000 | [diff] [blame] | 434 | if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 435 | tmds_register_write(0x88, 0x3b); |
Florian Tobias Schandinat | cd7e910 | 2010-08-11 22:22:54 +0000 | [diff] [blame] | 436 | else |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 437 | /*clear CR91[5] to direct on display period |
| 438 | in the secondary diplay path */ |
Florian Tobias Schandinat | cd7e910 | 2010-08-11 22:22:54 +0000 | [diff] [blame] | 439 | via_write_reg_mask(VIACR, 0x91, 0x00, 0x20); |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 440 | |
| 441 | /*fix DVI cannot enable on EPIA-M board */ |
| 442 | if (viafb_platform_epia_dvi == 1) { |
| 443 | viafb_write_reg_mask(CR91, VIACR, 0x1f, 0x1f); |
| 444 | viafb_write_reg_mask(CR88, VIACR, 0x00, BIT6 + BIT0); |
| 445 | if (viafb_bus_width == 24) { |
| 446 | if (viafb_device_lcd_dualedge == 1) |
| 447 | data = 0x3F; |
| 448 | else |
| 449 | data = 0x37; |
| 450 | viafb_i2c_writebyte(viaparinfo->chip_info-> |
Florian Tobias Schandinat | cd7e910 | 2010-08-11 22:22:54 +0000 | [diff] [blame] | 451 | tmds_chip_info.i2c_port, |
| 452 | viaparinfo->chip_info-> |
| 453 | tmds_chip_info.tmds_chip_slave_addr, |
| 454 | 0x08, data); |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 455 | } |
| 456 | } |
Florian Tobias Schandinat | cd7e910 | 2010-08-11 22:22:54 +0000 | [diff] [blame] | 457 | break; |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 458 | |
Florian Tobias Schandinat | cd7e910 | 2010-08-11 22:22:54 +0000 | [diff] [blame] | 459 | case INTERFACE_DFP_HIGH: |
| 460 | if (viaparinfo->chip_info->gfx_chip_name != UNICHROME_CLE266) |
| 461 | via_write_reg_mask(VIACR, CR97, 0x03, 0x03); |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 462 | |
Florian Tobias Schandinat | cd7e910 | 2010-08-11 22:22:54 +0000 | [diff] [blame] | 463 | via_write_reg_mask(VIACR, 0x91, 0x00, 0x20); |
| 464 | break; |
| 465 | |
| 466 | case INTERFACE_DFP_LOW: |
| 467 | if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) |
| 468 | break; |
Florian Tobias Schandinat | 6f9422d | 2010-09-07 14:28:26 +0000 | [diff] [blame] | 469 | |
Florian Tobias Schandinat | cd7e910 | 2010-08-11 22:22:54 +0000 | [diff] [blame] | 470 | dvi_patch_skew_dvp_low(); |
| 471 | via_write_reg_mask(VIACR, 0x91, 0x00, 0x20); |
| 472 | break; |
| 473 | |
| 474 | case INTERFACE_TMDS: |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 475 | /* Turn on Display period in the panel path. */ |
| 476 | viafb_write_reg_mask(CR91, VIACR, 0, BIT7); |
| 477 | |
| 478 | /* Turn on TMDS power. */ |
| 479 | viafb_write_reg_mask(CRD2, VIACR, 0, BIT3); |
Florian Tobias Schandinat | cd7e910 | 2010-08-11 22:22:54 +0000 | [diff] [blame] | 480 | break; |
| 481 | } |
| 482 | |
| 483 | if (viaparinfo->tmds_setting_info->iga_path == IGA2) { |
| 484 | /* Disable LCD Scaling */ |
| 485 | viafb_write_reg_mask(CR79, VIACR, 0x00, BIT0); |
Joseph Chan | c09c782 | 2008-10-15 22:03:23 -0700 | [diff] [blame] | 486 | } |
| 487 | } |