| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/virtio/pci-iommu.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: virtio-iommu device using the virtio-pci transport |
| |
| maintainers: |
| - Jean-Philippe Brucker <jean-philippe@linaro.org> |
| |
| description: | |
| When virtio-iommu uses the PCI transport, its programming interface is |
| discovered dynamically by the PCI probing infrastructure. However the |
| device tree statically describes the relation between IOMMU and DMA |
| masters. Therefore, the PCI root complex that hosts the virtio-iommu |
| contains a child node representing the IOMMU device explicitly. |
| |
| DMA from the IOMMU device isn't managed by another IOMMU. Therefore the |
| virtio-iommu node doesn't have an "iommus" property, and is omitted from |
| the iommu-map property of the root complex. |
| |
| properties: |
| # If compatible is present, it should contain the vendor and device ID |
| # according to the PCI Bus Binding specification. Since PCI provides |
| # built-in identification methods, compatible is not actually required. |
| compatible: |
| oneOf: |
| - items: |
| - const: virtio,pci-iommu |
| - const: pci1af4,1057 |
| - items: |
| - const: pci1af4,1057 |
| |
| reg: |
| description: | |
| PCI address of the IOMMU. As defined in the PCI Bus Binding |
| reference, the reg property is a five-cell address encoded as (phys.hi |
| phys.mid phys.lo size.hi size.lo). phys.hi should contain the device's |
| BDF as 0b00000000 bbbbbbbb dddddfff 00000000. The other cells should be |
| zero. See Documentation/devicetree/bindings/pci/pci.txt |
| |
| '#iommu-cells': |
| const: 1 |
| |
| required: |
| - compatible |
| - reg |
| - '#iommu-cells' |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| bus { |
| #address-cells = <2>; |
| #size-cells = <2>; |
| |
| pcie@40000000 { |
| device_type = "pci"; |
| #address-cells = <3>; |
| #size-cells = <2>; |
| reg = <0x0 0x40000000 0x0 0x1000000>; |
| ranges = <0x02000000 0x0 0x41000000 0x0 0x41000000 0x0 0x0f000000>; |
| |
| /* |
| * The IOMMU manages all functions in this PCI domain except |
| * itself. Omit BDF 00:01.0. |
| */ |
| iommu-map = <0x0 &iommu0 0x0 0x8 |
| 0x9 &iommu0 0x9 0xfff7>; |
| |
| /* The IOMMU programming interface uses slot 00:01.0 */ |
| iommu0: iommu@1,0 { |
| compatible = "pci1af4,1057"; |
| reg = <0x800 0 0 0 0>; |
| #iommu-cells = <1>; |
| }; |
| }; |
| |
| pcie@50000000 { |
| device_type = "pci"; |
| #address-cells = <3>; |
| #size-cells = <2>; |
| reg = <0x0 0x50000000 0x0 0x1000000>; |
| ranges = <0x02000000 0x0 0x51000000 0x0 0x51000000 0x0 0x0f000000>; |
| |
| /* |
| * The IOMMU also manages all functions from this domain, |
| * with endpoint IDs 0x10000 - 0x1ffff |
| */ |
| iommu-map = <0x0 &iommu0 0x10000 0x10000>; |
| }; |
| |
| ethernet { |
| /* The IOMMU manages this platform device with endpoint ID 0x20000 */ |
| iommus = <&iommu0 0x20000>; |
| }; |
| }; |
| |
| ... |
