blob: 69be95afd56277b6f12053143a1a41436186915b [file] [log] [blame]
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-dc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NVIDIA Tegra Display Controller
maintainers:
- Thierry Reding <thierry.reding@gmail.com>
- Jon Hunter <jonathanh@nvidia.com>
properties:
$nodename:
pattern: "^dc@[0-9a-f]+$"
compatible:
oneOf:
- enum:
- nvidia,tegra20-dc
- nvidia,tegra30-dc
- nvidia,tegra114-dc
- nvidia,tegra124-dc
- nvidia,tegra210-dc
- items:
- const: nvidia,tegra124-dc
- const: nvidia,tegra132-dc
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
minItems: 1
items:
- description: display controller pixel clock
- description: parent clock # optional
clock-names:
minItems: 1
items:
- const: dc
- const: parent # optional
resets:
items:
- description: module reset
reset-names:
items:
- const: dc
interconnect-names: true
interconnects: true
iommus:
maxItems: 1
operating-points-v2: true
power-domains:
items:
- description: phandle to the core power domain
memory-region: true
nvidia,head:
$ref: /schemas/types.yaml#/definitions/uint32
description: The number of the display controller head. This is used to setup the various
types of output to receive video data from the given head.
nvidia,outputs:
$ref: /schemas/types.yaml#/definitions/phandle-array
description: A list of phandles of outputs that this display controller can drive.
rgb:
type: object
allOf:
- if:
properties:
compatible:
contains:
enum:
- nvidia,tegra20-dc
- nvidia,tegra30-dc
- nvidia,tegra114-dc
then:
properties:
interconnects:
items:
- description: window A memory client
- description: window B memory client
- description: window B memory client (vertical filter)
- description: window C memory client
- description: cursor memory client
interconnect-names:
items:
- const: wina
- const: winb
- const: winb-vfilter
- const: winc
- const: cursor
rgb:
description: Each display controller node has a child node, named "rgb", that represents
the RGB output associated with the controller.
type: object
properties:
nvidia,ddc-i2c-bus:
$ref: /schemas/types.yaml#/definitions/phandle
description: phandle of an I2C controller used for DDC EDID probing
nvidia,hpd-gpio:
description: specifies a GPIO used for hotplug detection
maxItems: 1
nvidia,edid:
$ref: /schemas/types.yaml#/definitions/uint8-array
description: supplies a binary EDID blob
nvidia,panel:
$ref: /schemas/types.yaml#/definitions/phandle
description: phandle of a display panel
- if:
properties:
compatible:
contains:
enum:
- nvidia,tegra124-dc
then:
properties:
interconnects:
minItems: 4
items:
- description: window A memory client
- description: window B memory client
- description: window C memory client
- description: cursor memory client
- description: window D memory client
- description: window T memory client
interconnect-names:
minItems: 4
items:
- const: wina
- const: winb
- const: winc
- const: cursor
- const: wind
- const: wint
additionalProperties: false
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
- resets
- reset-names
examples:
- |
#include <dt-bindings/clock/tegra20-car.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
dc@54200000 {
compatible = "nvidia,tegra20-dc";
reg = <0x54200000 0x00040000>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_DISP1>;
clock-names = "dc";
resets = <&tegra_car 27>;
reset-names = "dc";
};