| [ |
| { |
| "BriefDescription": "Core cycles where the core was running in a manner where Turbo may be clipped to the Non-AVX turbo schedule.", |
| "EventCode": "0x28", |
| "EventName": "CORE_POWER.LVL0_TURBO_LICENSE", |
| "PublicDescription": "Counts Core cycles where the core was running with power-delivery for baseline license level 0. This includes non-AVX codes, SSE, AVX 128-bit, and low-current AVX 256-bit codes.", |
| "SampleAfterValue": "200003", |
| "UMask": "0x7" |
| }, |
| { |
| "BriefDescription": "Core cycles where the core was running in a manner where Turbo may be clipped to the AVX2 turbo schedule.", |
| "EventCode": "0x28", |
| "EventName": "CORE_POWER.LVL1_TURBO_LICENSE", |
| "PublicDescription": "Counts Core cycles where the core was running with power-delivery for license level 1. This includes high current AVX 256-bit instructions as well as low current AVX 512-bit instructions.", |
| "SampleAfterValue": "200003", |
| "UMask": "0x18" |
| }, |
| { |
| "BriefDescription": "Core cycles where the core was running in a manner where Turbo may be clipped to the AVX512 turbo schedule.", |
| "EventCode": "0x28", |
| "EventName": "CORE_POWER.LVL2_TURBO_LICENSE", |
| "PublicDescription": "Core cycles where the core was running with power-delivery for license level 2 (introduced in Skylake Server microarchtecture). This includes high current AVX 512-bit instructions.", |
| "SampleAfterValue": "200003", |
| "UMask": "0x20" |
| }, |
| { |
| "BriefDescription": "Counts streaming stores that have any type of response.", |
| "EventCode": "0xB7, 0xBB", |
| "EventName": "OCR.STREAMING_WR.ANY_RESPONSE", |
| "MSRIndex": "0x1a6,0x1a7", |
| "MSRValue": "0x10800", |
| "SampleAfterValue": "100003", |
| "UMask": "0x1" |
| } |
| ] |
