| // SPDX-License-Identifier: GPL-2.0 |
| /* |
| * Device Tree Source for the Condor board |
| * |
| * Copyright (C) 2018 Renesas Electronics Corp. |
| * Copyright (C) 2018 Cogent Embedded, Inc. |
| */ |
| |
| /dts-v1/; |
| #include "r8a77980.dtsi" |
| |
| / { |
| model = "Renesas Condor board based on r8a77980"; |
| compatible = "renesas,condor", "renesas,r8a77980"; |
| |
| aliases { |
| serial0 = &scif0; |
| ethernet0 = &avb; |
| }; |
| |
| chosen { |
| stdout-path = "serial0:115200n8"; |
| }; |
| |
| memory@48000000 { |
| device_type = "memory"; |
| /* first 128MB is reserved for secure area. */ |
| reg = <0 0x48000000 0 0x78000000>; |
| }; |
| |
| d3_3v: regulator-0 { |
| compatible = "regulator-fixed"; |
| regulator-name = "D3.3V"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| vddq_vin01: regulator-1 { |
| compatible = "regulator-fixed"; |
| regulator-name = "VDDQ_VIN01"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| }; |
| |
| &avb { |
| pinctrl-0 = <&avb_pins>; |
| pinctrl-names = "default"; |
| |
| phy-mode = "rgmii-id"; |
| phy-handle = <&phy0>; |
| renesas,no-ether-link; |
| status = "okay"; |
| |
| phy0: ethernet-phy@0 { |
| rxc-skew-ps = <1500>; |
| reg = <0>; |
| interrupt-parent = <&gpio1>; |
| interrupts = <17 IRQ_TYPE_LEVEL_LOW>; |
| }; |
| }; |
| |
| &canfd { |
| pinctrl-0 = <&canfd0_pins>; |
| pinctrl-names = "default"; |
| status = "okay"; |
| |
| channel0 { |
| status = "okay"; |
| }; |
| }; |
| |
| &extal_clk { |
| clock-frequency = <16666666>; |
| }; |
| |
| &extalr_clk { |
| clock-frequency = <32768>; |
| }; |
| |
| &i2c0 { |
| pinctrl-0 = <&i2c0_pins>; |
| pinctrl-names = "default"; |
| |
| status = "okay"; |
| clock-frequency = <400000>; |
| |
| io_expander0: gpio@20 { |
| compatible = "onnn,pca9654"; |
| reg = <0x20>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| |
| io_expander1: gpio@21 { |
| compatible = "onnn,pca9654"; |
| reg = <0x21>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| }; |
| |
| &mmc0 { |
| pinctrl-0 = <&mmc_pins>; |
| pinctrl-1 = <&mmc_pins_uhs>; |
| pinctrl-names = "default", "state_uhs"; |
| |
| vmmc-supply = <&d3_3v>; |
| vqmmc-supply = <&vddq_vin01>; |
| mmc-hs200-1_8v; |
| bus-width = <8>; |
| non-removable; |
| status = "okay"; |
| }; |
| |
| &pfc { |
| avb_pins: avb { |
| groups = "avb_mdio", "avb_rgmii"; |
| function = "avb"; |
| }; |
| |
| canfd0_pins: canfd0 { |
| groups = "canfd0_data_a"; |
| function = "canfd0"; |
| }; |
| |
| i2c0_pins: i2c0 { |
| groups = "i2c0"; |
| function = "i2c0"; |
| }; |
| |
| mmc_pins: mmc { |
| groups = "mmc_data8", "mmc_ctrl", "mmc_ds"; |
| function = "mmc"; |
| power-source = <3300>; |
| }; |
| |
| mmc_pins_uhs: mmc_uhs { |
| groups = "mmc_data8", "mmc_ctrl", "mmc_ds"; |
| function = "mmc"; |
| power-source = <1800>; |
| }; |
| |
| scif0_pins: scif0 { |
| groups = "scif0_data"; |
| function = "scif0"; |
| }; |
| |
| scif_clk_pins: scif_clk { |
| groups = "scif_clk_b"; |
| function = "scif_clk"; |
| }; |
| }; |
| |
| &scif0 { |
| pinctrl-0 = <&scif0_pins>, <&scif_clk_pins>; |
| pinctrl-names = "default"; |
| |
| status = "okay"; |
| }; |
| |
| &scif_clk { |
| clock-frequency = <14745600>; |
| }; |