arch/arm/boot/dts/socfpga_arria10_socdk_qspi.dts

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2016 Intel. All rights reserved.
 */

/dts-v1/;
#include "socfpga_arria10_socdk.dtsi"

&qspi {
	status = "okay";

	flash0: n25q00@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "n25q00aa";
		reg = <0>;
		spi-max-frequency = <100000000>;

		m25p,fast-read;
		cdns,page-size = <256>;
		cdns,block-size = <16>;
		cdns,read-delay = <4>;
		cdns,tshsl-ns = <50>;
		cdns,tsd2d-ns = <50>;
		cdns,tchsh-ns = <4>;
		cdns,tslch-ns = <4>;

		partition@qspi-boot {
			label = "Boot and fpga data";
			reg = <0x0 0x2720000>;
		};

		partition@qspi-rootfs {
			label = "Root Filesystem - JFFS2";
			reg = <0x2720000 0x58E0000>;
		};
	};
};