| * Nuvoton NPCM7XX Clock Controller |
| |
| Nuvoton Poleg BMC NPCM7XX contains an integrated clock controller, which |
| generates and supplies clocks to all modules within the BMC. |
| |
| External clocks: |
| |
| There are six fixed clocks that are generated outside the BMC. All clocks are of |
| a known fixed value that cannot be changed. clk_refclk, clk_mcbypck and |
| clk_sysbypck are inputs to the clock controller. |
| clk_rg1refck, clk_rg2refck and clk_xin are external clocks suppling the |
| network. They are set on the device tree, but not used by the clock module. The |
| network devices use them directly. |
| Example can be found below. |
| |
| All available clocks are defined as preprocessor macros in: |
| dt-bindings/clock/nuvoton,npcm7xx-clock.h |
| and can be reused as DT sources. |
| |
| Required Properties of clock controller: |
| |
| - compatible: "nuvoton,npcm750-clk" : for clock controller of Nuvoton |
| Poleg BMC NPCM750 |
| |
| - reg: physical base address of the clock controller and length of |
| memory mapped region. |
| |
| - #clock-cells: should be 1. |
| |
| Example: Clock controller node: |
| |
| clk: clock-controller@f0801000 { |
| compatible = "nuvoton,npcm750-clk"; |
| #clock-cells = <1>; |
| reg = <0xf0801000 0x1000>; |
| clock-names = "refclk", "sysbypck", "mcbypck"; |
| clocks = <&clk_refclk>, <&clk_sysbypck>, <&clk_mcbypck>; |
| }; |
| |
| Example: Required external clocks for network: |
| |
| /* external reference clock */ |
| clk_refclk: clk-refclk { |
| compatible = "fixed-clock"; |
| #clock-cells = <0>; |
| clock-frequency = <25000000>; |
| clock-output-names = "refclk"; |
| }; |
| |
| /* external reference clock for cpu. float in normal operation */ |
| clk_sysbypck: clk-sysbypck { |
| compatible = "fixed-clock"; |
| #clock-cells = <0>; |
| clock-frequency = <800000000>; |
| clock-output-names = "sysbypck"; |
| }; |
| |
| /* external reference clock for MC. float in normal operation */ |
| clk_mcbypck: clk-mcbypck { |
| compatible = "fixed-clock"; |
| #clock-cells = <0>; |
| clock-frequency = <800000000>; |
| clock-output-names = "mcbypck"; |
| }; |
| |
| /* external clock signal rg1refck, supplied by the phy */ |
| clk_rg1refck: clk-rg1refck { |
| compatible = "fixed-clock"; |
| #clock-cells = <0>; |
| clock-frequency = <125000000>; |
| clock-output-names = "clk_rg1refck"; |
| }; |
| |
| /* external clock signal rg2refck, supplied by the phy */ |
| clk_rg2refck: clk-rg2refck { |
| compatible = "fixed-clock"; |
| #clock-cells = <0>; |
| clock-frequency = <125000000>; |
| clock-output-names = "clk_rg2refck"; |
| }; |
| |
| clk_xin: clk-xin { |
| compatible = "fixed-clock"; |
| #clock-cells = <0>; |
| clock-frequency = <50000000>; |
| clock-output-names = "clk_xin"; |
| }; |
| |
| |
| Example: GMAC controller node that consumes two clocks: a generated clk by the |
| clock controller and a fixed clock from DT (clk_rg1refck). |
| |
| ethernet0: ethernet@f0802000 { |
| compatible = "snps,dwmac"; |
| reg = <0xf0802000 0x2000>; |
| interrupts = <0 14 4>; |
| interrupt-names = "macirq"; |
| clocks = <&clk_rg1refck>, <&clk NPCM7XX_CLK_AHB>; |
| clock-names = "stmmaceth", "clk_gmac"; |
| }; |