blob: f518b4744ff893282c45ec93746a40ffa7e9eda8 [file] [log] [blame]
# SPDX-License-Identifier: GPL-2.0
menu "Host processor type and features"
source "arch/x86/Kconfig.cpu"
endmenu
config UML_X86
def_bool y
select GENERIC_FIND_FIRST_BIT
config 64BIT
bool "64-bit kernel" if "$(SUBARCH)" = "x86"
default "$(SUBARCH)" != "i386"
config X86_32
def_bool !64BIT
select HAVE_AOUT
select ARCH_WANT_IPC_PARSE_VERSION
select MODULES_USE_ELF_REL
select CLONE_BACKWARDS
select OLD_SIGSUSPEND3
select OLD_SIGACTION
config X86_64
def_bool 64BIT
select MODULES_USE_ELF_RELA
config ARCH_DEFCONFIG
string
default "arch/um/configs/i386_defconfig" if X86_32
default "arch/um/configs/x86_64_defconfig" if X86_64
config RWSEM_XCHGADD_ALGORITHM
def_bool 64BIT
config RWSEM_GENERIC_SPINLOCK
def_bool !RWSEM_XCHGADD_ALGORITHM
config 3_LEVEL_PGTABLES
bool "Three-level pagetables" if !64BIT
default 64BIT
help
Three-level pagetables will let UML have more than 4G of physical
memory. All the memory that can't be mapped directly will be treated
as high memory.
However, this it experimental on 32-bit architectures, so if unsure say
N (on x86-64 it's automatically enabled, instead, as it's safe there).
config ARCH_HAS_SC_SIGNALS
def_bool !64BIT
config ARCH_REUSE_HOST_VSYSCALL_AREA
def_bool !64BIT
config GENERIC_HWEIGHT
def_bool y