| // SPDX-License-Identifier: GPL-2.0+ |
| /* |
| * dts file for Xilinx ZynqMP ZC1254 |
| * |
| * (C) Copyright 2015 - 2018, Xilinx, Inc. |
| * |
| * Michal Simek <michal.simek@xilinx.com> |
| * Siva Durga Prasad Paladugu <sivadur@xilinx.com> |
| */ |
| |
| /dts-v1/; |
| |
| #include "zynqmp.dtsi" |
| #include "zynqmp-clk.dtsi" |
| |
| / { |
| model = "ZynqMP ZC1254 RevA"; |
| compatible = "xlnx,zynqmp-zc1254-revA", "xlnx,zynqmp-zc1254", "xlnx,zynqmp"; |
| |
| aliases { |
| serial0 = &uart0; |
| serial1 = &dcc; |
| }; |
| |
| chosen { |
| bootargs = "earlycon"; |
| stdout-path = "serial0:115200n8"; |
| }; |
| |
| memory@0 { |
| device_type = "memory"; |
| reg = <0x0 0x0 0x0 0x80000000>; |
| }; |
| }; |
| |
| &dcc { |
| status = "okay"; |
| }; |
| |
| &uart0 { |
| status = "okay"; |
| }; |