| // SPDX-License-Identifier: (GPL-2.0 OR MIT) |
| /* |
| * Copyright (c) 2018 MediaTek Inc. |
| * Author: Ben Ho <ben.ho@mediatek.com> |
| * Erin Lo <erin.lo@mediatek.com> |
| */ |
| |
| /dts-v1/; |
| #include "mt8183.dtsi" |
| |
| / { |
| model = "MediaTek MT8183 evaluation board"; |
| compatible = "mediatek,mt8183-evb", "mediatek,mt8183"; |
| |
| aliases { |
| serial0 = &uart0; |
| }; |
| |
| memory@40000000 { |
| device_type = "memory"; |
| reg = <0 0x40000000 0 0x80000000>; |
| }; |
| |
| chosen { |
| stdout-path = "serial0:921600n8"; |
| }; |
| }; |
| |
| &auxadc { |
| status = "okay"; |
| }; |
| |
| &pio { |
| spi_pins_0: spi0{ |
| pins_spi{ |
| pinmux = <PINMUX_GPIO85__FUNC_SPI0_MI>, |
| <PINMUX_GPIO86__FUNC_SPI0_CSB>, |
| <PINMUX_GPIO87__FUNC_SPI0_MO>, |
| <PINMUX_GPIO88__FUNC_SPI0_CLK>; |
| bias-disable; |
| }; |
| }; |
| |
| spi_pins_1: spi1{ |
| pins_spi{ |
| pinmux = <PINMUX_GPIO161__FUNC_SPI1_A_MI>, |
| <PINMUX_GPIO162__FUNC_SPI1_A_CSB>, |
| <PINMUX_GPIO163__FUNC_SPI1_A_MO>, |
| <PINMUX_GPIO164__FUNC_SPI1_A_CLK>; |
| bias-disable; |
| }; |
| }; |
| |
| spi_pins_2: spi2{ |
| pins_spi{ |
| pinmux = <PINMUX_GPIO0__FUNC_SPI2_CSB>, |
| <PINMUX_GPIO1__FUNC_SPI2_MO>, |
| <PINMUX_GPIO2__FUNC_SPI2_CLK>, |
| <PINMUX_GPIO94__FUNC_SPI2_MI>; |
| bias-disable; |
| }; |
| }; |
| |
| spi_pins_3: spi3{ |
| pins_spi{ |
| pinmux = <PINMUX_GPIO21__FUNC_SPI3_MI>, |
| <PINMUX_GPIO22__FUNC_SPI3_CSB>, |
| <PINMUX_GPIO23__FUNC_SPI3_MO>, |
| <PINMUX_GPIO24__FUNC_SPI3_CLK>; |
| bias-disable; |
| }; |
| }; |
| |
| spi_pins_4: spi4{ |
| pins_spi{ |
| pinmux = <PINMUX_GPIO17__FUNC_SPI4_MI>, |
| <PINMUX_GPIO18__FUNC_SPI4_CSB>, |
| <PINMUX_GPIO19__FUNC_SPI4_MO>, |
| <PINMUX_GPIO20__FUNC_SPI4_CLK>; |
| bias-disable; |
| }; |
| }; |
| |
| spi_pins_5: spi5{ |
| pins_spi{ |
| pinmux = <PINMUX_GPIO13__FUNC_SPI5_MI>, |
| <PINMUX_GPIO14__FUNC_SPI5_CSB>, |
| <PINMUX_GPIO15__FUNC_SPI5_MO>, |
| <PINMUX_GPIO16__FUNC_SPI5_CLK>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| &spi0 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&spi_pins_0>; |
| mediatek,pad-select = <0>; |
| status = "okay"; |
| }; |
| |
| &spi1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&spi_pins_1>; |
| mediatek,pad-select = <0>; |
| status = "okay"; |
| }; |
| |
| &spi2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&spi_pins_2>; |
| mediatek,pad-select = <0>; |
| status = "okay"; |
| }; |
| |
| &spi3 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&spi_pins_3>; |
| mediatek,pad-select = <0>; |
| status = "okay"; |
| }; |
| |
| &spi4 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&spi_pins_4>; |
| mediatek,pad-select = <0>; |
| status = "okay"; |
| }; |
| |
| &spi5 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&spi_pins_5>; |
| mediatek,pad-select = <0>; |
| status = "okay"; |
| |
| }; |
| |
| &uart0 { |
| status = "okay"; |
| }; |