| Vivante GPU core devices |
| ======================== |
| |
| Required properties: |
| - compatible: Should be "vivante,gc" |
| A more specific compatible is not needed, as the cores contain chip |
| identification registers at fixed locations, which provide all the |
| necessary information to the driver. |
| - reg: should be register base and length as documented in the |
| datasheet |
| - interrupts: Should contain the cores interrupt line |
| - clocks: should contain one clock for entry in clock-names |
| see Documentation/devicetree/bindings/clock/clock-bindings.txt |
| - clock-names: |
| - "bus": AXI/master interface clock |
| - "reg": AHB/slave interface clock |
| (only required if GPU can gate slave interface independently) |
| - "core": GPU core clock |
| - "shader": Shader clock (only required if GPU has feature PIPE_3D) |
| |
| Optional properties: |
| - power-domains: a power domain consumer specifier according to |
| Documentation/devicetree/bindings/power/power_domain.txt |
| |
| example: |
| |
| gpu_3d: gpu@130000 { |
| compatible = "vivante,gc"; |
| reg = <0x00130000 0x4000>; |
| interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&clks IMX6QDL_CLK_GPU3D_AXI>, |
| <&clks IMX6QDL_CLK_GPU3D_CORE>, |
| <&clks IMX6QDL_CLK_GPU3D_SHADER>; |
| clock-names = "bus", "core", "shader"; |
| power-domains = <&gpc 1>; |
| }; |