| // SPDX-License-Identifier: GPL-2.0+ |
| /* |
| * Copyright (C) 2015 Altera Corporation <www.altera.com> |
| */ |
| #include "socfpga_arria10.dtsi" |
| |
| / { |
| model = "Altera SOCFPGA Arria 10"; |
| compatible = "altr,socfpga-arria10", "altr,socfpga"; |
| |
| aliases { |
| ethernet0 = &gmac0; |
| serial0 = &uart1; |
| }; |
| |
| chosen { |
| bootargs = "earlyprintk"; |
| stdout-path = "serial0:115200n8"; |
| }; |
| |
| memory@0 { |
| name = "memory"; |
| device_type = "memory"; |
| reg = <0x0 0x40000000>; /* 1GB */ |
| }; |
| |
| a10leds { |
| compatible = "gpio-leds"; |
| |
| a10sr_led0 { |
| label = "a10sr-led0"; |
| gpios = <&a10sr_gpio 0 1>; |
| }; |
| |
| a10sr_led1 { |
| label = "a10sr-led1"; |
| gpios = <&a10sr_gpio 1 1>; |
| }; |
| |
| a10sr_led2 { |
| label = "a10sr-led2"; |
| gpios = <&a10sr_gpio 2 1>; |
| }; |
| |
| a10sr_led3 { |
| label = "a10sr-led3"; |
| gpios = <&a10sr_gpio 3 1>; |
| }; |
| }; |
| |
| soc { |
| clkmgr@ffd04000 { |
| clocks { |
| osc1 { |
| clock-frequency = <25000000>; |
| }; |
| }; |
| }; |
| }; |
| }; |
| |
| &gmac0 { |
| phy-mode = "rgmii"; |
| phy-addr = <0xffffffff>; /* probe for phy addr */ |
| |
| /* |
| * These skews assume the user's FPGA design is adding 600ps of delay |
| * for TX_CLK on Arria 10. |
| * |
| * All skews are offset since hardware skew values for the ksz9031 |
| * range from a negative skew to a positive skew. |
| * See the micrel-ksz90x1.txt Documentation file for details. |
| */ |
| txd0-skew-ps = <0>; /* -420ps */ |
| txd1-skew-ps = <0>; /* -420ps */ |
| txd2-skew-ps = <0>; /* -420ps */ |
| txd3-skew-ps = <0>; /* -420ps */ |
| rxd0-skew-ps = <420>; /* 0ps */ |
| rxd1-skew-ps = <420>; /* 0ps */ |
| rxd2-skew-ps = <420>; /* 0ps */ |
| rxd3-skew-ps = <420>; /* 0ps */ |
| txen-skew-ps = <0>; /* -420ps */ |
| txc-skew-ps = <1860>; /* 960ps */ |
| rxdv-skew-ps = <420>; /* 0ps */ |
| rxc-skew-ps = <1680>; /* 780ps */ |
| max-frame-size = <3800>; |
| status = "okay"; |
| }; |
| |
| &gpio1 { |
| status = "okay"; |
| }; |
| |
| &spi1 { |
| status = "okay"; |
| |
| resource-manager@0 { |
| compatible = "altr,a10sr"; |
| reg = <0>; |
| spi-max-frequency = <100000>; |
| /* low-level active IRQ at GPIO1_5 */ |
| interrupt-parent = <&portb>; |
| interrupts = <5 IRQ_TYPE_LEVEL_LOW>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| |
| a10sr_gpio: gpio-controller { |
| compatible = "altr,a10sr-gpio"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| |
| a10sr_rst: reset-controller { |
| compatible = "altr,a10sr-reset"; |
| #reset-cells = <1>; |
| }; |
| }; |
| }; |
| |
| &i2c1 { |
| status = "okay"; |
| |
| /* |
| * adjust the falling times to decrease the i2c frequency to 50Khz |
| * because the LCD module does not work at the standard 100Khz |
| */ |
| clock-frequency = <100000>; |
| i2c-sda-falling-time-ns = <6000>; |
| i2c-scl-falling-time-ns = <6000>; |
| |
| eeprom@51 { |
| compatible = "atmel,24c32"; |
| reg = <0x51>; |
| pagesize = <32>; |
| }; |
| |
| rtc@68 { |
| compatible = "dallas,ds1339"; |
| reg = <0x68>; |
| }; |
| |
| ltc@5c { |
| compatible = "ltc2977"; |
| reg = <0x5c>; |
| }; |
| }; |
| |
| &uart1 { |
| status = "okay"; |
| }; |
| |
| &usb0 { |
| status = "okay"; |
| disable-over-current; |
| }; |
| |
| &watchdog1 { |
| status = "okay"; |
| }; |