| /* |
| * Support for CompuLab CL-SOM-AM57x System-on-Module |
| * |
| * Copyright (C) 2015 CompuLab Ltd. - http://www.compulab.co.il/ |
| * Author: Dmitry Lifshitz <lifshitz@compulab.co.il> |
| * |
| * This program is free software; you can redistribute it and/or modify it |
| * under the terms of the GNU General Public License version 2 as published by |
| * the Free Software Foundation. |
| */ |
| |
| /dts-v1/; |
| |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/interrupt-controller/irq.h> |
| #include "dra74x.dtsi" |
| |
| / { |
| model = "CompuLab CL-SOM-AM57x"; |
| compatible = "compulab,cl-som-am57x", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7"; |
| |
| memory@0 { |
| device_type = "memory"; |
| reg = <0x0 0x80000000 0x0 0x20000000>; /* 512 MB - minimal configuration */ |
| }; |
| |
| leds { |
| compatible = "gpio-leds"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&leds_pins_default>; |
| |
| led0 { |
| label = "cl-som-am57x:green"; |
| gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; |
| linux,default-trigger = "heartbeat"; |
| default-state = "off"; |
| }; |
| }; |
| |
| vdd_3v3: fixedregulator-vdd_3v3 { |
| compatible = "regulator-fixed"; |
| regulator-name = "vdd_3v3"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| }; |
| |
| ads7846reg: fixedregulator-ads7846-reg { |
| compatible = "regulator-fixed"; |
| regulator-name = "ads7846-reg"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| }; |
| |
| sound0: sound0 { |
| compatible = "simple-audio-card"; |
| simple-audio-card,name = "CL-SOM-AM57x-Sound-Card"; |
| simple-audio-card,format = "i2s"; |
| simple-audio-card,bitclock-master = <&dailink0_master>; |
| simple-audio-card,frame-master = <&dailink0_master>; |
| simple-audio-card,widgets = |
| "Headphone", "Headphone Jack", |
| "Microphone", "Microphone Jack", |
| "Line", "Line Jack"; |
| simple-audio-card,routing = |
| "Headphone Jack", "RHPOUT", |
| "Headphone Jack", "LHPOUT", |
| "LLINEIN", "Line Jack", |
| "MICIN", "Mic Bias", |
| "Mic Bias", "Microphone Jack"; |
| |
| dailink0_master: simple-audio-card,cpu { |
| sound-dai = <&mcasp3>; |
| }; |
| |
| simple-audio-card,codec { |
| sound-dai = <&wm8731>; |
| system-clock-frequency = <12000000>; |
| }; |
| }; |
| }; |
| |
| &dra7_pmx_core { |
| leds_pins_default: leds_pins_default { |
| pinctrl-single,pins = < |
| DRA7XX_CORE_IOPAD(0x347c, PIN_OUTPUT | MUX_MODE14) /* gpmc_a15.gpio2_5 */ |
| >; |
| }; |
| |
| i2c1_pins_default: i2c1_pins_default { |
| pinctrl-single,pins = < |
| DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.sda */ |
| DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.scl */ |
| >; |
| }; |
| |
| i2c3_pins_default: i2c3_pins_default { |
| pinctrl-single,pins = < |
| DRA7XX_CORE_IOPAD(0x36a4, PIN_INPUT| MUX_MODE10) /* mcasp1_aclkx.i2c3_sda */ |
| DRA7XX_CORE_IOPAD(0x36a8, PIN_INPUT| MUX_MODE10) /* mcasp1_fsx.i2c3_scl */ |
| >; |
| }; |
| |
| i2c4_pins_default: i2c4_pins_default { |
| pinctrl-single,pins = < |
| DRA7XX_CORE_IOPAD(0x36ac, PIN_INPUT| MUX_MODE10) /* mcasp1_acl.i2c4_sda */ |
| DRA7XX_CORE_IOPAD(0x36b0, PIN_INPUT| MUX_MODE10) /* mcasp1_fsr.i2c4_scl */ |
| >; |
| }; |
| |
| tps659038_pins_default: tps659038_pins_default { |
| pinctrl-single,pins = < |
| DRA7XX_CORE_IOPAD(0x3818, PIN_INPUT_PULLUP | MUX_MODE14) /* wakeup0.gpio1_0 */ |
| >; |
| }; |
| |
| mmc2_pins_default: mmc2_pins_default { |
| pinctrl-single,pins = < |
| DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */ |
| DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */ |
| DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */ |
| DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */ |
| DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */ |
| DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */ |
| DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */ |
| DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */ |
| DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */ |
| DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */ |
| >; |
| }; |
| |
| qspi1_pins: pinmux_qspi1_pins { |
| pinctrl-single,pins = < |
| DRA7XX_CORE_IOPAD(0x3474, PIN_INPUT | MUX_MODE1) /* gpmc_a13.qspi1_rtclk */ |
| DRA7XX_CORE_IOPAD(0x3480, PIN_INPUT | MUX_MODE1) /* gpmc_a16.qspi1_d0 */ |
| DRA7XX_CORE_IOPAD(0x3484, PIN_INPUT | MUX_MODE1) /* gpmc_a17.qspi1_d1 */ |
| DRA7XX_CORE_IOPAD(0x3488, PIN_INPUT | MUX_MODE1) /* qpmc_a18.qspi1_sclk */ |
| DRA7XX_CORE_IOPAD(0x34b8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs2.qspi1_cs0 */ |
| DRA7XX_CORE_IOPAD(0x34bc, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs3.qspi1_cs1 */ |
| >; |
| }; |
| |
| cpsw_pins_default: cpsw_pins_default { |
| pinctrl-single,pins = < |
| /* Slave at addr 0x0 */ |
| DRA7XX_CORE_IOPAD(0x3650, PIN_OUTPUT | MUX_MODE0) /* rgmii0_tclk */ |
| DRA7XX_CORE_IOPAD(0x3654, PIN_OUTPUT | MUX_MODE0) /* rgmii0_tctl */ |
| DRA7XX_CORE_IOPAD(0x3658, PIN_OUTPUT | MUX_MODE0) /* rgmii0_td3 */ |
| DRA7XX_CORE_IOPAD(0x365c, PIN_OUTPUT | MUX_MODE0) /* rgmii0_td2 */ |
| DRA7XX_CORE_IOPAD(0x3660, PIN_OUTPUT | MUX_MODE0) /* rgmii0_td1 */ |
| DRA7XX_CORE_IOPAD(0x3664, PIN_OUTPUT | MUX_MODE0) /* rgmii0_td0 */ |
| DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rclk */ |
| DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rctl */ |
| DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd3 */ |
| DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd2 */ |
| DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd1 */ |
| DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd0 */ |
| |
| /* Slave at addr 0x1 */ |
| DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | MUX_MODE3) /* vin2a_d12.rgmii1_tclk */ |
| DRA7XX_CORE_IOPAD(0x359c, PIN_OUTPUT | MUX_MODE3) /* vin2a_d13.rgmii1_tctl */ |
| DRA7XX_CORE_IOPAD(0x35a0, PIN_OUTPUT | MUX_MODE3) /* vin2a_d14.rgmii1_td3 */ |
| DRA7XX_CORE_IOPAD(0x35a4, PIN_OUTPUT | MUX_MODE3) /* vin2a_d15.rgmii1_td2 */ |
| DRA7XX_CORE_IOPAD(0x35a8, PIN_OUTPUT | MUX_MODE3) /* vin2a_d16.rgmii1_td1 */ |
| DRA7XX_CORE_IOPAD(0x35ac, PIN_OUTPUT | MUX_MODE3) /* vin2a_d17.rgmii1_td0 */ |
| DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d18.rgmii1_rclk */ |
| DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d19.rgmii1_rctl */ |
| DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */ |
| DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */ |
| DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */ |
| DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */ |
| >; |
| }; |
| |
| cpsw_pins_sleep: cpsw_pins_sleep { |
| pinctrl-single,pins = < |
| /* Slave 1 */ |
| DRA7XX_CORE_IOPAD(0x3650, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x3654, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x3658, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x365c, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x3660, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x3664, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE15) |
| |
| /* Slave 2 */ |
| DRA7XX_CORE_IOPAD(0x3598, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x359c, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x35a0, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x35a4, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x35a8, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x35ac, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE15) |
| >; |
| }; |
| |
| davinci_mdio_pins_default: davinci_mdio_pins_default { |
| pinctrl-single,pins = < |
| /* MDIO */ |
| DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT_PULLUP | MUX_MODE3)/* vin2a_d10.mdio_mclk */ |
| DRA7XX_CORE_IOPAD(0x3594, PIN_INPUT_PULLUP | MUX_MODE3) /* vin2a_d11.mdio_d */ |
| >; |
| }; |
| |
| davinci_mdio_pins_sleep: davinci_mdio_pins_sleep { |
| pinctrl-single,pins = < |
| DRA7XX_CORE_IOPAD(0x3590, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x3594, PIN_INPUT | MUX_MODE15) |
| >; |
| }; |
| |
| ads7846_pins: pinmux_ads7846_pins { |
| pinctrl-single,pins = < |
| DRA7XX_CORE_IOPAD(0x3464, PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpmc_a9.gpio1_31 */ |
| >; |
| }; |
| |
| mcasp3_pins_default: mcasp3_pins_default { |
| pinctrl-single,pins = < |
| DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx.mcasp3_aclkx */ |
| DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx.mcasp3_fsx */ |
| DRA7XX_CORE_IOPAD(0x372c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0.mcasp3_axr0 */ |
| DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1.mcasp3_axr1 */ |
| >; |
| }; |
| |
| mcasp3_pins_sleep: mcasp3_pins_sleep { |
| pinctrl-single,pins = < |
| DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x372c, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT | MUX_MODE15) |
| >; |
| }; |
| }; |
| |
| &i2c1 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c1_pins_default>; |
| clock-frequency = <400000>; |
| }; |
| |
| &i2c3 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c3_pins_default>; |
| clock-frequency = <400000>; |
| }; |
| |
| &i2c4 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c4_pins_default>; |
| clock-frequency = <400000>; |
| |
| tps659038: tps659038@58 { |
| compatible = "ti,tps659038"; |
| reg = <0x58>; |
| interrupt-parent = <&gpio1>; |
| interrupts = <0 IRQ_TYPE_LEVEL_LOW>; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&tps659038_pins_default>; |
| |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| |
| ti,system-power-controller; |
| |
| tps659038_pmic { |
| compatible = "ti,tps659038-pmic"; |
| |
| regulators { |
| smps12_reg: smps12 { |
| /* VDD_MPU */ |
| regulator-name = "smps12"; |
| regulator-min-microvolt = < 850000>; |
| regulator-max-microvolt = <1250000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| smps3_reg: smps3 { |
| /* VDD_DDR */ |
| regulator-name = "smps3"; |
| regulator-min-microvolt = <1500000>; |
| regulator-max-microvolt = <1500000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| smps45_reg: smps45 { |
| /* VDD_DSPEVE */ |
| regulator-name = "smps45"; |
| regulator-min-microvolt = < 850000>; |
| regulator-max-microvolt = <1250000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| smps6_reg: smps6 { |
| /* VDD_GPU */ |
| regulator-name = "smps6"; |
| regulator-min-microvolt = < 850000>; |
| regulator-max-microvolt = <1250000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| smps7_reg: smps7 { |
| /* VDD_CORE */ |
| regulator-name = "smps7"; |
| regulator-min-microvolt = < 850000>; |
| regulator-max-microvolt = <1160000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| smps8_reg: smps8 { |
| /* VDD_IVA */ |
| regulator-name = "smps8"; |
| regulator-min-microvolt = < 850000>; |
| regulator-max-microvolt = <1250000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| smps9_reg: smps9 { |
| /* PMIC_3V3 */ |
| regulator-name = "smps9"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| |
| ldo1_reg: ldo1 { |
| /* VDD_SD / VDDSHV8 */ |
| regulator-name = "ldo1"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| ldo2_reg: ldo2 { |
| /* VDD_1V8 */ |
| regulator-name = "ldo2"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| ldo3_reg: ldo3 { |
| /* VDDA_1V8_PHYA - supplies VDDA_SATA, VDDA_USB1/2/3 */ |
| regulator-name = "ldo3"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| ldo4_reg: ldo4 { |
| /* VDDA_1V8_PHYB - supplies VDDA_HDMI, VDDA_PCIE/0/1 */ |
| regulator-name = "ldo4"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| ldo9_reg: ldo9 { |
| /* VDD_RTC */ |
| regulator-name = "ldo9"; |
| regulator-min-microvolt = <1050000>; |
| regulator-max-microvolt = <1050000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| ldoln_reg: ldoln { |
| /* VDDA_1V8_PLL */ |
| regulator-name = "ldoln"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| ldousb_reg: ldousb { |
| /* VDDA_3V_USB: VDDA_USBHS33 */ |
| regulator-name = "ldousb"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| /* regen1 not used */ |
| }; |
| }; |
| |
| tps659038_pwr_button: tps659038_pwr_button { |
| compatible = "ti,palmas-pwrbutton"; |
| interrupt-parent = <&tps659038>; |
| interrupts = <1 IRQ_TYPE_EDGE_FALLING>; |
| wakeup-source; |
| ti,palmas-long-press-seconds = <12>; |
| }; |
| |
| tps659038_gpio: tps659038_gpio { |
| compatible = "ti,palmas-gpio"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| }; |
| |
| rtc0: rtc@56 { |
| compatible = "emmicro,em3027"; |
| reg = <0x56>; |
| }; |
| |
| eeprom_module: atmel@50 { |
| compatible = "atmel,24c08"; |
| reg = <0x50>; |
| pagesize = <16>; |
| }; |
| |
| wm8731: wm8731@1a { |
| #sound-dai-cells = <0>; |
| compatible = "wlf,wm8731"; |
| reg = <0x1a>; |
| status = "okay"; |
| }; |
| }; |
| |
| &cpu0 { |
| cpu0-supply = <&smps12_reg>; |
| voltage-tolerance = <1>; |
| }; |
| |
| &sata { |
| status = "okay"; |
| }; |
| |
| &mailbox5 { |
| status = "okay"; |
| mbox_ipu1_ipc3x: mbox_ipu1_ipc3x { |
| status = "okay"; |
| }; |
| mbox_dsp1_ipc3x: mbox_dsp1_ipc3x { |
| status = "okay"; |
| }; |
| }; |
| |
| &mailbox6 { |
| status = "okay"; |
| mbox_ipu2_ipc3x: mbox_ipu2_ipc3x { |
| status = "okay"; |
| }; |
| mbox_dsp2_ipc3x: mbox_dsp2_ipc3x { |
| status = "okay"; |
| }; |
| }; |
| |
| &mmc2 { |
| status = "okay"; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&mmc2_pins_default>; |
| |
| vmmc-supply = <&vdd_3v3>; |
| bus-width = <8>; |
| ti,non-removable; |
| cap-mmc-dual-data-rate; |
| }; |
| |
| &qspi { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&qspi1_pins>; |
| |
| spi-max-frequency = <48000000>; |
| |
| spi_flash: spi_flash@0 { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "spansion,m25p80", "jedec,spi-nor"; |
| reg = <0>; /* CS0 */ |
| spi-max-frequency = <48000000>; |
| |
| partition@0 { |
| label = "uboot"; |
| reg = <0x0 0xc0000>; |
| }; |
| |
| partition@c0000 { |
| label = "uboot environment"; |
| reg = <0xc0000 0x40000>; |
| }; |
| |
| partition@100000 { |
| label = "reserved"; |
| reg = <0x100000 0x0>; |
| }; |
| }; |
| |
| /* touch controller */ |
| touchscreen@1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&ads7846_pins>; |
| |
| compatible = "ti,ads7846"; |
| vcc-supply = <&ads7846reg>; |
| |
| reg = <1>; /* CS1 */ |
| spi-max-frequency = <1500000>; |
| |
| interrupt-parent = <&gpio1>; |
| interrupts = <31 0>; |
| pendown-gpio = <&gpio1 31 0>; |
| |
| |
| ti,x-min = /bits/ 16 <0x0>; |
| ti,x-max = /bits/ 16 <0x0fff>; |
| ti,y-min = /bits/ 16 <0x0>; |
| ti,y-max = /bits/ 16 <0x0fff>; |
| |
| ti,x-plate-ohms = /bits/ 16 <180>; |
| ti,pressure-max = /bits/ 16 <255>; |
| |
| ti,debounce-max = /bits/ 16 <30>; |
| ti,debounce-tol = /bits/ 16 <10>; |
| ti,debounce-rep = /bits/ 16 <1>; |
| |
| wakeup-source; |
| }; |
| }; |
| |
| &mac { |
| status = "okay"; |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&cpsw_pins_default>; |
| pinctrl-1 = <&cpsw_pins_sleep>; |
| dual_emac; |
| }; |
| |
| &cpsw_emac0 { |
| phy-handle = <ðphy0>; |
| phy-mode = "rgmii-txid"; |
| dual_emac_res_vlan = <0>; |
| }; |
| |
| &cpsw_emac1 { |
| phy-handle = <ðphy1>; |
| phy-mode = "rgmii-txid"; |
| dual_emac_res_vlan = <1>; |
| }; |
| |
| &davinci_mdio { |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&davinci_mdio_pins_default>; |
| pinctrl-1 = <&davinci_mdio_pins_sleep>; |
| |
| ethphy0: ethernet-phy@0 { |
| reg = <0>; |
| }; |
| |
| ethphy1: ethernet-phy@1 { |
| reg = <1>; |
| }; |
| }; |
| |
| &usb2_phy1 { |
| phy-supply = <&ldousb_reg>; |
| }; |
| |
| &usb2_phy2 { |
| phy-supply = <&ldousb_reg>; |
| }; |
| |
| &usb1 { |
| dr_mode = "host"; |
| }; |
| |
| &usb2 { |
| dr_mode = "host"; |
| }; |
| |
| &mcasp3 { |
| #sound-dai-cells = <0>; |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&mcasp3_pins_default>; |
| pinctrl-1 = <&mcasp3_pins_sleep>; |
| status = "okay"; |
| |
| op-mode = <0>; /* MCASP_IIS_MODE */ |
| tdm-slots = <2>; |
| /* 4 serializers */ |
| serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ |
| 1 2 0 0 |
| >; |
| }; |
| |
| &gpio3 { |
| status = "okay"; |
| ti,no-reset-on-init; |
| }; |
| |
| &gpio2 { |
| status = "okay"; |
| ti,no-reset-on-init; |
| }; |