| /************************************************************************ |
| * Linux driver for * |
| * ICP vortex GmbH: GDT PCI Disk Array Controllers * |
| * Intel Corporation: Storage RAID Controllers * |
| * * |
| * gdth.c * |
| * Copyright (C) 1995-06 ICP vortex GmbH, Achim Leubner * |
| * Copyright (C) 2002-04 Intel Corporation * |
| * Copyright (C) 2003-06 Adaptec Inc. * |
| * <achim_leubner@adaptec.com> * |
| * * |
| * Additions/Fixes: * |
| * Boji Tony Kannanthanam <boji.t.kannanthanam@intel.com> * |
| * Johannes Dinner <johannes_dinner@adaptec.com> * |
| * * |
| * This program is free software; you can redistribute it and/or modify * |
| * it under the terms of the GNU General Public License as published * |
| * by the Free Software Foundation; either version 2 of the License, * |
| * or (at your option) any later version. * |
| * * |
| * This program is distributed in the hope that it will be useful, * |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of * |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * |
| * GNU General Public License for more details. * |
| * * |
| * You should have received a copy of the GNU General Public License * |
| * along with this kernel; if not, write to the Free Software * |
| * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. * |
| * * |
| * Linux kernel 2.6.x supported * |
| * * |
| ************************************************************************/ |
| |
| /* All GDT Disk Array Controllers are fully supported by this driver. |
| * This includes the PCI SCSI Disk Array Controllers and the |
| * PCI Fibre Channel Disk Array Controllers. See gdth.h for a complete |
| * list of all controller types. |
| * |
| * After the optional list of IRQ values, other possible |
| * command line options are: |
| * disable:Y disable driver |
| * disable:N enable driver |
| * reserve_mode:0 reserve no drives for the raw service |
| * reserve_mode:1 reserve all not init., removable drives |
| * reserve_mode:2 reserve all not init. drives |
| * reserve_list:h,b,t,l,h,b,t,l,... reserve particular drive(s) with |
| * h- controller no., b- channel no., |
| * t- target ID, l- LUN |
| * reverse_scan:Y reverse scan order for PCI controllers |
| * reverse_scan:N scan PCI controllers like BIOS |
| * max_ids:x x - target ID count per channel (1..MAXID) |
| * rescan:Y rescan all channels/IDs |
| * rescan:N use all devices found until now |
| * hdr_channel:x x - number of virtual bus for host drives |
| * shared_access:Y disable driver reserve/release protocol to |
| * access a shared resource from several nodes, |
| * appropriate controller firmware required |
| * shared_access:N enable driver reserve/release protocol |
| * force_dma32:Y use only 32 bit DMA mode |
| * force_dma32:N use 64 bit DMA mode, if supported |
| * |
| * The default values are: "gdth=disable:N,reserve_mode:1,reverse_scan:N, |
| * max_ids:127,rescan:N,hdr_channel:0, |
| * shared_access:Y,force_dma32:N". |
| * Here is another example: "gdth=reserve_list:0,1,2,0,0,1,3,0,rescan:Y". |
| * |
| * When loading the gdth driver as a module, the same options are available. |
| * You can set the IRQs with "IRQ=...". However, the syntax to specify the |
| * options changes slightly. You must replace all ',' between options |
| * with ' ' and all ':' with '=' and you must use |
| * '1' in place of 'Y' and '0' in place of 'N'. |
| * |
| * Default: "modprobe gdth disable=0 reserve_mode=1 reverse_scan=0 |
| * max_ids=127 rescan=0 hdr_channel=0 shared_access=0 |
| * force_dma32=0" |
| * The other example: "modprobe gdth reserve_list=0,1,2,0,0,1,3,0 rescan=1". |
| */ |
| |
| /* The meaning of the Scsi_Pointer members in this driver is as follows: |
| * ptr: Chaining |
| * this_residual: unused |
| * buffer: unused |
| * dma_handle: unused |
| * buffers_residual: unused |
| * Status: unused |
| * Message: unused |
| * have_data_in: unused |
| * sent_command: unused |
| * phase: unused |
| */ |
| |
| /* statistics */ |
| #define GDTH_STATISTICS |
| |
| #include <linux/module.h> |
| |
| #include <linux/version.h> |
| #include <linux/kernel.h> |
| #include <linux/types.h> |
| #include <linux/pci.h> |
| #include <linux/string.h> |
| #include <linux/ctype.h> |
| #include <linux/ioport.h> |
| #include <linux/delay.h> |
| #include <linux/interrupt.h> |
| #include <linux/in.h> |
| #include <linux/proc_fs.h> |
| #include <linux/time.h> |
| #include <linux/timer.h> |
| #include <linux/dma-mapping.h> |
| #include <linux/list.h> |
| #include <linux/mutex.h> |
| #include <linux/slab.h> |
| #include <linux/reboot.h> |
| |
| #include <asm/dma.h> |
| #include <asm/io.h> |
| #include <linux/uaccess.h> |
| #include <linux/spinlock.h> |
| #include <linux/blkdev.h> |
| #include <linux/scatterlist.h> |
| |
| #include "scsi.h" |
| #include <scsi/scsi_host.h> |
| #include "gdth.h" |
| |
| static DEFINE_MUTEX(gdth_mutex); |
| static void gdth_delay(int milliseconds); |
| static void gdth_eval_mapping(u32 size, u32 *cyls, int *heads, int *secs); |
| static irqreturn_t gdth_interrupt(int irq, void *dev_id); |
| static irqreturn_t __gdth_interrupt(gdth_ha_str *ha, |
| int gdth_from_wait, int* pIndex); |
| static int gdth_sync_event(gdth_ha_str *ha, int service, u8 index, |
| struct scsi_cmnd *scp); |
| static int gdth_async_event(gdth_ha_str *ha); |
| static void gdth_log_event(gdth_evt_data *dvr, char *buffer); |
| |
| static void gdth_putq(gdth_ha_str *ha, struct scsi_cmnd *scp, u8 priority); |
| static void gdth_next(gdth_ha_str *ha); |
| static int gdth_fill_raw_cmd(gdth_ha_str *ha, struct scsi_cmnd *scp, u8 b); |
| static int gdth_special_cmd(gdth_ha_str *ha, struct scsi_cmnd *scp); |
| static gdth_evt_str *gdth_store_event(gdth_ha_str *ha, u16 source, |
| u16 idx, gdth_evt_data *evt); |
| static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr); |
| static void gdth_readapp_event(gdth_ha_str *ha, u8 application, |
| gdth_evt_str *estr); |
| static void gdth_clear_events(void); |
| |
| static void gdth_copy_internal_data(gdth_ha_str *ha, struct scsi_cmnd *scp, |
| char *buffer, u16 count); |
| static int gdth_internal_cache_cmd(gdth_ha_str *ha, struct scsi_cmnd *scp); |
| static int gdth_fill_cache_cmd(gdth_ha_str *ha, struct scsi_cmnd *scp, |
| u16 hdrive); |
| |
| static void gdth_enable_int(gdth_ha_str *ha); |
| static int gdth_test_busy(gdth_ha_str *ha); |
| static int gdth_get_cmd_index(gdth_ha_str *ha); |
| static void gdth_release_event(gdth_ha_str *ha); |
| static int gdth_wait(gdth_ha_str *ha, int index,u32 time); |
| static int gdth_internal_cmd(gdth_ha_str *ha, u8 service, u16 opcode, |
| u32 p1, u64 p2,u64 p3); |
| static int gdth_search_drives(gdth_ha_str *ha); |
| static int gdth_analyse_hdrive(gdth_ha_str *ha, u16 hdrive); |
| |
| static const char *gdth_ctr_name(gdth_ha_str *ha); |
| |
| static int gdth_open(struct inode *inode, struct file *filep); |
| static int gdth_close(struct inode *inode, struct file *filep); |
| static long gdth_unlocked_ioctl(struct file *filep, unsigned int cmd, |
| unsigned long arg); |
| |
| static void gdth_flush(gdth_ha_str *ha); |
| static int gdth_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd); |
| static int __gdth_queuecommand(gdth_ha_str *ha, struct scsi_cmnd *scp, |
| struct gdth_cmndinfo *cmndinfo); |
| static void gdth_scsi_done(struct scsi_cmnd *scp); |
| |
| #ifdef DEBUG_GDTH |
| static u8 DebugState = DEBUG_GDTH; |
| #define TRACE(a) {if (DebugState==1) {printk a;}} |
| #define TRACE2(a) {if (DebugState==1 || DebugState==2) {printk a;}} |
| #define TRACE3(a) {if (DebugState!=0) {printk a;}} |
| #else /* !DEBUG */ |
| #define TRACE(a) |
| #define TRACE2(a) |
| #define TRACE3(a) |
| #endif |
| |
| #ifdef GDTH_STATISTICS |
| static u32 max_rq=0, max_index=0, max_sg=0; |
| static u32 act_ints=0, act_ios=0, act_stats=0, act_rq=0; |
| static struct timer_list gdth_timer; |
| #endif |
| |
| #define PTR2USHORT(a) (u16)(unsigned long)(a) |
| #define GDTOFFSOF(a,b) (size_t)&(((a*)0)->b) |
| #define INDEX_OK(i,t) ((i)<ARRAY_SIZE(t)) |
| |
| #define BUS_L2P(a,b) ((b)>(a)->virt_bus ? (b-1):(b)) |
| |
| static u8 gdth_polling; /* polling if TRUE */ |
| static int gdth_ctr_count = 0; /* controller count */ |
| static LIST_HEAD(gdth_instances); /* controller list */ |
| static u8 gdth_write_through = FALSE; /* write through */ |
| static gdth_evt_str ebuffer[MAX_EVENTS]; /* event buffer */ |
| static int elastidx; |
| static int eoldidx; |
| static int major; |
| |
| #define DIN 1 /* IN data direction */ |
| #define DOU 2 /* OUT data direction */ |
| #define DNO DIN /* no data transfer */ |
| #define DUN DIN /* unknown data direction */ |
| static u8 gdth_direction_tab[0x100] = { |
| DNO,DNO,DIN,DIN,DOU,DIN,DIN,DOU,DIN,DUN,DOU,DOU,DUN,DUN,DUN,DIN, |
| DNO,DIN,DIN,DOU,DIN,DOU,DNO,DNO,DOU,DNO,DIN,DNO,DIN,DOU,DNO,DUN, |
| DIN,DUN,DIN,DUN,DOU,DIN,DUN,DUN,DIN,DIN,DOU,DNO,DUN,DIN,DOU,DOU, |
| DOU,DOU,DOU,DNO,DIN,DNO,DNO,DIN,DOU,DOU,DOU,DOU,DIN,DOU,DIN,DOU, |
| DOU,DOU,DIN,DIN,DIN,DNO,DUN,DNO,DNO,DNO,DUN,DNO,DOU,DIN,DUN,DUN, |
| DUN,DUN,DUN,DUN,DUN,DOU,DUN,DUN,DUN,DUN,DIN,DUN,DUN,DUN,DUN,DUN, |
| DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN, |
| DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN, |
| DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DIN,DUN,DOU,DUN,DUN,DUN,DUN,DUN, |
| DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DIN,DUN, |
| DUN,DUN,DUN,DUN,DUN,DNO,DNO,DUN,DIN,DNO,DOU,DUN,DNO,DUN,DOU,DOU, |
| DOU,DOU,DOU,DNO,DUN,DIN,DOU,DIN,DIN,DUN,DUN,DUN,DUN,DUN,DUN,DUN, |
| DUN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN, |
| DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN, |
| DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DOU,DUN,DUN,DUN,DUN,DUN, |
| DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN |
| }; |
| |
| /* LILO and modprobe/insmod parameters */ |
| /* disable driver flag */ |
| static int disable __initdata = 0; |
| /* reserve flag */ |
| static int reserve_mode = 1; |
| /* reserve list */ |
| static int reserve_list[MAX_RES_ARGS] = |
| {0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, |
| 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, |
| 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff}; |
| /* scan order for PCI controllers */ |
| static int reverse_scan = 0; |
| /* virtual channel for the host drives */ |
| static int hdr_channel = 0; |
| /* max. IDs per channel */ |
| static int max_ids = MAXID; |
| /* rescan all IDs */ |
| static int rescan = 0; |
| /* shared access */ |
| static int shared_access = 1; |
| /* 64 bit DMA mode, support for drives > 2 TB, if force_dma32 = 0 */ |
| static int force_dma32 = 0; |
| |
| /* parameters for modprobe/insmod */ |
| module_param(disable, int, 0); |
| module_param(reserve_mode, int, 0); |
| module_param_array(reserve_list, int, NULL, 0); |
| module_param(reverse_scan, int, 0); |
| module_param(hdr_channel, int, 0); |
| module_param(max_ids, int, 0); |
| module_param(rescan, int, 0); |
| module_param(shared_access, int, 0); |
| module_param(force_dma32, int, 0); |
| MODULE_AUTHOR("Achim Leubner"); |
| MODULE_LICENSE("GPL"); |
| |
| /* ioctl interface */ |
| static const struct file_operations gdth_fops = { |
| .unlocked_ioctl = gdth_unlocked_ioctl, |
| .open = gdth_open, |
| .release = gdth_close, |
| .llseek = noop_llseek, |
| }; |
| |
| #include "gdth_proc.h" |
| #include "gdth_proc.c" |
| |
| static gdth_ha_str *gdth_find_ha(int hanum) |
| { |
| gdth_ha_str *ha; |
| |
| list_for_each_entry(ha, &gdth_instances, list) |
| if (hanum == ha->hanum) |
| return ha; |
| |
| return NULL; |
| } |
| |
| static struct gdth_cmndinfo *gdth_get_cmndinfo(gdth_ha_str *ha) |
| { |
| struct gdth_cmndinfo *priv = NULL; |
| unsigned long flags; |
| int i; |
| |
| spin_lock_irqsave(&ha->smp_lock, flags); |
| |
| for (i=0; i<GDTH_MAXCMDS; ++i) { |
| if (ha->cmndinfo[i].index == 0) { |
| priv = &ha->cmndinfo[i]; |
| memset(priv, 0, sizeof(*priv)); |
| priv->index = i+1; |
| break; |
| } |
| } |
| |
| spin_unlock_irqrestore(&ha->smp_lock, flags); |
| |
| return priv; |
| } |
| |
| static void gdth_put_cmndinfo(struct gdth_cmndinfo *priv) |
| { |
| BUG_ON(!priv); |
| priv->index = 0; |
| } |
| |
| static void gdth_delay(int milliseconds) |
| { |
| if (milliseconds == 0) { |
| udelay(1); |
| } else { |
| mdelay(milliseconds); |
| } |
| } |
| |
| static void gdth_scsi_done(struct scsi_cmnd *scp) |
| { |
| struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp); |
| int internal_command = cmndinfo->internal_command; |
| |
| TRACE2(("gdth_scsi_done()\n")); |
| |
| gdth_put_cmndinfo(cmndinfo); |
| scp->host_scribble = NULL; |
| |
| if (internal_command) |
| complete((struct completion *)scp->request); |
| else |
| scp->scsi_done(scp); |
| } |
| |
| int __gdth_execute(struct scsi_device *sdev, gdth_cmd_str *gdtcmd, char *cmnd, |
| int timeout, u32 *info) |
| { |
| gdth_ha_str *ha = shost_priv(sdev->host); |
| struct scsi_cmnd *scp; |
| struct gdth_cmndinfo cmndinfo; |
| DECLARE_COMPLETION_ONSTACK(wait); |
| int rval; |
| |
| scp = kzalloc(sizeof(*scp), GFP_KERNEL); |
| if (!scp) |
| return -ENOMEM; |
| |
| scp->sense_buffer = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL); |
| if (!scp->sense_buffer) { |
| kfree(scp); |
| return -ENOMEM; |
| } |
| |
| scp->device = sdev; |
| memset(&cmndinfo, 0, sizeof(cmndinfo)); |
| |
| /* use request field to save the ptr. to completion struct. */ |
| scp->request = (struct request *)&wait; |
| scp->cmd_len = 12; |
| scp->cmnd = cmnd; |
| cmndinfo.priority = IOCTL_PRI; |
| cmndinfo.internal_cmd_str = gdtcmd; |
| cmndinfo.internal_command = 1; |
| |
| TRACE(("__gdth_execute() cmd 0x%x\n", scp->cmnd[0])); |
| __gdth_queuecommand(ha, scp, &cmndinfo); |
| |
| wait_for_completion(&wait); |
| |
| rval = cmndinfo.status; |
| if (info) |
| *info = cmndinfo.info; |
| kfree(scp->sense_buffer); |
| kfree(scp); |
| return rval; |
| } |
| |
| int gdth_execute(struct Scsi_Host *shost, gdth_cmd_str *gdtcmd, char *cmnd, |
| int timeout, u32 *info) |
| { |
| struct scsi_device *sdev = scsi_get_host_dev(shost); |
| int rval = __gdth_execute(sdev, gdtcmd, cmnd, timeout, info); |
| |
| scsi_free_host_dev(sdev); |
| return rval; |
| } |
| |
| static void gdth_eval_mapping(u32 size, u32 *cyls, int *heads, int *secs) |
| { |
| *cyls = size /HEADS/SECS; |
| if (*cyls <= MAXCYLS) { |
| *heads = HEADS; |
| *secs = SECS; |
| } else { /* too high for 64*32 */ |
| *cyls = size /MEDHEADS/MEDSECS; |
| if (*cyls <= MAXCYLS) { |
| *heads = MEDHEADS; |
| *secs = MEDSECS; |
| } else { /* too high for 127*63 */ |
| *cyls = size /BIGHEADS/BIGSECS; |
| *heads = BIGHEADS; |
| *secs = BIGSECS; |
| } |
| } |
| } |
| |
| static bool gdth_search_vortex(u16 device) |
| { |
| if (device <= PCI_DEVICE_ID_VORTEX_GDT6555) |
| return true; |
| if (device >= PCI_DEVICE_ID_VORTEX_GDT6x17RP && |
| device <= PCI_DEVICE_ID_VORTEX_GDTMAXRP) |
| return true; |
| if (device == PCI_DEVICE_ID_VORTEX_GDTNEWRX || |
| device == PCI_DEVICE_ID_VORTEX_GDTNEWRX2) |
| return true; |
| return false; |
| } |
| |
| static int gdth_pci_probe_one(gdth_pci_str *pcistr, gdth_ha_str **ha_out); |
| static int gdth_pci_init_one(struct pci_dev *pdev, |
| const struct pci_device_id *ent); |
| static void gdth_pci_remove_one(struct pci_dev *pdev); |
| static void gdth_remove_one(gdth_ha_str *ha); |
| |
| /* Vortex only makes RAID controllers. |
| * We do not really want to specify all 550 ids here, so wildcard match. |
| */ |
| static const struct pci_device_id gdthtable[] = { |
| { PCI_VDEVICE(VORTEX, PCI_ANY_ID) }, |
| { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SRC) }, |
| { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SRC_XSCALE) }, |
| { } /* terminate list */ |
| }; |
| MODULE_DEVICE_TABLE(pci, gdthtable); |
| |
| static struct pci_driver gdth_pci_driver = { |
| .name = "gdth", |
| .id_table = gdthtable, |
| .probe = gdth_pci_init_one, |
| .remove = gdth_pci_remove_one, |
| }; |
| |
| static void gdth_pci_remove_one(struct pci_dev *pdev) |
| { |
| gdth_ha_str *ha = pci_get_drvdata(pdev); |
| |
| list_del(&ha->list); |
| gdth_remove_one(ha); |
| |
| pci_disable_device(pdev); |
| } |
| |
| static int gdth_pci_init_one(struct pci_dev *pdev, |
| const struct pci_device_id *ent) |
| { |
| u16 vendor = pdev->vendor; |
| u16 device = pdev->device; |
| unsigned long base0, base1, base2; |
| int rc; |
| gdth_pci_str gdth_pcistr; |
| gdth_ha_str *ha = NULL; |
| |
| TRACE(("gdth_search_dev() cnt %d vendor %x device %x\n", |
| gdth_ctr_count, vendor, device)); |
| |
| memset(&gdth_pcistr, 0, sizeof(gdth_pcistr)); |
| |
| if (vendor == PCI_VENDOR_ID_VORTEX && !gdth_search_vortex(device)) |
| return -ENODEV; |
| |
| rc = pci_enable_device(pdev); |
| if (rc) |
| return rc; |
| |
| if (gdth_ctr_count >= MAXHA) |
| return -EBUSY; |
| |
| /* GDT PCI controller found, resources are already in pdev */ |
| gdth_pcistr.pdev = pdev; |
| base0 = pci_resource_flags(pdev, 0); |
| base1 = pci_resource_flags(pdev, 1); |
| base2 = pci_resource_flags(pdev, 2); |
| if (device <= PCI_DEVICE_ID_VORTEX_GDT6000B || /* GDT6000/B */ |
| device >= PCI_DEVICE_ID_VORTEX_GDT6x17RP) { /* MPR */ |
| if (!(base0 & IORESOURCE_MEM)) |
| return -ENODEV; |
| gdth_pcistr.dpmem = pci_resource_start(pdev, 0); |
| } else { /* GDT6110, GDT6120, .. */ |
| if (!(base0 & IORESOURCE_MEM) || |
| !(base2 & IORESOURCE_MEM) || |
| !(base1 & IORESOURCE_IO)) |
| return -ENODEV; |
| gdth_pcistr.dpmem = pci_resource_start(pdev, 2); |
| gdth_pcistr.io = pci_resource_start(pdev, 1); |
| } |
| TRACE2(("Controller found at %d/%d, irq %d, dpmem 0x%lx\n", |
| gdth_pcistr.pdev->bus->number, |
| PCI_SLOT(gdth_pcistr.pdev->devfn), |
| gdth_pcistr.irq, |
| gdth_pcistr.dpmem)); |
| |
| rc = gdth_pci_probe_one(&gdth_pcistr, &ha); |
| if (rc) |
| return rc; |
| |
| return 0; |
| } |
| |
| static int gdth_init_pci(struct pci_dev *pdev, gdth_pci_str *pcistr, |
| gdth_ha_str *ha) |
| { |
| register gdt6_dpram_str __iomem *dp6_ptr; |
| register gdt6c_dpram_str __iomem *dp6c_ptr; |
| register gdt6m_dpram_str __iomem *dp6m_ptr; |
| u32 retries; |
| u8 prot_ver; |
| u16 command; |
| int i, found = FALSE; |
| |
| TRACE(("gdth_init_pci()\n")); |
| |
| if (pdev->vendor == PCI_VENDOR_ID_INTEL) |
| ha->oem_id = OEM_ID_INTEL; |
| else |
| ha->oem_id = OEM_ID_ICP; |
| ha->brd_phys = (pdev->bus->number << 8) | (pdev->devfn & 0xf8); |
| ha->stype = (u32)pdev->device; |
| ha->irq = pdev->irq; |
| ha->pdev = pdev; |
| |
| if (ha->pdev->device <= PCI_DEVICE_ID_VORTEX_GDT6000B) { /* GDT6000/B */ |
| TRACE2(("init_pci() dpmem %lx irq %d\n",pcistr->dpmem,ha->irq)); |
| ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6_dpram_str)); |
| if (ha->brd == NULL) { |
| printk("GDT-PCI: Initialization error (DPMEM remap error)\n"); |
| return 0; |
| } |
| /* check and reset interface area */ |
| dp6_ptr = ha->brd; |
| writel(DPMEM_MAGIC, &dp6_ptr->u); |
| if (readl(&dp6_ptr->u) != DPMEM_MAGIC) { |
| printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n", |
| pcistr->dpmem); |
| found = FALSE; |
| for (i = 0xC8000; i < 0xE8000; i += 0x4000) { |
| iounmap(ha->brd); |
| ha->brd = ioremap(i, sizeof(u16)); |
| if (ha->brd == NULL) { |
| printk("GDT-PCI: Initialization error (DPMEM remap error)\n"); |
| return 0; |
| } |
| if (readw(ha->brd) != 0xffff) { |
| TRACE2(("init_pci_old() address 0x%x busy\n", i)); |
| continue; |
| } |
| iounmap(ha->brd); |
| pci_write_config_dword(pdev, PCI_BASE_ADDRESS_0, i); |
| ha->brd = ioremap(i, sizeof(gdt6_dpram_str)); |
| if (ha->brd == NULL) { |
| printk("GDT-PCI: Initialization error (DPMEM remap error)\n"); |
| return 0; |
| } |
| dp6_ptr = ha->brd; |
| writel(DPMEM_MAGIC, &dp6_ptr->u); |
| if (readl(&dp6_ptr->u) == DPMEM_MAGIC) { |
| printk("GDT-PCI: Use free address at 0x%x\n", i); |
| found = TRUE; |
| break; |
| } |
| } |
| if (!found) { |
| printk("GDT-PCI: No free address found!\n"); |
| iounmap(ha->brd); |
| return 0; |
| } |
| } |
| memset_io(&dp6_ptr->u, 0, sizeof(dp6_ptr->u)); |
| if (readl(&dp6_ptr->u) != 0) { |
| printk("GDT-PCI: Initialization error (DPMEM write error)\n"); |
| iounmap(ha->brd); |
| return 0; |
| } |
| |
| /* disable board interrupts, deinit services */ |
| writeb(0xff, &dp6_ptr->io.irqdel); |
| writeb(0x00, &dp6_ptr->io.irqen); |
| writeb(0x00, &dp6_ptr->u.ic.S_Status); |
| writeb(0x00, &dp6_ptr->u.ic.Cmd_Index); |
| |
| writel(pcistr->dpmem, &dp6_ptr->u.ic.S_Info[0]); |
| writeb(0xff, &dp6_ptr->u.ic.S_Cmd_Indx); |
| writeb(0, &dp6_ptr->io.event); |
| retries = INIT_RETRIES; |
| gdth_delay(20); |
| while (readb(&dp6_ptr->u.ic.S_Status) != 0xff) { |
| if (--retries == 0) { |
| printk("GDT-PCI: Initialization error (DEINIT failed)\n"); |
| iounmap(ha->brd); |
| return 0; |
| } |
| gdth_delay(1); |
| } |
| prot_ver = (u8)readl(&dp6_ptr->u.ic.S_Info[0]); |
| writeb(0, &dp6_ptr->u.ic.S_Status); |
| writeb(0xff, &dp6_ptr->io.irqdel); |
| if (prot_ver != PROTOCOL_VERSION) { |
| printk("GDT-PCI: Illegal protocol version\n"); |
| iounmap(ha->brd); |
| return 0; |
| } |
| |
| ha->type = GDT_PCI; |
| ha->ic_all_size = sizeof(dp6_ptr->u); |
| |
| /* special command to controller BIOS */ |
| writel(0x00, &dp6_ptr->u.ic.S_Info[0]); |
| writel(0x00, &dp6_ptr->u.ic.S_Info[1]); |
| writel(0x00, &dp6_ptr->u.ic.S_Info[2]); |
| writel(0x00, &dp6_ptr->u.ic.S_Info[3]); |
| writeb(0xfe, &dp6_ptr->u.ic.S_Cmd_Indx); |
| writeb(0, &dp6_ptr->io.event); |
| retries = INIT_RETRIES; |
| gdth_delay(20); |
| while (readb(&dp6_ptr->u.ic.S_Status) != 0xfe) { |
| if (--retries == 0) { |
| printk("GDT-PCI: Initialization error\n"); |
| iounmap(ha->brd); |
| return 0; |
| } |
| gdth_delay(1); |
| } |
| writeb(0, &dp6_ptr->u.ic.S_Status); |
| writeb(0xff, &dp6_ptr->io.irqdel); |
| |
| ha->dma64_support = 0; |
| |
| } else if (ha->pdev->device <= PCI_DEVICE_ID_VORTEX_GDT6555) { /* GDT6110, ... */ |
| ha->plx = (gdt6c_plx_regs *)pcistr->io; |
| TRACE2(("init_pci_new() dpmem %lx irq %d\n", |
| pcistr->dpmem,ha->irq)); |
| ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6c_dpram_str)); |
| if (ha->brd == NULL) { |
| printk("GDT-PCI: Initialization error (DPMEM remap error)\n"); |
| iounmap(ha->brd); |
| return 0; |
| } |
| /* check and reset interface area */ |
| dp6c_ptr = ha->brd; |
| writel(DPMEM_MAGIC, &dp6c_ptr->u); |
| if (readl(&dp6c_ptr->u) != DPMEM_MAGIC) { |
| printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n", |
| pcistr->dpmem); |
| found = FALSE; |
| for (i = 0xC8000; i < 0xE8000; i += 0x4000) { |
| iounmap(ha->brd); |
| ha->brd = ioremap(i, sizeof(u16)); |
| if (ha->brd == NULL) { |
| printk("GDT-PCI: Initialization error (DPMEM remap error)\n"); |
| return 0; |
| } |
| if (readw(ha->brd) != 0xffff) { |
| TRACE2(("init_pci_plx() address 0x%x busy\n", i)); |
| continue; |
| } |
| iounmap(ha->brd); |
| pci_write_config_dword(pdev, PCI_BASE_ADDRESS_2, i); |
| ha->brd = ioremap(i, sizeof(gdt6c_dpram_str)); |
| if (ha->brd == NULL) { |
| printk("GDT-PCI: Initialization error (DPMEM remap error)\n"); |
| return 0; |
| } |
| dp6c_ptr = ha->brd; |
| writel(DPMEM_MAGIC, &dp6c_ptr->u); |
| if (readl(&dp6c_ptr->u) == DPMEM_MAGIC) { |
| printk("GDT-PCI: Use free address at 0x%x\n", i); |
| found = TRUE; |
| break; |
| } |
| } |
| if (!found) { |
| printk("GDT-PCI: No free address found!\n"); |
| iounmap(ha->brd); |
| return 0; |
| } |
| } |
| memset_io(&dp6c_ptr->u, 0, sizeof(dp6c_ptr->u)); |
| if (readl(&dp6c_ptr->u) != 0) { |
| printk("GDT-PCI: Initialization error (DPMEM write error)\n"); |
| iounmap(ha->brd); |
| return 0; |
| } |
| |
| /* disable board interrupts, deinit services */ |
| outb(0x00,PTR2USHORT(&ha->plx->control1)); |
| outb(0xff,PTR2USHORT(&ha->plx->edoor_reg)); |
| |
| writeb(0x00, &dp6c_ptr->u.ic.S_Status); |
| writeb(0x00, &dp6c_ptr->u.ic.Cmd_Index); |
| |
| writel(pcistr->dpmem, &dp6c_ptr->u.ic.S_Info[0]); |
| writeb(0xff, &dp6c_ptr->u.ic.S_Cmd_Indx); |
| |
| outb(1,PTR2USHORT(&ha->plx->ldoor_reg)); |
| |
| retries = INIT_RETRIES; |
| gdth_delay(20); |
| while (readb(&dp6c_ptr->u.ic.S_Status) != 0xff) { |
| if (--retries == 0) { |
| printk("GDT-PCI: Initialization error (DEINIT failed)\n"); |
| iounmap(ha->brd); |
| return 0; |
| } |
| gdth_delay(1); |
| } |
| prot_ver = (u8)readl(&dp6c_ptr->u.ic.S_Info[0]); |
| writeb(0, &dp6c_ptr->u.ic.Status); |
| if (prot_ver != PROTOCOL_VERSION) { |
| printk("GDT-PCI: Illegal protocol version\n"); |
| iounmap(ha->brd); |
| return 0; |
| } |
| |
| ha->type = GDT_PCINEW; |
| ha->ic_all_size = sizeof(dp6c_ptr->u); |
| |
| /* special command to controller BIOS */ |
| writel(0x00, &dp6c_ptr->u.ic.S_Info[0]); |
| writel(0x00, &dp6c_ptr->u.ic.S_Info[1]); |
| writel(0x00, &dp6c_ptr->u.ic.S_Info[2]); |
| writel(0x00, &dp6c_ptr->u.ic.S_Info[3]); |
| writeb(0xfe, &dp6c_ptr->u.ic.S_Cmd_Indx); |
| |
| outb(1,PTR2USHORT(&ha->plx->ldoor_reg)); |
| |
| retries = INIT_RETRIES; |
| gdth_delay(20); |
| while (readb(&dp6c_ptr->u.ic.S_Status) != 0xfe) { |
| if (--retries == 0) { |
| printk("GDT-PCI: Initialization error\n"); |
| iounmap(ha->brd); |
| return 0; |
| } |
| gdth_delay(1); |
| } |
| writeb(0, &dp6c_ptr->u.ic.S_Status); |
| |
| ha->dma64_support = 0; |
| |
| } else { /* MPR */ |
| TRACE2(("init_pci_mpr() dpmem %lx irq %d\n",pcistr->dpmem,ha->irq)); |
| ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6m_dpram_str)); |
| if (ha->brd == NULL) { |
| printk("GDT-PCI: Initialization error (DPMEM remap error)\n"); |
| return 0; |
| } |
| |
| /* manipulate config. space to enable DPMEM, start RP controller */ |
| pci_read_config_word(pdev, PCI_COMMAND, &command); |
| command |= 6; |
| pci_write_config_word(pdev, PCI_COMMAND, command); |
| gdth_delay(1); |
| |
| dp6m_ptr = ha->brd; |
| |
| /* Ensure that it is safe to access the non HW portions of DPMEM. |
| * Aditional check needed for Xscale based RAID controllers */ |
| while( ((int)readb(&dp6m_ptr->i960r.sema0_reg) ) & 3 ) |
| gdth_delay(1); |
| |
| /* check and reset interface area */ |
| writel(DPMEM_MAGIC, &dp6m_ptr->u); |
| if (readl(&dp6m_ptr->u) != DPMEM_MAGIC) { |
| printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n", |
| pcistr->dpmem); |
| found = FALSE; |
| for (i = 0xC8000; i < 0xE8000; i += 0x4000) { |
| iounmap(ha->brd); |
| ha->brd = ioremap(i, sizeof(u16)); |
| if (ha->brd == NULL) { |
| printk("GDT-PCI: Initialization error (DPMEM remap error)\n"); |
| return 0; |
| } |
| if (readw(ha->brd) != 0xffff) { |
| TRACE2(("init_pci_mpr() address 0x%x busy\n", i)); |
| continue; |
| } |
| iounmap(ha->brd); |
| pci_write_config_dword(pdev, PCI_BASE_ADDRESS_0, i); |
| ha->brd = ioremap(i, sizeof(gdt6m_dpram_str)); |
| if (ha->brd == NULL) { |
| printk("GDT-PCI: Initialization error (DPMEM remap error)\n"); |
| return 0; |
| } |
| dp6m_ptr = ha->brd; |
| writel(DPMEM_MAGIC, &dp6m_ptr->u); |
| if (readl(&dp6m_ptr->u) == DPMEM_MAGIC) { |
| printk("GDT-PCI: Use free address at 0x%x\n", i); |
| found = TRUE; |
| break; |
| } |
| } |
| if (!found) { |
| printk("GDT-PCI: No free address found!\n"); |
| iounmap(ha->brd); |
| return 0; |
| } |
| } |
| memset_io(&dp6m_ptr->u, 0, sizeof(dp6m_ptr->u)); |
| |
| /* disable board interrupts, deinit services */ |
| writeb(readb(&dp6m_ptr->i960r.edoor_en_reg) | 4, |
| &dp6m_ptr->i960r.edoor_en_reg); |
| writeb(0xff, &dp6m_ptr->i960r.edoor_reg); |
| writeb(0x00, &dp6m_ptr->u.ic.S_Status); |
| writeb(0x00, &dp6m_ptr->u.ic.Cmd_Index); |
| |
| writel(pcistr->dpmem, &dp6m_ptr->u.ic.S_Info[0]); |
| writeb(0xff, &dp6m_ptr->u.ic.S_Cmd_Indx); |
| writeb(1, &dp6m_ptr->i960r.ldoor_reg); |
| retries = INIT_RETRIES; |
| gdth_delay(20); |
| while (readb(&dp6m_ptr->u.ic.S_Status) != 0xff) { |
| if (--retries == 0) { |
| printk("GDT-PCI: Initialization error (DEINIT failed)\n"); |
| iounmap(ha->brd); |
| return 0; |
| } |
| gdth_delay(1); |
| } |
| prot_ver = (u8)readl(&dp6m_ptr->u.ic.S_Info[0]); |
| writeb(0, &dp6m_ptr->u.ic.S_Status); |
| if (prot_ver != PROTOCOL_VERSION) { |
| printk("GDT-PCI: Illegal protocol version\n"); |
| iounmap(ha->brd); |
| return 0; |
| } |
| |
| ha->type = GDT_PCIMPR; |
| ha->ic_all_size = sizeof(dp6m_ptr->u); |
| |
| /* special command to controller BIOS */ |
| writel(0x00, &dp6m_ptr->u.ic.S_Info[0]); |
| writel(0x00, &dp6m_ptr->u.ic.S_Info[1]); |
| writel(0x00, &dp6m_ptr->u.ic.S_Info[2]); |
| writel(0x00, &dp6m_ptr->u.ic.S_Info[3]); |
| writeb(0xfe, &dp6m_ptr->u.ic.S_Cmd_Indx); |
| writeb(1, &dp6m_ptr->i960r.ldoor_reg); |
| retries = INIT_RETRIES; |
| gdth_delay(20); |
| while (readb(&dp6m_ptr->u.ic.S_Status) != 0xfe) { |
| if (--retries == 0) { |
| printk("GDT-PCI: Initialization error\n"); |
| iounmap(ha->brd); |
| return 0; |
| } |
| gdth_delay(1); |
| } |
| writeb(0, &dp6m_ptr->u.ic.S_Status); |
| |
| /* read FW version to detect 64-bit DMA support */ |
| writeb(0xfd, &dp6m_ptr->u.ic.S_Cmd_Indx); |
| writeb(1, &dp6m_ptr->i960r.ldoor_reg); |
| retries = INIT_RETRIES; |
| gdth_delay(20); |
| while (readb(&dp6m_ptr->u.ic.S_Status) != 0xfd) { |
| if (--retries == 0) { |
| printk("GDT-PCI: Initialization error (DEINIT failed)\n"); |
| iounmap(ha->brd); |
| return 0; |
| } |
| gdth_delay(1); |
| } |
| prot_ver = (u8)(readl(&dp6m_ptr->u.ic.S_Info[0]) >> 16); |
| writeb(0, &dp6m_ptr->u.ic.S_Status); |
| if (prot_ver < 0x2b) /* FW < x.43: no 64-bit DMA support */ |
| ha->dma64_support = 0; |
| else |
| ha->dma64_support = 1; |
| } |
| |
| return 1; |
| } |
| |
| /* controller protocol functions */ |
| |
| static void gdth_enable_int(gdth_ha_str *ha) |
| { |
| unsigned long flags; |
| gdt6_dpram_str __iomem *dp6_ptr; |
| gdt6m_dpram_str __iomem *dp6m_ptr; |
| |
| TRACE(("gdth_enable_int() hanum %d\n",ha->hanum)); |
| spin_lock_irqsave(&ha->smp_lock, flags); |
| |
| if (ha->type == GDT_PCI) { |
| dp6_ptr = ha->brd; |
| writeb(1, &dp6_ptr->io.irqdel); |
| writeb(0, &dp6_ptr->u.ic.Cmd_Index); |
| writeb(1, &dp6_ptr->io.irqen); |
| } else if (ha->type == GDT_PCINEW) { |
| outb(0xff, PTR2USHORT(&ha->plx->edoor_reg)); |
| outb(0x03, PTR2USHORT(&ha->plx->control1)); |
| } else if (ha->type == GDT_PCIMPR) { |
| dp6m_ptr = ha->brd; |
| writeb(0xff, &dp6m_ptr->i960r.edoor_reg); |
| writeb(readb(&dp6m_ptr->i960r.edoor_en_reg) & ~4, |
| &dp6m_ptr->i960r.edoor_en_reg); |
| } |
| spin_unlock_irqrestore(&ha->smp_lock, flags); |
| } |
| |
| /* return IStatus if interrupt was from this card else 0 */ |
| static u8 gdth_get_status(gdth_ha_str *ha) |
| { |
| u8 IStatus = 0; |
| |
| TRACE(("gdth_get_status() irq %d ctr_count %d\n", ha->irq, gdth_ctr_count)); |
| |
| if (ha->type == GDT_PCI) |
| IStatus = |
| readb(&((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Cmd_Index); |
| else if (ha->type == GDT_PCINEW) |
| IStatus = inb(PTR2USHORT(&ha->plx->edoor_reg)); |
| else if (ha->type == GDT_PCIMPR) |
| IStatus = |
| readb(&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.edoor_reg); |
| |
| return IStatus; |
| } |
| |
| static int gdth_test_busy(gdth_ha_str *ha) |
| { |
| register int gdtsema0 = 0; |
| |
| TRACE(("gdth_test_busy() hanum %d\n", ha->hanum)); |
| |
| if (ha->type == GDT_PCI) |
| gdtsema0 = (int)readb(&((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Sema0); |
| else if (ha->type == GDT_PCINEW) |
| gdtsema0 = (int)inb(PTR2USHORT(&ha->plx->sema0_reg)); |
| else if (ha->type == GDT_PCIMPR) |
| gdtsema0 = |
| (int)readb(&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.sema0_reg); |
| |
| return (gdtsema0 & 1); |
| } |
| |
| |
| static int gdth_get_cmd_index(gdth_ha_str *ha) |
| { |
| int i; |
| |
| TRACE(("gdth_get_cmd_index() hanum %d\n", ha->hanum)); |
| |
| for (i=0; i<GDTH_MAXCMDS; ++i) { |
| if (ha->cmd_tab[i].cmnd == UNUSED_CMND) { |
| ha->cmd_tab[i].cmnd = ha->pccb->RequestBuffer; |
| ha->cmd_tab[i].service = ha->pccb->Service; |
| ha->pccb->CommandIndex = (u32)i+2; |
| return (i+2); |
| } |
| } |
| return 0; |
| } |
| |
| |
| static void gdth_set_sema0(gdth_ha_str *ha) |
| { |
| TRACE(("gdth_set_sema0() hanum %d\n", ha->hanum)); |
| |
| if (ha->type == GDT_PCI) { |
| writeb(1, &((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Sema0); |
| } else if (ha->type == GDT_PCINEW) { |
| outb(1, PTR2USHORT(&ha->plx->sema0_reg)); |
| } else if (ha->type == GDT_PCIMPR) { |
| writeb(1, &((gdt6m_dpram_str __iomem *)ha->brd)->i960r.sema0_reg); |
| } |
| } |
| |
| |
| static void gdth_copy_command(gdth_ha_str *ha) |
| { |
| register gdth_cmd_str *cmd_ptr; |
| register gdt6m_dpram_str __iomem *dp6m_ptr; |
| register gdt6c_dpram_str __iomem *dp6c_ptr; |
| gdt6_dpram_str __iomem *dp6_ptr; |
| u16 cp_count,dp_offset,cmd_no; |
| |
| TRACE(("gdth_copy_command() hanum %d\n", ha->hanum)); |
| |
| cp_count = ha->cmd_len; |
| dp_offset= ha->cmd_offs_dpmem; |
| cmd_no = ha->cmd_cnt; |
| cmd_ptr = ha->pccb; |
| |
| ++ha->cmd_cnt; |
| |
| /* set cpcount dword aligned */ |
| if (cp_count & 3) |
| cp_count += (4 - (cp_count & 3)); |
| |
| ha->cmd_offs_dpmem += cp_count; |
| |
| /* set offset and service, copy command to DPMEM */ |
| if (ha->type == GDT_PCI) { |
| dp6_ptr = ha->brd; |
| writew(dp_offset + DPMEM_COMMAND_OFFSET, |
| &dp6_ptr->u.ic.comm_queue[cmd_no].offset); |
| writew((u16)cmd_ptr->Service, |
| &dp6_ptr->u.ic.comm_queue[cmd_no].serv_id); |
| memcpy_toio(&dp6_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count); |
| } else if (ha->type == GDT_PCINEW) { |
| dp6c_ptr = ha->brd; |
| writew(dp_offset + DPMEM_COMMAND_OFFSET, |
| &dp6c_ptr->u.ic.comm_queue[cmd_no].offset); |
| writew((u16)cmd_ptr->Service, |
| &dp6c_ptr->u.ic.comm_queue[cmd_no].serv_id); |
| memcpy_toio(&dp6c_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count); |
| } else if (ha->type == GDT_PCIMPR) { |
| dp6m_ptr = ha->brd; |
| writew(dp_offset + DPMEM_COMMAND_OFFSET, |
| &dp6m_ptr->u.ic.comm_queue[cmd_no].offset); |
| writew((u16)cmd_ptr->Service, |
| &dp6m_ptr->u.ic.comm_queue[cmd_no].serv_id); |
| memcpy_toio(&dp6m_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count); |
| } |
| } |
| |
| |
| static void gdth_release_event(gdth_ha_str *ha) |
| { |
| TRACE(("gdth_release_event() hanum %d\n", ha->hanum)); |
| |
| #ifdef GDTH_STATISTICS |
| { |
| u32 i,j; |
| for (i=0,j=0; j<GDTH_MAXCMDS; ++j) { |
| if (ha->cmd_tab[j].cmnd != UNUSED_CMND) |
| ++i; |
| } |
| if (max_index < i) { |
| max_index = i; |
| TRACE3(("GDT: max_index = %d\n",(u16)i)); |
| } |
| } |
| #endif |
| |
| if (ha->pccb->OpCode == GDT_INIT) |
| ha->pccb->Service |= 0x80; |
| |
| if (ha->type == GDT_PCI) { |
| writeb(0, &((gdt6_dpram_str __iomem *)ha->brd)->io.event); |
| } else if (ha->type == GDT_PCINEW) { |
| outb(1, PTR2USHORT(&ha->plx->ldoor_reg)); |
| } else if (ha->type == GDT_PCIMPR) { |
| writeb(1, &((gdt6m_dpram_str __iomem *)ha->brd)->i960r.ldoor_reg); |
| } |
| } |
| |
| static int gdth_wait(gdth_ha_str *ha, int index, u32 time) |
| { |
| int answer_found = FALSE; |
| int wait_index = 0; |
| |
| TRACE(("gdth_wait() hanum %d index %d time %d\n", ha->hanum, index, time)); |
| |
| if (index == 0) |
| return 1; /* no wait required */ |
| |
| do { |
| __gdth_interrupt(ha, true, &wait_index); |
| if (wait_index == index) { |
| answer_found = TRUE; |
| break; |
| } |
| gdth_delay(1); |
| } while (--time); |
| |
| while (gdth_test_busy(ha)) |
| gdth_delay(0); |
| |
| return (answer_found); |
| } |
| |
| |
| static int gdth_internal_cmd(gdth_ha_str *ha, u8 service, u16 opcode, |
| u32 p1, u64 p2, u64 p3) |
| { |
| register gdth_cmd_str *cmd_ptr; |
| int retries,index; |
| |
| TRACE2(("gdth_internal_cmd() service %d opcode %d\n",service,opcode)); |
| |
| cmd_ptr = ha->pccb; |
| memset((char*)cmd_ptr,0,sizeof(gdth_cmd_str)); |
| |
| /* make command */ |
| for (retries = INIT_RETRIES;;) { |
| cmd_ptr->Service = service; |
| cmd_ptr->RequestBuffer = INTERNAL_CMND; |
| if (!(index=gdth_get_cmd_index(ha))) { |
| TRACE(("GDT: No free command index found\n")); |
| return 0; |
| } |
| gdth_set_sema0(ha); |
| cmd_ptr->OpCode = opcode; |
| cmd_ptr->BoardNode = LOCALBOARD; |
| if (service == CACHESERVICE) { |
| if (opcode == GDT_IOCTL) { |
| cmd_ptr->u.ioctl.subfunc = p1; |
| cmd_ptr->u.ioctl.channel = (u32)p2; |
| cmd_ptr->u.ioctl.param_size = (u16)p3; |
| cmd_ptr->u.ioctl.p_param = ha->scratch_phys; |
| } else { |
| if (ha->cache_feat & GDT_64BIT) { |
| cmd_ptr->u.cache64.DeviceNo = (u16)p1; |
| cmd_ptr->u.cache64.BlockNo = p2; |
| } else { |
| cmd_ptr->u.cache.DeviceNo = (u16)p1; |
| cmd_ptr->u.cache.BlockNo = (u32)p2; |
| } |
| } |
| } else if (service == SCSIRAWSERVICE) { |
| if (ha->raw_feat & GDT_64BIT) { |
| cmd_ptr->u.raw64.direction = p1; |
| cmd_ptr->u.raw64.bus = (u8)p2; |
| cmd_ptr->u.raw64.target = (u8)p3; |
| cmd_ptr->u.raw64.lun = (u8)(p3 >> 8); |
| } else { |
| cmd_ptr->u.raw.direction = p1; |
| cmd_ptr->u.raw.bus = (u8)p2; |
| cmd_ptr->u.raw.target = (u8)p3; |
| cmd_ptr->u.raw.lun = (u8)(p3 >> 8); |
| } |
| } else if (service == SCREENSERVICE) { |
| if (opcode == GDT_REALTIME) { |
| *(u32 *)&cmd_ptr->u.screen.su.data[0] = p1; |
| *(u32 *)&cmd_ptr->u.screen.su.data[4] = (u32)p2; |
| *(u32 *)&cmd_ptr->u.screen.su.data[8] = (u32)p3; |
| } |
| } |
| ha->cmd_len = sizeof(gdth_cmd_str); |
| ha->cmd_offs_dpmem = 0; |
| ha->cmd_cnt = 0; |
| gdth_copy_command(ha); |
| gdth_release_event(ha); |
| gdth_delay(20); |
| if (!gdth_wait(ha, index, INIT_TIMEOUT)) { |
| printk("GDT: Initialization error (timeout service %d)\n",service); |
| return 0; |
| } |
| if (ha->status != S_BSY || --retries == 0) |
| break; |
| gdth_delay(1); |
| } |
| |
| return (ha->status != S_OK ? 0:1); |
| } |
| |
| |
| /* search for devices */ |
| |
| static int gdth_search_drives(gdth_ha_str *ha) |
| { |
| u16 cdev_cnt, i; |
| int ok; |
| u32 bus_no, drv_cnt, drv_no, j; |
| gdth_getch_str *chn; |
| gdth_drlist_str *drl; |
| gdth_iochan_str *ioc; |
| gdth_raw_iochan_str *iocr; |
| gdth_arcdl_str *alst; |
| gdth_alist_str *alst2; |
| gdth_oem_str_ioctl *oemstr; |
| |
| TRACE(("gdth_search_drives() hanum %d\n", ha->hanum)); |
| ok = 0; |
| |
| /* initialize controller services, at first: screen service */ |
| ha->screen_feat = 0; |
| if (!force_dma32) { |
| ok = gdth_internal_cmd(ha, SCREENSERVICE, GDT_X_INIT_SCR, 0, 0, 0); |
| if (ok) |
| ha->screen_feat = GDT_64BIT; |
| } |
| if (force_dma32 || (!ok && ha->status == (u16)S_NOFUNC)) |
| ok = gdth_internal_cmd(ha, SCREENSERVICE, GDT_INIT, 0, 0, 0); |
| if (!ok) { |
| printk("GDT-HA %d: Initialization error screen service (code %d)\n", |
| ha->hanum, ha->status); |
| return 0; |
| } |
| TRACE2(("gdth_search_drives(): SCREENSERVICE initialized\n")); |
| |
| /* unfreeze all IOs */ |
| gdth_internal_cmd(ha, CACHESERVICE, GDT_UNFREEZE_IO, 0, 0, 0); |
| |
| /* initialize cache service */ |
| ha->cache_feat = 0; |
| if (!force_dma32) { |
| ok = gdth_internal_cmd(ha, CACHESERVICE, GDT_X_INIT_HOST, LINUX_OS, |
| 0, 0); |
| if (ok) |
| ha->cache_feat = GDT_64BIT; |
| } |
| if (force_dma32 || (!ok && ha->status == (u16)S_NOFUNC)) |
| ok = gdth_internal_cmd(ha, CACHESERVICE, GDT_INIT, LINUX_OS, 0, 0); |
| if (!ok) { |
| printk("GDT-HA %d: Initialization error cache service (code %d)\n", |
| ha->hanum, ha->status); |
| return 0; |
| } |
| TRACE2(("gdth_search_drives(): CACHESERVICE initialized\n")); |
| cdev_cnt = (u16)ha->info; |
| ha->fw_vers = ha->service; |
| |
| /* detect number of buses - try new IOCTL */ |
| iocr = (gdth_raw_iochan_str *)ha->pscratch; |
| iocr->hdr.version = 0xffffffff; |
| iocr->hdr.list_entries = MAXBUS; |
| iocr->hdr.first_chan = 0; |
| iocr->hdr.last_chan = MAXBUS-1; |
| iocr->hdr.list_offset = GDTOFFSOF(gdth_raw_iochan_str, list[0]); |
| if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, IOCHAN_RAW_DESC, |
| INVALID_CHANNEL,sizeof(gdth_raw_iochan_str))) { |
| TRACE2(("IOCHAN_RAW_DESC supported!\n")); |
| ha->bus_cnt = iocr->hdr.chan_count; |
| for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) { |
| if (iocr->list[bus_no].proc_id < MAXID) |
| ha->bus_id[bus_no] = iocr->list[bus_no].proc_id; |
| else |
| ha->bus_id[bus_no] = 0xff; |
| } |
| } else { |
| /* old method */ |
| chn = (gdth_getch_str *)ha->pscratch; |
| for (bus_no = 0; bus_no < MAXBUS; ++bus_no) { |
| chn->channel_no = bus_no; |
| if (!gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, |
| SCSI_CHAN_CNT | L_CTRL_PATTERN, |
| IO_CHANNEL | INVALID_CHANNEL, |
| sizeof(gdth_getch_str))) { |
| if (bus_no == 0) { |
| printk("GDT-HA %d: Error detecting channel count (0x%x)\n", |
| ha->hanum, ha->status); |
| return 0; |
| } |
| break; |
| } |
| if (chn->siop_id < MAXID) |
| ha->bus_id[bus_no] = chn->siop_id; |
| else |
| ha->bus_id[bus_no] = 0xff; |
| } |
| ha->bus_cnt = (u8)bus_no; |
| } |
| TRACE2(("gdth_search_drives() %d channels\n",ha->bus_cnt)); |
| |
| /* read cache configuration */ |
| if (!gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, CACHE_INFO, |
| INVALID_CHANNEL,sizeof(gdth_cinfo_str))) { |
| printk("GDT-HA %d: Initialization error cache service (code %d)\n", |
| ha->hanum, ha->status); |
| return 0; |
| } |
| ha->cpar = ((gdth_cinfo_str *)ha->pscratch)->cpar; |
| TRACE2(("gdth_search_drives() cinfo: vs %x sta %d str %d dw %d b %d\n", |
| ha->cpar.version,ha->cpar.state,ha->cpar.strategy, |
| ha->cpar.write_back,ha->cpar.block_size)); |
| |
| /* read board info and features */ |
| ha->more_proc = FALSE; |
| if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, BOARD_INFO, |
| INVALID_CHANNEL,sizeof(gdth_binfo_str))) { |
| memcpy(&ha->binfo, (gdth_binfo_str *)ha->pscratch, |
| sizeof(gdth_binfo_str)); |
| if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, BOARD_FEATURES, |
| INVALID_CHANNEL,sizeof(gdth_bfeat_str))) { |
| TRACE2(("BOARD_INFO/BOARD_FEATURES supported\n")); |
| ha->bfeat = *(gdth_bfeat_str *)ha->pscratch; |
| ha->more_proc = TRUE; |
| } |
| } else { |
| TRACE2(("BOARD_INFO requires firmware >= 1.10/2.08\n")); |
| strcpy(ha->binfo.type_string, gdth_ctr_name(ha)); |
| } |
| TRACE2(("Controller name: %s\n",ha->binfo.type_string)); |
| |
| /* read more informations */ |
| if (ha->more_proc) { |
| /* physical drives, channel addresses */ |
| ioc = (gdth_iochan_str *)ha->pscratch; |
| ioc->hdr.version = 0xffffffff; |
| ioc->hdr.list_entries = MAXBUS; |
| ioc->hdr.first_chan = 0; |
| ioc->hdr.last_chan = MAXBUS-1; |
| ioc->hdr.list_offset = GDTOFFSOF(gdth_iochan_str, list[0]); |
| if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, IOCHAN_DESC, |
| INVALID_CHANNEL,sizeof(gdth_iochan_str))) { |
| for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) { |
| ha->raw[bus_no].address = ioc->list[bus_no].address; |
| ha->raw[bus_no].local_no = ioc->list[bus_no].local_no; |
| } |
| } else { |
| for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) { |
| ha->raw[bus_no].address = IO_CHANNEL; |
| ha->raw[bus_no].local_no = bus_no; |
| } |
| } |
| for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) { |
| chn = (gdth_getch_str *)ha->pscratch; |
| chn->channel_no = ha->raw[bus_no].local_no; |
| if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, |
| SCSI_CHAN_CNT | L_CTRL_PATTERN, |
| ha->raw[bus_no].address | INVALID_CHANNEL, |
| sizeof(gdth_getch_str))) { |
| ha->raw[bus_no].pdev_cnt = chn->drive_cnt; |
| TRACE2(("Channel %d: %d phys. drives\n", |
| bus_no,chn->drive_cnt)); |
| } |
| if (ha->raw[bus_no].pdev_cnt > 0) { |
| drl = (gdth_drlist_str *)ha->pscratch; |
| drl->sc_no = ha->raw[bus_no].local_no; |
| drl->sc_cnt = ha->raw[bus_no].pdev_cnt; |
| if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, |
| SCSI_DR_LIST | L_CTRL_PATTERN, |
| ha->raw[bus_no].address | INVALID_CHANNEL, |
| sizeof(gdth_drlist_str))) { |
| for (j = 0; j < ha->raw[bus_no].pdev_cnt; ++j) |
| ha->raw[bus_no].id_list[j] = drl->sc_list[j]; |
| } else { |
| ha->raw[bus_no].pdev_cnt = 0; |
| } |
| } |
| } |
| |
| /* logical drives */ |
| if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, CACHE_DRV_CNT, |
| INVALID_CHANNEL,sizeof(u32))) { |
| drv_cnt = *(u32 *)ha->pscratch; |
| if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, CACHE_DRV_LIST, |
| INVALID_CHANNEL,drv_cnt * sizeof(u32))) { |
| for (j = 0; j < drv_cnt; ++j) { |
| drv_no = ((u32 *)ha->pscratch)[j]; |
| if (drv_no < MAX_LDRIVES) { |
| ha->hdr[drv_no].is_logdrv = TRUE; |
| TRACE2(("Drive %d is log. drive\n",drv_no)); |
| } |
| } |
| } |
| alst = (gdth_arcdl_str *)ha->pscratch; |
| alst->entries_avail = MAX_LDRIVES; |
| alst->first_entry = 0; |
| alst->list_offset = GDTOFFSOF(gdth_arcdl_str, list[0]); |
| if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, |
| ARRAY_DRV_LIST2 | LA_CTRL_PATTERN, |
| INVALID_CHANNEL, sizeof(gdth_arcdl_str) + |
| (alst->entries_avail-1) * sizeof(gdth_alist_str))) { |
| for (j = 0; j < alst->entries_init; ++j) { |
| ha->hdr[j].is_arraydrv = alst->list[j].is_arrayd; |
| ha->hdr[j].is_master = alst->list[j].is_master; |
| ha->hdr[j].is_parity = alst->list[j].is_parity; |
| ha->hdr[j].is_hotfix = alst->list[j].is_hotfix; |
| ha->hdr[j].master_no = alst->list[j].cd_handle; |
| } |
| } else if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, |
| ARRAY_DRV_LIST | LA_CTRL_PATTERN, |
| 0, 35 * sizeof(gdth_alist_str))) { |
| for (j = 0; j < 35; ++j) { |
| alst2 = &((gdth_alist_str *)ha->pscratch)[j]; |
| ha->hdr[j].is_arraydrv = alst2->is_arrayd; |
| ha->hdr[j].is_master = alst2->is_master; |
| ha->hdr[j].is_parity = alst2->is_parity; |
| ha->hdr[j].is_hotfix = alst2->is_hotfix; |
| ha->hdr[j].master_no = alst2->cd_handle; |
| } |
| } |
| } |
| } |
| |
| /* initialize raw service */ |
| ha->raw_feat = 0; |
| if (!force_dma32) { |
| ok = gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_X_INIT_RAW, 0, 0, 0); |
| if (ok) |
| ha->raw_feat = GDT_64BIT; |
| } |
| if (force_dma32 || (!ok && ha->status == (u16)S_NOFUNC)) |
| ok = gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_INIT, 0, 0, 0); |
| if (!ok) { |
| printk("GDT-HA %d: Initialization error raw service (code %d)\n", |
| ha->hanum, ha->status); |
| return 0; |
| } |
| TRACE2(("gdth_search_drives(): RAWSERVICE initialized\n")); |
| |
| /* set/get features raw service (scatter/gather) */ |
| if (gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_SET_FEAT, SCATTER_GATHER, |
| 0, 0)) { |
| TRACE2(("gdth_search_drives(): set features RAWSERVICE OK\n")); |
| if (gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_GET_FEAT, 0, 0, 0)) { |
| TRACE2(("gdth_search_dr(): get feat RAWSERVICE %d\n", |
| ha->info)); |
| ha->raw_feat |= (u16)ha->info; |
| } |
| } |
| |
| /* set/get features cache service (equal to raw service) */ |
| if (gdth_internal_cmd(ha, CACHESERVICE, GDT_SET_FEAT, 0, |
| SCATTER_GATHER,0)) { |
| TRACE2(("gdth_search_drives(): set features CACHESERVICE OK\n")); |
| if (gdth_internal_cmd(ha, CACHESERVICE, GDT_GET_FEAT, 0, 0, 0)) { |
| TRACE2(("gdth_search_dr(): get feat CACHESERV. %d\n", |
| ha->info)); |
| ha->cache_feat |= (u16)ha->info; |
| } |
| } |
| |
| /* reserve drives for raw service */ |
| if (reserve_mode != 0) { |
| gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_RESERVE_ALL, |
| reserve_mode == 1 ? 1 : 3, 0, 0); |
| TRACE2(("gdth_search_drives(): RESERVE_ALL code %d\n", |
| ha->status)); |
| } |
| for (i = 0; i < MAX_RES_ARGS; i += 4) { |
| if (reserve_list[i] == ha->hanum && reserve_list[i+1] < ha->bus_cnt && |
| reserve_list[i+2] < ha->tid_cnt && reserve_list[i+3] < MAXLUN) { |
| TRACE2(("gdth_search_drives(): reserve ha %d bus %d id %d lun %d\n", |
| reserve_list[i], reserve_list[i+1], |
| reserve_list[i+2], reserve_list[i+3])); |
| if (!gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_RESERVE, 0, |
| reserve_list[i+1], reserve_list[i+2] | |
| (reserve_list[i+3] << 8))) { |
| printk("GDT-HA %d: Error raw service (RESERVE, code %d)\n", |
| ha->hanum, ha->status); |
| } |
| } |
| } |
| |
| /* Determine OEM string using IOCTL */ |
| oemstr = (gdth_oem_str_ioctl *)ha->pscratch; |
| oemstr->params.ctl_version = 0x01; |
| oemstr->params.buffer_size = sizeof(oemstr->text); |
| if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, |
| CACHE_READ_OEM_STRING_RECORD,INVALID_CHANNEL, |
| sizeof(gdth_oem_str_ioctl))) { |
| TRACE2(("gdth_search_drives(): CACHE_READ_OEM_STRING_RECORD OK\n")); |
| printk("GDT-HA %d: Vendor: %s Name: %s\n", |
| ha->hanum, oemstr->text.oem_company_name, ha->binfo.type_string); |
| /* Save the Host Drive inquiry data */ |
| strlcpy(ha->oem_name,oemstr->text.scsi_host_drive_inquiry_vendor_id, |
| sizeof(ha->oem_name)); |
| } else { |
| /* Old method, based on PCI ID */ |
| TRACE2(("gdth_search_drives(): CACHE_READ_OEM_STRING_RECORD failed\n")); |
| printk("GDT-HA %d: Name: %s\n", |
| ha->hanum, ha->binfo.type_string); |
| if (ha->oem_id == OEM_ID_INTEL) |
| strlcpy(ha->oem_name,"Intel ", sizeof(ha->oem_name)); |
| else |
| strlcpy(ha->oem_name,"ICP ", sizeof(ha->oem_name)); |
| } |
| |
| /* scanning for host drives */ |
| for (i = 0; i < cdev_cnt; ++i) |
| gdth_analyse_hdrive(ha, i); |
| |
| TRACE(("gdth_search_drives() OK\n")); |
| return 1; |
| } |
| |
| static int gdth_analyse_hdrive(gdth_ha_str *ha, u16 hdrive) |
| { |
| u32 drv_cyls; |
| int drv_hds, drv_secs; |
| |
| TRACE(("gdth_analyse_hdrive() hanum %d drive %d\n", ha->hanum, hdrive)); |
| if (hdrive >= MAX_HDRIVES) |
| return 0; |
| |
| if (!gdth_internal_cmd(ha, CACHESERVICE, GDT_INFO, hdrive, 0, 0)) |
| return 0; |
| ha->hdr[hdrive].present = TRUE; |
| ha->hdr[hdrive].size = ha->info; |
| |
| /* evaluate mapping (sectors per head, heads per cylinder) */ |
| ha->hdr[hdrive].size &= ~SECS32; |
| if (ha->info2 == 0) { |
| gdth_eval_mapping(ha->hdr[hdrive].size,&drv_cyls,&drv_hds,&drv_secs); |
| } else { |
| drv_hds = ha->info2 & 0xff; |
| drv_secs = (ha->info2 >> 8) & 0xff; |
| drv_cyls = (u32)ha->hdr[hdrive].size / drv_hds / drv_secs; |
| } |
| ha->hdr[hdrive].heads = (u8)drv_hds; |
| ha->hdr[hdrive].secs = (u8)drv_secs; |
| /* round size */ |
| ha->hdr[hdrive].size = drv_cyls * drv_hds * drv_secs; |
| |
| if (ha->cache_feat & GDT_64BIT) { |
| if (gdth_internal_cmd(ha, CACHESERVICE, GDT_X_INFO, hdrive, 0, 0) |
| && ha->info2 != 0) { |
| ha->hdr[hdrive].size = ((u64)ha->info2 << 32) | ha->info; |
| } |
| } |
| TRACE2(("gdth_search_dr() cdr. %d size %d hds %d scs %d\n", |
| hdrive,ha->hdr[hdrive].size,drv_hds,drv_secs)); |
| |
| /* get informations about device */ |
| if (gdth_internal_cmd(ha, CACHESERVICE, GDT_DEVTYPE, hdrive, 0, 0)) { |
| TRACE2(("gdth_search_dr() cache drive %d devtype %d\n", |
| hdrive,ha->info)); |
| ha->hdr[hdrive].devtype = (u16)ha->info; |
| } |
| |
| /* cluster info */ |
| if (gdth_internal_cmd(ha, CACHESERVICE, GDT_CLUST_INFO, hdrive, 0, 0)) { |
| TRACE2(("gdth_search_dr() cache drive %d cluster info %d\n", |
| hdrive,ha->info)); |
| if (!shared_access) |
| ha->hdr[hdrive].cluster_type = (u8)ha->info; |
| } |
| |
| /* R/W attributes */ |
| if (gdth_internal_cmd(ha, CACHESERVICE, GDT_RW_ATTRIBS, hdrive, 0, 0)) { |
| TRACE2(("gdth_search_dr() cache drive %d r/w attrib. %d\n", |
| hdrive,ha->info)); |
| ha->hdr[hdrive].rw_attribs = (u8)ha->info; |
| } |
| |
| return 1; |
| } |
| |
| |
| /* command queueing/sending functions */ |
| |
| static void gdth_putq(gdth_ha_str *ha, struct scsi_cmnd *scp, u8 priority) |
| { |
| struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp); |
| register struct scsi_cmnd *pscp; |
| register struct scsi_cmnd *nscp; |
| unsigned long flags; |
| |
| TRACE(("gdth_putq() priority %d\n",priority)); |
| spin_lock_irqsave(&ha->smp_lock, flags); |
| |
| if (!cmndinfo->internal_command) |
| cmndinfo->priority = priority; |
| |
| if (ha->req_first==NULL) { |
| ha->req_first = scp; /* queue was empty */ |
| scp->SCp.ptr = NULL; |
| } else { /* queue not empty */ |
| pscp = ha->req_first; |
| nscp = (struct scsi_cmnd *)pscp->SCp.ptr; |
| /* priority: 0-highest,..,0xff-lowest */ |
| while (nscp && gdth_cmnd_priv(nscp)->priority <= priority) { |
| pscp = nscp; |
| nscp = (struct scsi_cmnd *)pscp->SCp.ptr; |
| } |
| pscp->SCp.ptr = (char *)scp; |
| scp->SCp.ptr = (char *)nscp; |
| } |
| spin_unlock_irqrestore(&ha->smp_lock, flags); |
| |
| #ifdef GDTH_STATISTICS |
| flags = 0; |
| for (nscp=ha->req_first; nscp; nscp=(struct scsi_cmnd*)nscp->SCp.ptr) |
| ++flags; |
| if (max_rq < flags) { |
| max_rq = flags; |
| TRACE3(("GDT: max_rq = %d\n",(u16)max_rq)); |
| } |
| #endif |
| } |
| |
| static void gdth_next(gdth_ha_str *ha) |
| { |
| register struct scsi_cmnd *pscp; |
| register struct scsi_cmnd *nscp; |
| u8 b, t, l, firsttime; |
| u8 this_cmd, next_cmd; |
| unsigned long flags = 0; |
| int cmd_index; |
| |
| TRACE(("gdth_next() hanum %d\n", ha->hanum)); |
| if (!gdth_polling) |
| spin_lock_irqsave(&ha->smp_lock, flags); |
| |
| ha->cmd_cnt = ha->cmd_offs_dpmem = 0; |
| this_cmd = firsttime = TRUE; |
| next_cmd = gdth_polling ? FALSE:TRUE; |
| cmd_index = 0; |
| |
| for (nscp = pscp = ha->req_first; nscp; nscp = (struct scsi_cmnd *)nscp->SCp.ptr) { |
| struct gdth_cmndinfo *nscp_cmndinfo = gdth_cmnd_priv(nscp); |
| if (nscp != pscp && nscp != (struct scsi_cmnd *)pscp->SCp.ptr) |
| pscp = (struct scsi_cmnd *)pscp->SCp.ptr; |
| if (!nscp_cmndinfo->internal_command) { |
| b = nscp->device->channel; |
| t = nscp->device->id; |
| l = nscp->device->lun; |
| if (nscp_cmndinfo->priority >= DEFAULT_PRI) { |
| if ((b != ha->virt_bus && ha->raw[BUS_L2P(ha,b)].lock) || |
| (b == ha->virt_bus && t < MAX_HDRIVES && ha->hdr[t].lock)) |
| continue; |
| } |
| } else |
| b = t = l = 0; |
| |
| if (firsttime) { |
| if (gdth_test_busy(ha)) { /* controller busy ? */ |
| TRACE(("gdth_next() controller %d busy !\n", ha->hanum)); |
| if (!gdth_polling) { |
| spin_unlock_irqrestore(&ha->smp_lock, flags); |
| return; |
| } |
| while (gdth_test_busy(ha)) |
| gdth_delay(1); |
| } |
| firsttime = FALSE; |
| } |
| |
| if (!nscp_cmndinfo->internal_command) { |
| if (nscp_cmndinfo->phase == -1) { |
| nscp_cmndinfo->phase = CACHESERVICE; /* default: cache svc. */ |
| if (nscp->cmnd[0] == TEST_UNIT_READY) { |
| TRACE2(("TEST_UNIT_READY Bus %d Id %d LUN %d\n", |
| b, t, l)); |
| /* TEST_UNIT_READY -> set scan mode */ |
| if ((ha->scan_mode & 0x0f) == 0) { |
| if (b == 0 && t == 0 && l == 0) { |
| ha->scan_mode |= 1; |
| TRACE2(("Scan mode: 0x%x\n", ha->scan_mode)); |
| } |
| } else if ((ha->scan_mode & 0x0f) == 1) { |
| if (b == 0 && ((t == 0 && l == 1) || |
| (t == 1 && l == 0))) { |
| nscp_cmndinfo->OpCode = GDT_SCAN_START; |
| nscp_cmndinfo->phase = ((ha->scan_mode & 0x10 ? 1:0) << 8) |
| | SCSIRAWSERVICE; |
| ha->scan_mode = 0x12; |
| TRACE2(("Scan mode: 0x%x (SCAN_START)\n", |
| ha->scan_mode)); |
| } else { |
| ha->scan_mode &= 0x10; |
| TRACE2(("Scan mode: 0x%x\n", ha->scan_mode)); |
| } |
| } else if (ha->scan_mode == 0x12) { |
| if (b == ha->bus_cnt && t == ha->tid_cnt-1) { |
| nscp_cmndinfo->phase = SCSIRAWSERVICE; |
| nscp_cmndinfo->OpCode = GDT_SCAN_END; |
| ha->scan_mode &= 0x10; |
| TRACE2(("Scan mode: 0x%x (SCAN_END)\n", |
| ha->scan_mode)); |
| } |
| } |
| } |
| if (b == ha->virt_bus && nscp->cmnd[0] != INQUIRY && |
| nscp->cmnd[0] != READ_CAPACITY && nscp->cmnd[0] != MODE_SENSE && |
| (ha->hdr[t].cluster_type & CLUSTER_DRIVE)) { |
| /* always GDT_CLUST_INFO! */ |
| nscp_cmndinfo->OpCode = GDT_CLUST_INFO; |
| } |
| } |
| } |
| |
| if (nscp_cmndinfo->OpCode != -1) { |
| if ((nscp_cmndinfo->phase & 0xff) == CACHESERVICE) { |
| if (!(cmd_index=gdth_fill_cache_cmd(ha, nscp, t))) |
| this_cmd = FALSE; |
| next_cmd = FALSE; |
| } else if ((nscp_cmndinfo->phase & 0xff) == SCSIRAWSERVICE) { |
| if (!(cmd_index=gdth_fill_raw_cmd(ha, nscp, BUS_L2P(ha, b)))) |
| this_cmd = FALSE; |
| next_cmd = FALSE; |
| } else { |
| memset((char*)nscp->sense_buffer,0,16); |
| nscp->sense_buffer[0] = 0x70; |
| nscp->sense_buffer[2] = NOT_READY; |
| nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1); |
| if (!nscp_cmndinfo->wait_for_completion) |
| nscp_cmndinfo->wait_for_completion++; |
| else |
| gdth_scsi_done(nscp); |
| } |
| } else if (gdth_cmnd_priv(nscp)->internal_command) { |
| if (!(cmd_index=gdth_special_cmd(ha, nscp))) |
| this_cmd = FALSE; |
| next_cmd = FALSE; |
| } else if (b != ha->virt_bus) { |
| if (ha->raw[BUS_L2P(ha,b)].io_cnt[t] >= GDTH_MAX_RAW || |
| !(cmd_index=gdth_fill_raw_cmd(ha, nscp, BUS_L2P(ha, b)))) |
| this_cmd = FALSE; |
| else |
| ha->raw[BUS_L2P(ha,b)].io_cnt[t]++; |
| } else if (t >= MAX_HDRIVES || !ha->hdr[t].present || l != 0) { |
| TRACE2(("Command 0x%x to bus %d id %d lun %d -> IGNORE\n", |
| nscp->cmnd[0], b, t, l)); |
| nscp->result = DID_BAD_TARGET << 16; |
| if (!nscp_cmndinfo->wait_for_completion) |
| nscp_cmndinfo->wait_for_completion++; |
| else |
| gdth_scsi_done(nscp); |
| } else { |
| switch (nscp->cmnd[0]) { |
| case TEST_UNIT_READY: |
| case INQUIRY: |
| case REQUEST_SENSE: |
| case READ_CAPACITY: |
| case VERIFY: |
| case START_STOP: |
| case MODE_SENSE: |
| case SERVICE_ACTION_IN_16: |
| TRACE(("cache cmd %x/%x/%x/%x/%x/%x\n",nscp->cmnd[0], |
| nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3], |
| nscp->cmnd[4],nscp->cmnd[5])); |
| if (ha->hdr[t].media_changed && nscp->cmnd[0] != INQUIRY) { |
| /* return UNIT_ATTENTION */ |
| TRACE2(("cmd 0x%x target %d: UNIT_ATTENTION\n", |
| nscp->cmnd[0], t)); |
| ha->hdr[t].media_changed = FALSE; |
| memset((char*)nscp->sense_buffer,0,16); |
| nscp->sense_buffer[0] = 0x70; |
| nscp->sense_buffer[2] = UNIT_ATTENTION; |
| nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1); |
| if (!nscp_cmndinfo->wait_for_completion) |
| nscp_cmndinfo->wait_for_completion++; |
| else |
| gdth_scsi_done(nscp); |
| } else if (gdth_internal_cache_cmd(ha, nscp)) |
| gdth_scsi_done(nscp); |
| break; |
| |
| case ALLOW_MEDIUM_REMOVAL: |
| TRACE(("cache cmd %x/%x/%x/%x/%x/%x\n",nscp->cmnd[0], |
| nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3], |
| nscp->cmnd[4],nscp->cmnd[5])); |
| if ( (nscp->cmnd[4]&1) && !(ha->hdr[t].devtype&1) ) { |
| TRACE(("Prevent r. nonremov. drive->do nothing\n")); |
| nscp->result = DID_OK << 16; |
| nscp->sense_buffer[0] = 0; |
| if (!nscp_cmndinfo->wait_for_completion) |
| nscp_cmndinfo->wait_for_completion++; |
| else |
| gdth_scsi_done(nscp); |
| } else { |
| nscp->cmnd[3] = (ha->hdr[t].devtype&1) ? 1:0; |
| TRACE(("Prevent/allow r. %d rem. drive %d\n", |
| nscp->cmnd[4],nscp->cmnd[3])); |
| if (!(cmd_index=gdth_fill_cache_cmd(ha, nscp, t))) |
| this_cmd = FALSE; |
| } |
| break; |
| |
| case RESERVE: |
| case RELEASE: |
| TRACE2(("cache cmd %s\n",nscp->cmnd[0] == RESERVE ? |
| "RESERVE" : "RELEASE")); |
| if (!(cmd_index=gdth_fill_cache_cmd(ha, nscp, t))) |
| this_cmd = FALSE; |
| break; |
| |
| case READ_6: |
| case WRITE_6: |
| case READ_10: |
| case WRITE_10: |
| case READ_16: |
| case WRITE_16: |
| if (ha->hdr[t].media_changed) { |
| /* return UNIT_ATTENTION */ |
| TRACE2(("cmd 0x%x target %d: UNIT_ATTENTION\n", |
| nscp->cmnd[0], t)); |
| ha->hdr[t].media_changed = FALSE; |
| memset((char*)nscp->sense_buffer,0,16); |
| nscp->sense_buffer[0] = 0x70; |
| nscp->sense_buffer[2] = UNIT_ATTENTION; |
| nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1); |
| if (!nscp_cmndinfo->wait_for_completion) |
| nscp_cmndinfo->wait_for_completion++; |
| else |
| gdth_scsi_done(nscp); |
| } else if (!(cmd_index=gdth_fill_cache_cmd(ha, nscp, t))) |
| this_cmd = FALSE; |
| break; |
| |
| default: |
| TRACE2(("cache cmd %x/%x/%x/%x/%x/%x unknown\n",nscp->cmnd[0], |
| nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3], |
| nscp->cmnd[4],nscp->cmnd[5])); |
| printk("GDT-HA %d: Unknown SCSI command 0x%x to cache service !\n", |
| ha->hanum, nscp->cmnd[0]); |
| nscp->result = DID_ABORT << 16; |
| if (!nscp_cmndinfo->wait_for_completion) |
| nscp_cmndinfo->wait_for_completion++; |
| else |
| gdth_scsi_done(nscp); |
| break; |
| } |
| } |
| |
| if (!this_cmd) |
| break; |
| if (nscp == ha->req_first) |
| ha->req_first = pscp = (struct scsi_cmnd *)nscp->SCp.ptr; |
| else |
| pscp->SCp.ptr = nscp->SCp.ptr; |
| if (!next_cmd) |
| break; |
| } |
| |
| if (ha->cmd_cnt > 0) { |
| gdth_release_event(ha); |
| } |
| |
| if (!gdth_polling) |
| spin_unlock_irqrestore(&ha->smp_lock, flags); |
| |
| if (gdth_polling && ha->cmd_cnt > 0) { |
| if (!gdth_wait(ha, cmd_index, POLL_TIMEOUT)) |
| printk("GDT-HA %d: Command %d timed out !\n", |
| ha->hanum, cmd_index); |
| } |
| } |
| |
| /* |
| * gdth_copy_internal_data() - copy to/from a buffer onto a scsi_cmnd's |
| * buffers, kmap_atomic() as needed. |
| */ |
| static void gdth_copy_internal_data(gdth_ha_str *ha, struct scsi_cmnd *scp, |
| char *buffer, u16 count) |
| { |
| u16 cpcount,i, max_sg = scsi_sg_count(scp); |
| u16 cpsum,cpnow; |
| struct scatterlist *sl; |
| char *address; |
| |
| cpcount = min_t(u16, count, scsi_bufflen(scp)); |
| |
| if (cpcount) { |
| cpsum=0; |
| scsi_for_each_sg(scp, sl, max_sg, i) { |
| unsigned long flags; |
| cpnow = (u16)sl->length; |
| TRACE(("copy_internal() now %d sum %d count %d %d\n", |
| cpnow, cpsum, cpcount, scsi_bufflen(scp))); |
| if (cpsum+cpnow > cpcount) |
| cpnow = cpcount - cpsum; |
| cpsum += cpnow; |
| if (!sg_page(sl)) { |
| printk("GDT-HA %d: invalid sc/gt element in gdth_copy_internal_data()\n", |
| ha->hanum); |
| return; |
| } |
| local_irq_save(flags); |
| address = kmap_atomic(sg_page(sl)) + sl->offset; |
| memcpy(address, buffer, cpnow); |
| flush_dcache_page(sg_page(sl)); |
| kunmap_atomic(address); |
| local_irq_restore(flags); |
| if (cpsum == cpcount) |
| break; |
| buffer += cpnow; |
| } |
| } else if (count) { |
| printk("GDT-HA %d: SCSI command with no buffers but data transfer expected!\n", |
| ha->hanum); |
| WARN_ON(1); |
| } |
| } |
| |
| static int gdth_internal_cache_cmd(gdth_ha_str *ha, struct scsi_cmnd *scp) |
| { |
| u8 t; |
| gdth_inq_data inq; |
| gdth_rdcap_data rdc; |
| gdth_sense_data sd; |
| gdth_modep_data mpd; |
| struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp); |
| |
| t = scp->device->id; |
| TRACE(("gdth_internal_cache_cmd() cmd 0x%x hdrive %d\n", |
| scp->cmnd[0],t)); |
| |
| scp->result = DID_OK << 16; |
| scp->sense_buffer[0] = 0; |
| |
| switch (scp->cmnd[0]) { |
| case TEST_UNIT_READY: |
| case VERIFY: |
| case START_STOP: |
| TRACE2(("Test/Verify/Start hdrive %d\n",t)); |
| break; |
| |
| case INQUIRY: |
| TRACE2(("Inquiry hdrive %d devtype %d\n", |
| t,ha->hdr[t].devtype)); |
| inq.type_qual = (ha->hdr[t].devtype&4) ? TYPE_ROM:TYPE_DISK; |
| /* you can here set all disks to removable, if you want to do |
| a flush using the ALLOW_MEDIUM_REMOVAL command */ |
| inq.modif_rmb = 0x00; |
| if ((ha->hdr[t].devtype & 1) || |
| (ha->hdr[t].cluster_type & CLUSTER_DRIVE)) |
| inq.modif_rmb = 0x80; |
| inq.version = 2; |
| inq.resp_aenc = 2; |
| inq.add_length= 32; |
| strcpy(inq.vendor,ha->oem_name); |
| snprintf(inq.product, sizeof(inq.product), "Host Drive #%02d",t); |
| strcpy(inq.revision," "); |
| gdth_copy_internal_data(ha, scp, (char*)&inq, sizeof(gdth_inq_data)); |
| break; |
| |
| case REQUEST_SENSE: |
| TRACE2(("Request sense hdrive %d\n",t)); |
| sd.errorcode = 0x70; |
| sd.segno = 0x00; |
| sd.key = NO_SENSE; |
| sd.info = 0; |
| sd.add_length= 0; |
| gdth_copy_internal_data(ha, scp, (char*)&sd, sizeof(gdth_sense_data)); |
| break; |
| |
| case MODE_SENSE: |
| TRACE2(("Mode sense hdrive %d\n",t)); |
| memset((char*)&mpd,0,sizeof(gdth_modep_data)); |
| mpd.hd.data_length = sizeof(gdth_modep_data); |
| mpd.hd.dev_par = (ha->hdr[t].devtype&2) ? 0x80:0; |
| mpd.hd.bd_length = sizeof(mpd.bd); |
| mpd.bd.block_length[0] = (SECTOR_SIZE & 0x00ff0000) >> 16; |
| mpd.bd.block_length[1] = (SECTOR_SIZE & 0x0000ff00) >> 8; |
| mpd.bd.block_length[2] = (SECTOR_SIZE & 0x000000ff); |
| gdth_copy_internal_data(ha, scp, (char*)&mpd, sizeof(gdth_modep_data)); |
| break; |
| |
| case READ_CAPACITY: |
| TRACE2(("Read capacity hdrive %d\n",t)); |
| if (ha->hdr[t].size > (u64)0xffffffff) |
| rdc.last_block_no = 0xffffffff; |
| else |
| rdc.last_block_no = cpu_to_be32(ha->hdr[t].size-1); |
| rdc.block_length = cpu_to_be32(SECTOR_SIZE); |
| gdth_copy_internal_data(ha, scp, (char*)&rdc, sizeof(gdth_rdcap_data)); |
| break; |
| |
| case SERVICE_ACTION_IN_16: |
| if ((scp->cmnd[1] & 0x1f) == SAI_READ_CAPACITY_16 && |
| (ha->cache_feat & GDT_64BIT)) { |
| gdth_rdcap16_data rdc16; |
| |
| TRACE2(("Read capacity (16) hdrive %d\n",t)); |
| rdc16.last_block_no = cpu_to_be64(ha->hdr[t].size-1); |
| rdc16.block_length = cpu_to_be32(SECTOR_SIZE); |
| gdth_copy_internal_data(ha, scp, (char*)&rdc16, |
| sizeof(gdth_rdcap16_data)); |
| } else { |
| scp->result = DID_ABORT << 16; |
| } |
| break; |
| |
| default: |
| TRACE2(("Internal cache cmd 0x%x unknown\n",scp->cmnd[0])); |
| break; |
| } |
| |
| if (!cmndinfo->wait_for_completion) |
| cmndinfo->wait_for_completion++; |
| else |
| return 1; |
| |
| return 0; |
| } |
| |
| static int gdth_fill_cache_cmd(gdth_ha_str *ha, struct scsi_cmnd *scp, |
| u16 hdrive) |
| { |
| register gdth_cmd_str *cmdp; |
| struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp); |
| u32 cnt, blockcnt; |
| u64 no, blockno; |
| int i, cmd_index, read_write, sgcnt, mode64; |
| |
| cmdp = ha->pccb; |
| TRACE(("gdth_fill_cache_cmd() cmd 0x%x cmdsize %d hdrive %d\n", |
| scp->cmnd[0],scp->cmd_len,hdrive)); |
| |
| mode64 = (ha->cache_feat & GDT_64BIT) ? TRUE : FALSE; |
| /* test for READ_16, WRITE_16 if !mode64 ? --- |
| not required, should not occur due to error return on |
| READ_CAPACITY_16 */ |
| |
| cmdp->Service = CACHESERVICE; |
| cmdp->RequestBuffer = scp; |
| /* search free command index */ |
| if (!(cmd_index=gdth_get_cmd_index(ha))) { |
| TRACE(("GDT: No free command index found\n")); |
| return 0; |
| } |
| /* if it's the first command, set command semaphore */ |
| if (ha->cmd_cnt == 0) |
| gdth_set_sema0(ha); |
| |
| /* fill command */ |
| read_write = 0; |
| if (cmndinfo->OpCode != -1) |
| cmdp->OpCode = cmndinfo->OpCode; /* special cache cmd. */ |
| else if (scp->cmnd[0] == RESERVE) |
| cmdp->OpCode = GDT_RESERVE_DRV; |
| else if (scp->cmnd[0] == RELEASE) |
| cmdp->OpCode = GDT_RELEASE_DRV; |
| else if (scp->cmnd[0] == ALLOW_MEDIUM_REMOVAL) { |
| if (scp->cmnd[4] & 1) /* prevent ? */ |
| cmdp->OpCode = GDT_MOUNT; |
| else if (scp->cmnd[3] & 1) /* removable drive ? */ |
| cmdp->OpCode = GDT_UNMOUNT; |
| else |
| cmdp->OpCode = GDT_FLUSH; |
| } else if (scp->cmnd[0] == WRITE_6 || scp->cmnd[0] == WRITE_10 || |
| scp->cmnd[0] == WRITE_12 || scp->cmnd[0] == WRITE_16 |
| ) { |
| read_write = 1; |
| if (gdth_write_through || ((ha->hdr[hdrive].rw_attribs & 1) && |
| (ha->cache_feat & GDT_WR_THROUGH))) |
| cmdp->OpCode = GDT_WRITE_THR; |
| else |
| cmdp->OpCode = GDT_WRITE; |
| } else { |
| read_write = 2; |
| cmdp->OpCode = GDT_READ; |
| } |
| |
| cmdp->BoardNode = LOCALBOARD; |
| if (mode64) { |
| cmdp->u.cache64.DeviceNo = hdrive; |
| cmdp->u.cache64.BlockNo = 1; |
| cmdp->u.cache64.sg_canz = 0; |
| } else { |
| cmdp->u.cache.DeviceNo = hdrive; |
| cmdp->u.cache.BlockNo = 1; |
| cmdp->u.cache.sg_canz = 0; |
| } |
| |
| if (read_write) { |
| if (scp->cmd_len == 16) { |
| memcpy(&no, &scp->cmnd[2], sizeof(u64)); |
| blockno = be64_to_cpu(no); |
| memcpy(&cnt, &scp->cmnd[10], sizeof(u32)); |
| blockcnt = be32_to_cpu(cnt); |
| } else if (scp->cmd_len == 10) { |
| memcpy(&no, &scp->cmnd[2], sizeof(u32)); |
| blockno = be32_to_cpu(no); |
| memcpy(&cnt, &scp->cmnd[7], sizeof(u16)); |
| blockcnt = be16_to_cpu(cnt); |
| } else { |
| memcpy(&no, &scp->cmnd[0], sizeof(u32)); |
| blockno = be32_to_cpu(no) & 0x001fffffUL; |
| blockcnt= scp->cmnd[4]==0 ? 0x100 : scp->cmnd[4]; |
| } |
| if (mode64) { |
| cmdp->u.cache64.BlockNo = blockno; |
| cmdp->u.cache64.BlockCnt = blockcnt; |
| } else { |
| cmdp->u.cache.BlockNo = (u32)blockno; |
| cmdp->u.cache.BlockCnt = blockcnt; |
| } |
| |
| if (scsi_bufflen(scp)) { |
| cmndinfo->dma_dir = (read_write == 1 ? |
| DMA_TO_DEVICE : DMA_FROM_DEVICE); |
| sgcnt = dma_map_sg(&ha->pdev->dev, scsi_sglist(scp), |
| scsi_sg_count(scp), cmndinfo->dma_dir); |
| if (mode64) { |
| struct scatterlist *sl; |
| |
| cmdp->u.cache64.DestAddr= (u64)-1; |
| cmdp->u.cache64.sg_canz = sgcnt; |
| scsi_for_each_sg(scp, sl, sgcnt, i) { |
| cmdp->u.cache64.sg_lst[i].sg_ptr = sg_dma_address(sl); |
| cmdp->u.cache64.sg_lst[i].sg_len = sg_dma_len(sl); |
| } |
| } else { |
| struct scatterlist *sl; |
| |
| cmdp->u.cache.DestAddr= 0xffffffff; |
| cmdp->u.cache.sg_canz = sgcnt; |
| scsi_for_each_sg(scp, sl, sgcnt, i) { |
| cmdp->u.cache.sg_lst[i].sg_ptr = sg_dma_address(sl); |
| cmdp->u.cache.sg_lst[i].sg_len = sg_dma_len(sl); |
| } |
| } |
| |
| #ifdef GDTH_STATISTICS |
| if (max_sg < (u32)sgcnt) { |
| max_sg = (u32)sgcnt; |
| TRACE3(("GDT: max_sg = %d\n",max_sg)); |
| } |
| #endif |
| |
| } |
| } |
| /* evaluate command size, check space */ |
| if (mode64) { |
| TRACE(("cache cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n", |
| cmdp->u.cache64.DestAddr,cmdp->u.cache64.sg_canz, |
| cmdp->u.cache64.sg_lst[0].sg_ptr, |
| cmdp->u.cache64.sg_lst[0].sg_len)); |
| TRACE(("cache cmd: cmd %d blockno. %d, blockcnt %d\n", |
| cmdp->OpCode,cmdp->u.cache64.BlockNo,cmdp->u.cache64.BlockCnt)); |
| ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.cache64.sg_lst) + |
| (u16)cmdp->u.cache64.sg_canz * sizeof(gdth_sg64_str); |
| } else { |
| TRACE(("cache cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n", |
| cmdp->u.cache.DestAddr,cmdp->u.cache.sg_canz, |
| cmdp->u.cache.sg_lst[0].sg_ptr, |
| cmdp->u.cache.sg_lst[0].sg_len)); |
| TRACE(("cache cmd: cmd %d blockno. %d, blockcnt %d\n", |
| cmdp->OpCode,cmdp->u.cache.BlockNo,cmdp->u.cache.BlockCnt)); |
| ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.cache.sg_lst) + |
| (u16)cmdp->u.cache.sg_canz * sizeof(gdth_sg_str); |
| } |
| if (ha->cmd_len & 3) |
| ha->cmd_len += (4 - (ha->cmd_len & 3)); |
| |
| if (ha->cmd_cnt > 0) { |
| if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) > |
| ha->ic_all_size) { |
| TRACE2(("gdth_fill_cache() DPMEM overflow\n")); |
| ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND; |
| return 0; |
| } |
| } |
| |
| /* copy command */ |
| gdth_copy_command(ha); |
| return cmd_index; |
| } |
| |
| static int gdth_fill_raw_cmd(gdth_ha_str *ha, struct scsi_cmnd *scp, u8 b) |
| { |
| register gdth_cmd_str *cmdp; |
| u16 i; |
| dma_addr_t sense_paddr; |
| int cmd_index, sgcnt, mode64; |
| u8 t,l; |
| struct gdth_cmndinfo *cmndinfo; |
| |
| t = scp->device->id; |
| l = scp->device->lun; |
| cmdp = ha->pccb; |
| TRACE(("gdth_fill_raw_cmd() cmd 0x%x bus %d ID %d LUN %d\n", |
| scp->cmnd[0],b,t,l)); |
| |
| mode64 = (ha->raw_feat & GDT_64BIT) ? TRUE : FALSE; |
| |
| cmdp->Service = SCSIRAWSERVICE; |
| cmdp->RequestBuffer = scp; |
| /* search free command index */ |
| if (!(cmd_index=gdth_get_cmd_index(ha))) { |
| TRACE(("GDT: No free command index found\n")); |
| return 0; |
| } |
| /* if it's the first command, set command semaphore */ |
| if (ha->cmd_cnt == 0) |
| gdth_set_sema0(ha); |
| |
| cmndinfo = gdth_cmnd_priv(scp); |
| /* fill command */ |
| if (cmndinfo->OpCode != -1) { |
| cmdp->OpCode = cmndinfo->OpCode; /* special raw cmd. */ |
| cmdp->BoardNode = LOCALBOARD; |
| if (mode64) { |
| cmdp->u.raw64.direction = (cmndinfo->phase >> 8); |
| TRACE2(("special raw cmd 0x%x param 0x%x\n", |
| cmdp->OpCode, cmdp->u.raw64.direction)); |
| /* evaluate command size */ |
| ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst); |
| } else { |
| cmdp->u.raw.direction = (cmndinfo->phase >> 8); |
| TRACE2(("special raw cmd 0x%x param 0x%x\n", |
| cmdp->OpCode, cmdp->u.raw.direction)); |
| /* evaluate command size */ |
| ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst); |
| } |
| |
| } else { |
| sense_paddr = dma_map_single(&ha->pdev->dev, scp->sense_buffer, 16, |
| DMA_FROM_DEVICE); |
| |
| cmndinfo->sense_paddr = sense_paddr; |
| cmdp->OpCode = GDT_WRITE; /* always */ |
| cmdp->BoardNode = LOCALBOARD; |
| if (mode64) { |
| cmdp->u.raw64.reserved = 0; |
| cmdp->u.raw64.mdisc_time = 0; |
| cmdp->u.raw64.mcon_time = 0; |
| cmdp->u.raw64.clen = scp->cmd_len; |
| cmdp->u.raw64.target = t; |
| cmdp->u.raw64.lun = l; |
| cmdp->u.raw64.bus = b; |
| cmdp->u.raw64.priority = 0; |
| cmdp->u.raw64.sdlen = scsi_bufflen(scp); |
| cmdp->u.raw64.sense_len = 16; |
| cmdp->u.raw64.sense_data = sense_paddr; |
| cmdp->u.raw64.direction = |
| gdth_direction_tab[scp->cmnd[0]]==DOU ? GDTH_DATA_OUT:GDTH_DATA_IN; |
| memcpy(cmdp->u.raw64.cmd,scp->cmnd,16); |
| cmdp->u.raw64.sg_ranz = 0; |
| } else { |
| cmdp->u.raw.reserved = 0; |
| cmdp->u.raw.mdisc_time = 0; |
| cmdp->u.raw.mcon_time = 0; |
| cmdp->u.raw.clen = scp->cmd_len; |
| cmdp->u.raw.target = t; |
| cmdp->u.raw.lun = l; |
| cmdp->u.raw.bus = b; |
| cmdp->u.raw.priority = 0; |
| cmdp->u.raw.link_p = 0; |
| cmdp->u.raw.sdlen = scsi_bufflen(scp); |
| cmdp->u.raw.sense_len = 16; |
| cmdp->u.raw.sense_data = sense_paddr; |
| cmdp->u.raw.direction = |
| gdth_direction_tab[scp->cmnd[0]]==DOU ? GDTH_DATA_OUT:GDTH_DATA_IN; |
| memcpy(cmdp->u.raw.cmd,scp->cmnd,12); |
| cmdp->u.raw.sg_ranz = 0; |
| } |
| |
| if (scsi_bufflen(scp)) { |
| cmndinfo->dma_dir = DMA_BIDIRECTIONAL; |
| sgcnt = dma_map_sg(&ha->pdev->dev, scsi_sglist(scp), |
| scsi_sg_count(scp), cmndinfo->dma_dir); |
| if (mode64) { |
| struct scatterlist *sl; |
| |
| cmdp->u.raw64.sdata = (u64)-1; |
| cmdp->u.raw64.sg_ranz = sgcnt; |
| scsi_for_each_sg(scp, sl, sgcnt, i) { |
| cmdp->u.raw64.sg_lst[i].sg_ptr = sg_dma_address(sl); |
| cmdp->u.raw64.sg_lst[i].sg_len = sg_dma_len(sl); |
| } |
| } else { |
| struct scatterlist *sl; |
| |
| cmdp->u.raw.sdata = 0xffffffff; |
| cmdp->u.raw.sg_ranz = sgcnt; |
| scsi_for_each_sg(scp, sl, sgcnt, i) { |
| cmdp->u.raw.sg_lst[i].sg_ptr = sg_dma_address(sl); |
| cmdp->u.raw.sg_lst[i].sg_len = sg_dma_len(sl); |
| } |
| } |
| |
| #ifdef GDTH_STATISTICS |
| if (max_sg < sgcnt) { |
| max_sg = sgcnt; |
| TRACE3(("GDT: max_sg = %d\n",sgcnt)); |
| } |
| #endif |
| |
| } |
| if (mode64) { |
| TRACE(("raw cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n", |
| cmdp->u.raw64.sdata,cmdp->u.raw64.sg_ranz, |
| cmdp->u.raw64.sg_lst[0].sg_ptr, |
| cmdp->u.raw64.sg_lst[0].sg_len)); |
| /* evaluate command size */ |
| ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst) + |
| (u16)cmdp->u.raw64.sg_ranz * sizeof(gdth_sg64_str); |
| } else { |
| TRACE(("raw cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n", |
| cmdp->u.raw.sdata,cmdp->u.raw.sg_ranz, |
| cmdp->u.raw.sg_lst[0].sg_ptr, |
| cmdp->u.raw.sg_lst[0].sg_len)); |
| /* evaluate command size */ |
| ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst) + |
| (u16)cmdp->u.raw.sg_ranz * sizeof(gdth_sg_str); |
| } |
| } |
| /* check space */ |
| if (ha->cmd_len & 3) |
| ha->cmd_len += (4 - (ha->cmd_len & 3)); |
| |
| if (ha->cmd_cnt > 0) { |
| if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) > |
| ha->ic_all_size) { |
| TRACE2(("gdth_fill_raw() DPMEM overflow\n")); |
| ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND; |
| return 0; |
| } |
| } |
| |
| /* copy command */ |
| gdth_copy_command(ha); |
| return cmd_index; |
| } |
| |
| static int gdth_special_cmd(gdth_ha_str *ha, struct scsi_cmnd *scp) |
| { |
| register gdth_cmd_str *cmdp; |
| struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp); |
| int cmd_index; |
| |
| cmdp= ha->pccb; |
| TRACE2(("gdth_special_cmd(): ")); |
| |
| *cmdp = *cmndinfo->internal_cmd_str; |
| cmdp->RequestBuffer = scp; |
| |
| /* search free command index */ |
| if (!(cmd_index=gdth_get_cmd_index(ha))) { |
| TRACE(("GDT: No free command index found\n")); |
| return 0; |
| } |
| |
| /* if it's the first command, set command semaphore */ |
| if (ha->cmd_cnt == 0) |
| gdth_set_sema0(ha); |
| |
| /* evaluate command size, check space */ |
| if (cmdp->OpCode == GDT_IOCTL) { |
| TRACE2(("IOCTL\n")); |
| ha->cmd_len = |
| GDTOFFSOF(gdth_cmd_str,u.ioctl.p_param) + sizeof(u64); |
| } else if (cmdp->Service == CACHESERVICE) { |
| TRACE2(("cache command %d\n",cmdp->OpCode)); |
| if (ha->cache_feat & GDT_64BIT) |
| ha->cmd_len = |
| GDTOFFSOF(gdth_cmd_str,u.cache64.sg_lst) + sizeof(gdth_sg64_str); |
| else |
| ha->cmd_len = |
| GDTOFFSOF(gdth_cmd_str,u.cache.sg_lst) + sizeof(gdth_sg_str); |
| } else if (cmdp->Service == SCSIRAWSERVICE) { |
| TRACE2(("raw command %d\n",cmdp->OpCode)); |
| if (ha->raw_feat & GDT_64BIT) |
| ha->cmd_len = |
| GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst) + sizeof(gdth_sg64_str); |
| else |
| ha->cmd_len = |
| GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst) + sizeof(gdth_sg_str); |
| } |
| |
| if (ha->cmd_len & 3) |
| ha->cmd_len += (4 - (ha->cmd_len & 3)); |
| |
| if (ha->cmd_cnt > 0) { |
| if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) > |
| ha->ic_all_size) { |
| TRACE2(("gdth_special_cmd() DPMEM overflow\n")); |
| ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND; |
| return 0; |
| } |
| } |
| |
| /* copy command */ |
| gdth_copy_command(ha); |
| return cmd_index; |
| } |
| |
| |
| /* Controller event handling functions */ |
| static gdth_evt_str *gdth_store_event(gdth_ha_str *ha, u16 source, |
| u16 idx, gdth_evt_data *evt) |
| { |
| gdth_evt_str *e; |
| |
| /* no GDTH_LOCK_HA() ! */ |
| TRACE2(("gdth_store_event() source %d idx %d\n", source, idx)); |
| if (source == 0) /* no source -> no event */ |
| return NULL; |
| |
| if (ebuffer[elastidx].event_source == source && |
| ebuffer[elastidx].event_idx == idx && |
| ((evt->size != 0 && ebuffer[elastidx].event_data.size != 0 && |
| !memcmp((char *)&ebuffer[elastidx].event_data.eu, |
| (char *)&evt->eu, evt->size)) || |
| (evt->size == 0 && ebuffer[elastidx].event_data.size == 0 && |
| !strcmp((char *)&ebuffer[elastidx].event_data.event_string, |
| (char *)&evt->event_string)))) { |
| e = &ebuffer[elastidx]; |
| e->last_stamp = (u32)ktime_get_real_seconds(); |
| ++e->same_count; |
| } else { |
| if (ebuffer[elastidx].event_source != 0) { /* entry not free ? */ |
| ++elastidx; |
| if (elastidx == MAX_EVENTS) |
| elastidx = 0; |
| if (elastidx == eoldidx) { /* reached mark ? */ |
| ++eoldidx; |
| if (eoldidx == MAX_EVENTS) |
| eoldidx = 0; |
| } |
| } |
| e = &ebuffer[elastidx]; |
| e->event_source = source; |
| e->event_idx = idx; |
| e->first_stamp = e->last_stamp = (u32)ktime_get_real_seconds(); |
| e->same_count = 1; |
| e->event_data = *evt; |
| e->application = 0; |
| } |
| return e; |
| } |
| |
| static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr) |
| { |
| gdth_evt_str *e; |
| int eindex; |
| unsigned long flags; |
| |
| TRACE2(("gdth_read_event() handle %d\n", handle)); |
| spin_lock_irqsave(&ha->smp_lock, flags); |
| if (handle == -1) |
| eindex = eoldidx; |
| else |
| eindex = handle; |
| estr->event_source = 0; |
| |
| if (eindex < 0 || eindex >= MAX_EVENTS) { |
| spin_unlock_irqrestore(&ha->smp_lock, flags); |
| return eindex; |
| } |
| e = &ebuffer[eindex]; |
| if (e->event_source != 0) { |
| if (eindex != elastidx) { |
| if (++eindex == MAX_EVENTS) |
| eindex = 0; |
| } else { |
| eindex = -1; |
| } |
| memcpy(estr, e, sizeof(gdth_evt_str)); |
| } |
| spin_unlock_irqrestore(&ha->smp_lock, flags); |
| return eindex; |
| } |
| |
| static void gdth_readapp_event(gdth_ha_str *ha, |
| u8 application, gdth_evt_str *estr) |
| { |
| gdth_evt_str *e; |
| int eindex; |
| unsigned long flags; |
| u8 found = FALSE; |
| |
| TRACE2(("gdth_readapp_event() app. %d\n", application)); |
| spin_lock_irqsave(&ha->smp_lock, flags); |
| eindex = eoldidx; |
| for (;;) { |
| e = &ebuffer[eindex]; |
| if (e->event_source == 0) |
| break; |
| if ((e->application & application) == 0) { |
| e->application |= application; |
| found = TRUE; |
| break; |
| } |
| if (eindex == elastidx) |
| break; |
| if (++eindex == MAX_EVENTS) |
| eindex = 0; |
| } |
| if (found) |
| memcpy(estr, e, sizeof(gdth_evt_str)); |
| else |
| estr->event_source = 0; |
| spin_unlock_irqrestore(&ha->smp_lock, flags); |
| } |
| |
| static void gdth_clear_events(void) |
| { |
| TRACE(("gdth_clear_events()")); |
| |
| eoldidx = elastidx = 0; |
| ebuffer[0].event_source = 0; |
| } |
| |
| |
| /* SCSI interface functions */ |
| |
| static irqreturn_t __gdth_interrupt(gdth_ha_str *ha, |
| int gdth_from_wait, int* pIndex) |
| { |
| gdt6m_dpram_str __iomem *dp6m_ptr = NULL; |
| gdt6_dpram_str __iomem *dp6_ptr; |
| struct scsi_cmnd *scp; |
| int rval, i; |
| u8 IStatus; |
| u16 Service; |
| unsigned long flags = 0; |
| |
| TRACE(("gdth_interrupt() IRQ %d\n", ha->irq)); |
| |
| /* if polling and not from gdth_wait() -> return */ |
| if (gdth_polling) { |
| if (!gdth_from_wait) { |
| return IRQ_HANDLED; |
| } |
| } |
| |
| if (!gdth_polling) |
| spin_lock_irqsave(&ha->smp_lock, flags); |
| |
| /* search controller */ |
| IStatus = gdth_get_status(ha); |
| if (IStatus == 0) { |
| /* spurious interrupt */ |
| if (!gdth_polling) |
| spin_unlock_irqrestore(&ha->smp_lock, flags); |
| return IRQ_HANDLED; |
| } |
| |
| #ifdef GDTH_STATISTICS |
| ++act_ints; |
| #endif |
| |
| if (ha->type == GDT_PCI) { |
| dp6_ptr = ha->brd; |
| if (IStatus & 0x80) { /* error flag */ |
| IStatus &= ~0x80; |
| ha->status = readw(&dp6_ptr->u.ic.Status); |
| TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status)); |
| } else /* no error */ |
| ha->status = S_OK; |
| ha->info = readl(&dp6_ptr->u.ic.Info[0]); |
| ha->service = readw(&dp6_ptr->u.ic.Service); |
| ha->info2 = readl(&dp6_ptr->u.ic.Info[1]); |
| |
| writeb(0xff, &dp6_ptr->io.irqdel); /* acknowledge interrupt */ |
| writeb(0, &dp6_ptr->u.ic.Cmd_Index);/* reset command index */ |
| writeb(0, &dp6_ptr->io.Sema1); /* reset status semaphore */ |
| } else if (ha->type == GDT_PCINEW) { |
| if (IStatus & 0x80) { /* error flag */ |
| IStatus &= ~0x80; |
| ha->status = inw(PTR2USHORT(&ha->plx->status)); |
| TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status)); |
| } else |
| ha->status = S_OK; |
| ha->info = inl(PTR2USHORT(&ha->plx->info[0])); |
| ha->service = inw(PTR2USHORT(&ha->plx->service)); |
| ha->info2 = inl(PTR2USHORT(&ha->plx->info[1])); |
| |
| outb(0xff, PTR2USHORT(&ha->plx->edoor_reg)); |
| outb(0x00, PTR2USHORT(&ha->plx->sema1_reg)); |
| } else if (ha->type == GDT_PCIMPR) { |
| dp6m_ptr = ha->brd; |
| if (IStatus & 0x80) { /* error flag */ |
| IStatus &= ~0x80; |
| ha->status = readw(&dp6m_ptr->i960r.status); |
| TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status)); |
| } else /* no error */ |
| ha->status = S_OK; |
| |
| ha->info = readl(&dp6m_ptr->i960r.info[0]); |
| ha->service = readw(&dp6m_ptr->i960r.service); |
| ha->info2 = readl(&dp6m_ptr->i960r.info[1]); |
| |
| /* event string */ |
| if (IStatus == ASYNCINDEX) { |
| if (ha->service != SCREENSERVICE && |
| (ha->fw_vers & 0xff) >= 0x1a) { |
| ha->dvr.severity = readb |
| (&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.severity); |
| for (i = 0; i < 256; ++i) { |
| ha->dvr.event_string[i] = readb |
| (&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.evt_str[i]); |
| if (ha->dvr.event_string[i] == 0) |
| break; |
| } |
| } |
| } |
| writeb(0xff, &dp6m_ptr->i960r.edoor_reg); |
| writeb(0, &dp6m_ptr->i960r.sema1_reg); |
| } else { |
| TRACE2(("gdth_interrupt() unknown controller type\n")); |
| if (!gdth_polling) |
| spin_unlock_irqrestore(&ha->smp_lock, flags); |
| return IRQ_HANDLED; |
| } |
| |
|