)]}'
{
  "commit": "7e21774db5cc9cf8fe93a64a2f0c6cf47db8ab24",
  "tree": "460812792bc3b23789a83968b7bad840cc3eb047",
  "parents": [
    "0ba3307a8ec35252f7b1e222e32889a6f3d9ceb3",
    "2e84d75116c17c2034e917b411250d2d11755435"
  ],
  "author": {
    "name": "Linus Torvalds",
    "email": "torvalds@linux-foundation.org",
    "time": "Thu Jan 23 18:56:08 2014 -0800"
  },
  "committer": {
    "name": "Linus Torvalds",
    "email": "torvalds@linux-foundation.org",
    "time": "Thu Jan 23 18:56:08 2014 -0800"
  },
  "message": "Merge tag \u0027clk-for-linus-3.14-part1\u0027 of git://git.linaro.org/people/mike.turquette/linux\n\nPull clk framework changes from Mike Turquette:\n \"The first half of the clk framework pull request is made up almost\n  entirely of new platform/driver support.  There are some conversions\n  of existing drivers to the common-clock Device Tree binding, and a few\n  non-critical fixes to the framework.\n\n  Due to an entirely unnecessary cyclical dependency with the arm-soc\n  tree this pull request is broken into two pieces.  The second piece\n  will be sent out after arm-soc sends you the pull request that merged\n  in core support for the HiSilicon 3620 platform.  That same pull\n  request from arm-soc depends on this pull request to merge in those\n  HiSilicon bits without causing build failures\"\n\n[ Just did the ARM SoC merges, so getting ready for the second clk tree\n  pull request   - Linus ]\n\n* tag \u0027clk-for-linus-3.14-part1\u0027 of git://git.linaro.org/people/mike.turquette/linux: (97 commits)\n  devicetree: bindings: Document qcom,mmcc\n  devicetree: bindings: Document qcom,gcc\n  clk: qcom: Add support for MSM8660\u0027s global clock controller (GCC)\n  clk: qcom: Add support for MSM8974\u0027s multimedia clock controller (MMCC)\n  clk: qcom: Add support for MSM8974\u0027s global clock controller (GCC)\n  clk: qcom: Add support for MSM8960\u0027s multimedia clock controller (MMCC)\n  clk: qcom: Add support for MSM8960\u0027s global clock controller (GCC)\n  clk: qcom: Add reset controller support\n  clk: qcom: Add support for branches/gate clocks\n  clk: qcom: Add support for root clock generators (RCGs)\n  clk: qcom: Add support for phase locked loops (PLLs)\n  clk: qcom: Add a regmap type clock struct\n  clk: Add set_rate_and_parent() op\n  reset: Silence warning in reset-controller.h\n  clk: sirf: re-arch to make the codes support both prima2 and atlas6\n  clk: composite: pass mux_hw into determine_rate\n  clk: shmobile: Fix MSTP clock array initialization\n  clk: shmobile: Fix MSTP clock index\n  ARM: dts: Add clock provider specific properties to max77686 node\n  clk: max77686: Register OF clock provider\n  ...\n",
  "tree_diff": []
}