| commit | 7df533a7e3d2216e860ecf147ae8cee49bf133e9 | [log] [tgz] |
|---|---|---|
| author | Jerome Brunet <jbrunet@baylibre.com> | Wed Jul 04 18:54:58 2018 +0200 |
| committer | Jerome Brunet <jbrunet@baylibre.com> | Mon Jul 09 13:49:31 2018 +0200 |
| tree | 6a95385f018bca6963984ef1252fc3edc7f32ade | |
| parent | 80d396b5118f448cb2206a509aba6917691a835e [diff] |
clk: meson: add gen_clk GEN_CLK is able to route several internal clocks to one of the SoC pads. In the future, even more clocks could be made accessible using cts_msr_clk - the clock measure block. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>