commit 4bd7547756af5c71d55e4d77f41db3d06c18b3e0
author Chao Xie <chao.xie@marvell.com> Tue Jan 28 15:20:44 2014 +0800
committer Linus Walleij <linus.walleij@linaro.org> Mon Feb 10 10:13:08 2014 +0100
tree a6806ff2060fd5f3b9d52753ab56884079f46e47
parent b81e57e6ac35242ba59206b303ba6c7585764ee1

pinctrl: single: add low power mode support

For some silicons, the pin configuration register can control
the output of the pin when the pad including the pin enter
low power mode.
For example, the pin can be "Drive 1", "Drive 0", "Float" when
the pad including the pin enter low power mode.
It is very useful when you want to control the power leakeage
when the SOC enter low power mode, and can save more power for
the low power mode.

Signed-off-by: Chao Xie <chao.xie@marvell.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>