EDAC, AMD: decode FR MCEs
See Fam10h BKDG (31116, rev. 3.28), Table 101.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
diff --git a/drivers/edac/edac_mce_amd.c b/drivers/edac/edac_mce_amd.c
index 228482855..c8ca713 100644
--- a/drivers/edac/edac_mce_amd.c
+++ b/drivers/edac/edac_mce_amd.c
@@ -321,6 +321,15 @@
}
EXPORT_SYMBOL_GPL(amd_decode_nb_mce);
+static void amd_decode_fr_mce(u64 mc5_status)
+{
+ /* we have only one error signature so match all fields at once. */
+ if ((mc5_status & 0xffff) == 0x0f0f)
+ pr_emerg(" FR Error: CPU Watchdog timer expire.\n");
+ else
+ pr_warning("Corrupted FR MCE info?\n");
+}
+
static inline void amd_decode_err_code(unsigned int ec)
{
if (TLB_ERROR(ec)) {
@@ -401,6 +410,10 @@
amd_decode_nb_mce(node, ®s, 1);
break;
+ case 5:
+ amd_decode_fr_mce(m->status);
+ break;
+
default:
break;
}