tree 58eff40eb4c517c4fd49fd347d38273ee1e1ee4b
parent b0fd4e49aea8a460afab7bc67cd618e2d19291d4
author David S. Miller <davem@sunset.davemloft.net> 1138838121 -0800
committer David S. Miller <davem@sunset.davemloft.net> 1142845892 -0800

[SPARC64]: Access TSB with physical addresses when possible.

This way we don't need to lock the TSB into the TLB.
The trick is that every TSB load/store is registered into
a special instruction patch section.  The default uses
virtual addresses, and the patch instructions use physical
address load/stores.

We can't do this on all chips because only cheetah+ and later
have the physical variant of the atomic quad load.

Signed-off-by: David S. Miller <davem@davemloft.net>