MIPS: Make various locks static.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c
index 0bc79dc..5070e96 100644
--- a/arch/mips/cavium-octeon/octeon-irq.c
+++ b/arch/mips/cavium-octeon/octeon-irq.c
@@ -15,7 +15,6 @@
DEFINE_RWLOCK(octeon_irq_ciu0_rwlock);
DEFINE_RWLOCK(octeon_irq_ciu1_rwlock);
-DEFINE_SPINLOCK(octeon_irq_msi_lock);
static int octeon_coreid_for_cpu(int cpu)
{
@@ -545,6 +544,8 @@
#ifdef CONFIG_PCI_MSI
+static DEFINE_SPINLOCK(octeon_irq_msi_lock);
+
static void octeon_irq_msi_ack(unsigned int irq)
{
if (!octeon_has_feature(OCTEON_FEATURE_PCIE)) {
diff --git a/arch/mips/dec/kn01-berr.c b/arch/mips/dec/kn01-berr.c
index b0dc6d5..b9bdc6f 100644
--- a/arch/mips/dec/kn01-berr.c
+++ b/arch/mips/dec/kn01-berr.c
@@ -46,7 +46,7 @@
* There is no default value -- it has to be initialized.
*/
u16 cached_kn01_csr;
-DEFINE_SPINLOCK(kn01_lock);
+static DEFINE_SPINLOCK(kn01_lock);
static inline void dec_kn01_be_ack(void)
diff --git a/arch/mips/include/asm/dec/kn01.h b/arch/mips/include/asm/dec/kn01.h
index 28fa717..88d9ffd 100644
--- a/arch/mips/include/asm/dec/kn01.h
+++ b/arch/mips/include/asm/dec/kn01.h
@@ -80,7 +80,6 @@
struct pt_regs;
extern u16 cached_kn01_csr;
-extern spinlock_t kn01_lock;
extern void dec_kn01_be_init(void);
extern int dec_kn01_be_handler(struct pt_regs *regs, int is_fixup);
diff --git a/arch/mips/oprofile/op_model_loongson2.c b/arch/mips/oprofile/op_model_loongson2.c
index c25fb9b..f7f9a32 100644
--- a/arch/mips/oprofile/op_model_loongson2.c
+++ b/arch/mips/oprofile/op_model_loongson2.c
@@ -47,7 +47,7 @@
int cnt1_enabled, cnt2_enabled;
} reg;
-DEFINE_SPINLOCK(sample_lock);
+static DEFINE_SPINLOCK(sample_lock);
static char *oprofid = "LoongsonPerf";
static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id);
diff --git a/arch/mips/pci/ops-pmcmsp.c b/arch/mips/pci/ops-pmcmsp.c
index 32548b5..04b3147 100644
--- a/arch/mips/pci/ops-pmcmsp.c
+++ b/arch/mips/pci/ops-pmcmsp.c
@@ -206,7 +206,7 @@
}
#endif /* CONFIG_PROC_FS && PCI_COUNTERS */
-DEFINE_SPINLOCK(bpci_lock);
+static DEFINE_SPINLOCK(bpci_lock);
/*****************************************************************************
*
diff --git a/arch/mips/sgi-ip27/ip27-nmi.c b/arch/mips/sgi-ip27/ip27-nmi.c
index 6c5a630..8682784 100644
--- a/arch/mips/sgi-ip27/ip27-nmi.c
+++ b/arch/mips/sgi-ip27/ip27-nmi.c
@@ -21,7 +21,7 @@
typedef unsigned long machreg_t;
-DEFINE_SPINLOCK(nmi_lock);
+static DEFINE_SPINLOCK(nmi_lock);
/*
* Lets see what else we need to do here. Set up sp, gp?
diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c
index 4070268..fbea5e6 100644
--- a/arch/mips/sibyte/bcm1480/irq.c
+++ b/arch/mips/sibyte/bcm1480/irq.c
@@ -73,7 +73,7 @@
/* Store the CPU id (not the logical number) */
int bcm1480_irq_owner[BCM1480_NR_IRQS];
-DEFINE_SPINLOCK(bcm1480_imr_lock);
+static DEFINE_SPINLOCK(bcm1480_imr_lock);
void bcm1480_mask_irq(int cpu, int irq)
{
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c
index 5e7f201..5dae2ec 100644
--- a/arch/mips/sibyte/sb1250/irq.c
+++ b/arch/mips/sibyte/sb1250/irq.c
@@ -72,7 +72,7 @@
/* Store the CPU id (not the logical number) */
int sb1250_irq_owner[SB1250_NR_IRQS];
-DEFINE_SPINLOCK(sb1250_imr_lock);
+static DEFINE_SPINLOCK(sb1250_imr_lock);
void sb1250_mask_irq(int cpu, int irq)
{
diff --git a/arch/mips/sni/rm200.c b/arch/mips/sni/rm200.c
index 31e2583..c4778e4 100644
--- a/arch/mips/sni/rm200.c
+++ b/arch/mips/sni/rm200.c
@@ -132,7 +132,7 @@
* readb/writeb to access them
*/
-DEFINE_SPINLOCK(sni_rm200_i8259A_lock);
+static DEFINE_SPINLOCK(sni_rm200_i8259A_lock);
#define PIC_CMD 0x00
#define PIC_IMR 0x01
#define PIC_ISR PIC_CMD
